Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.

Integrated Silicon Solution, Inc.

Rev. I
11/22/05

IS61LV6416
IS61LV6416L

ISSI

FEATURES

· High-speed access time: 8, 10, 12 ns

· CMOS low power operation

-- 61LV6416:

75 mW (typical) operating current

0.5 mW (typical) standby current

-- 61LV6416L:

65 mW (typical) operating current

50 µW (typical) standby current

· TTL compatible interface levels

· Single 3.3V power supply

· Fully static operation: no clock or refresh

required

· Three state outputs

· Data control for upper and lower bytes

· Industrial temperature available

· Lead-free available

DESCRIPTION

The

ISSI

IS61LV6416/IS61LV6416L is a high-speed,

1,048,576-bit static RAM organized as 65,536 words by 16
bits. It is fabricated using

ISSI

's high-performance CMOS

technology. This highly reliable process coupled with
innovative circuit design techniques, yields access times
as fast as 8 ns with low power consumption.

When

CE is HIGH (deselected), the device assumes a

standby mode at which the power dissipation can be
reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip
Enable and Output Enable inputs,

CE and OE. The active

LOW Write Enable (

WE) controls both writing and reading

of the memory. A data byte allows Upper Byte (

UB) and

Lower Byte (

LB) access.

The IS61LV6416/IS61LV6416L is packaged in the JEDEC
standard 44-pin 400-mil SOJ, 44-pin TSOP-II, and 48-pin
mini BGA (6mm x 8mm).

FUNCTIONAL BLOCK DIAGRAM

NOVEMBER 2005

A0-A15

CE
OE

64K x 16

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

I/O

DATA

CIRCUIT

I/O0-I/O7

Lower Byte

I/O8-I/O15

Upper Byte

64K x 16 HIGH-SPEED CMOS STATIC RAM
WITH 3.3V SUPPLY

IS61LV6416
IS61LV6416L

Integrated Silicon Solution, Inc.

Rev. I
11/22/05

ISSI

PIN CONFIGURATIONS

44-Pin SOJ (K)

A15

A14

A13

A12

A11

I/O0

I/O1

I/O2

I/O3

VDD

GND

I/O4

I/O5

I/O6

I/O7

A10

A2
OE
UB
LB
I/O15

I/O14

I/O13

I/O12

GND

VDD

I/O11

I/O10

I/O9

I/O8

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

A15
A14
A13
A12
A11

I/O0
I/O1
I/O2
I/O3

GND

I/O4
I/O5
I/O6
I/O7

A10

A9
A8
A7

A0
A1
A2
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V

I/O11
I/O10
I/O9
I/O8
NC
A3
A4
A5
A6
NC

44-Pin TSOP-II (T)

48-Pin mini BGA (6mm x 8mm) (B)

PIN DESCRIPTIONS

A0-A15

Address Inputs

I/O0-I/O15

Data Inputs/Outputs

Chip Enable Input

Output Enable Input

Write Enable Input

Lower-byte Control (I/O0-I/O7)

Upper-byte Control (I/O8-I/O15)

No Connection

Power

GND

Ground

1 2 3 4 5 6

I/O

GND

I/O

GND

I/O

A14

A15

I/O

A12

A13

I/O

A10

A11

IS61LV6416
IS61LV6416L

Integrated Silicon Solution, Inc.

Rev. I
11/22/05

ISSI

OPERATING RANGE

Range

Ambient Temperature

(8,10 ns)

(12 ns)

Commercial

0°C to +70°C

3.3V+10%,-5%

3.3V ± 10%

Industrial

40°C to +85°C

3.3V+10%,-5%

3.3V ± 10%

DC ELECTRICAL CHARACTERISTICS

(Over Operating Range)

Symbol

Parameter

Test Conditions

Min.

Max.

Unit

Output HIGH Voltage

= Min., I

= 4.0 mA

2.4

Output LOW Voltage

= Min., I

= 8.0 mA

0.4

Input HIGH Voltage

+ 0.3

Input LOW Voltage

(1)

0.3

0.8

Input Leakage

GND

µA

Output Leakage

GND

OUT

, Outputs Disabled

µA

Notes:
1. V

(min.) = 2.0V for pulse width less than 10 ns.

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Parameter

Value

Unit

TERM

Terminal Voltage with Respect to GND

0.5 to V

+0.5

STG

Storage Temperature

65 to +150

°C

Power Dissipation

1.5

OUT

DC Output Current (LOW)

Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

TRUTH TABLE

I/O PIN

Mode

I/O0-I/O7

I/O8-I/O15

Current

Not Selected

High-Z

, I

Output Disabled

High-Z

Read

OUT

High-Z

OUT

Write

High-Z

IS61LV6416
IS61LV6416L

Integrated Silicon Solution, Inc.

Rev. I
11/22/05

ISSI

CAPACITANCE

(1)

Symbol

Parameter

Conditions

Max.

Unit

Input Capacitance

= 0V

OUT

Input/Output Capacitance

OUT

= 0V

Note:
1. Tested initially and after any design or process changes that may affect these parameters.

IS61LV6416

POWER SUPPLY CHARACTERISTICS

(1)

(Over Operating Range)

-8 ns

-10 ns

-12 ns

Symbol Parameter

Test Conditions

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Dynamic Operating

= Max.,

Com.

140

120

100

Supply Current

OUT

= 0 mA, f = f

MAX

Ind.

150

130

110

typ.

(2)

105

TTL Standby Current

= Max.,

Com.

(TTL Inputs)

= V

or V

Ind.

, f = 0

CMOS Standby

= Max.,

Com.

Current (CMOS Inputs)

0.2V,

Ind.

0.2V, or

typ.

(2)

0.5

0.2V, f = 0

Note:
1. At f = f

MAX

, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

2. Typical values are measured at V

=3.3V, T

=25

C. Not 100% Tested.

IS61LV6416L

POWER SUPPLY CHARACTERISTICS

(1)

(Over Operating Range)

-8 ns

-10 ns

Symbol Parameter

Test Conditions

Min.

Max.

Min.

Max.

Unit

Dynamic Operating

= Max.,

Com.

100

Supply Current

OUT

= 0 mA, f = f

MAX

Ind.

110

105

typ.

(2)

TTL Standby Current

= Max.,

Com.

(TTL Inputs)

= V

or V

Ind.

, f = 0

CMOS Standby

= Max.,

Com.

Current (CMOS Inputs)

0.2V,

Ind.

1.5

0.2V, or

typ.

(2)

0.05

0.2V, f = 0

Note:
1. At f = f

MAX

, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

2. Typical values are measured at V

=3.3V, T

=25

C. Not 100% Tested.

IS61LV6416
IS61LV6416L

Integrated Silicon Solution, Inc.

Rev. I
11/22/05

ISSI

READ CYCLE SWITCHING CHARACTERISTICS

(1)

(Over Operating Range)

-8 ns

-10 ns

-12 ns

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Read Cycle Time

Address Access Time

OHA

Output Hold Time

ACE

CE Access Time

DOE

OE Access Time

HZOE

(2)

OE to High-Z Output

LZOE

(2)

OE to Low-Z Output

HZCE

CE to High-Z Output

LZCE

(2)

CE to Low-Z Output

LB, UB Access Time

HZB

LB, UB to High-Z Output

LZB

LB, UB to Low-Z Output

Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and

output loading specified in Figure 1a.

2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.

AC TEST CONDITIONS

Parameter

Unit

Input Pulse Level

0V to 3.0V

Input Rise and Fall Times

3 ns

Input and Output Timing

1.5V

and Reference Level

Output Load

See Figures 1a and 1b

AC TEST LOADS

Figure 1a.

Figure 1b.

319

30 pF

Including

jig and

scope

353

OUTPUT

3.3V

319

5 pF

Including

jig and

scope

353

OUTPUT

3.3V

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