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Электронный компонент: IS61WV12816BLL-12TLI

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ISSI
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
1
Rev. C
02/03/06
Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
IS61WV12816BLL
IS64WV12816BLL
FEATURES
High-speed access time:
12 ns: 3.3V + 10%
15 ns: 2.5V-3.6V
Operating Current: 25mA (typ.)
Stand by Current: 400A(typ.)
TTL and CMOS compatible interface levels
Fully static operation: no clock or refresh
required
Three state outputs
Data control for upper and lower bytes
Industrial and Automotive temperatures avail-
able
Lead-free available
128K x 16 HIGH-SPEED CMOS STATIC RAM
DESCRIPTION
The
ISSI
IS61WV12816BLL and IS64WV12816BLL are
high-speed, 2,097,152-bit static RAM organized as 131,072
words by 16 bits. They are fabricated using
ISSI
's high-
performance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields
access times as fast as 12 ns with low power consumption.
When
CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs,
CE and OE. The active LOW
Write Enable (
WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (
UB) and Lower
Byte (
LB) access.
The IS61WV12816BLL and IS64WV12816BLL are packaged
in the JEDEC standard 44-pin TSOP (Type II) and 48-pin
mini BGA (6mm x 8mm).
FUNCTIONAL BLOCK DIAGRAM
FEBRUARY 2006
A0-A16
CE
OE
WE
128Kx16
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VDD
I/O
DATA
CIRCUIT
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
UB
LB
2
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
Rev. C
02/03/06
ISSI
IS61WV12816BLL
IS64WV12816BLL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
V
DD
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
DD
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
44-Pin TSOP (Type II) (T)
PIN DESCRIPTIONS
A0-A16
Address Inputs
I/O0-I/O15
Data Inputs/Outputs
CE
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
LB
Lower-byte Control (I/O0-I/O7)
UB
Upper-byte Control (I/O8-I/O15)
NC
No Connection
V
DD
Power
GND
Ground
TRUTH TABLE
I/O PIN
Mode
WE
WE
WE
WE
WE
CE
CE
CE
CE
CE
OE
OE
OE
OE
OE
LB
LB
LB
LB
LB
UB
UB
UB
UB
UB
I/O0-I/O7
I/O8-I/O15
V
DD
Current
Not Selected
X
H
X
X
X
High-Z
High-Z
I
SB
1
, I
SB
2
Output Disabled
H
L
H
X
X
High-Z
High-Z
I
CC
X
L
X
H
H
High-Z
High-Z
Read
H
L
L
L
H
D
OUT
High-Z
I
CC
H
L
L
H
L
High-Z
D
OUT
H
L
L
L
L
D
OUT
D
OUT
Write
L
L
X
L
H
D
IN
High-Z
I
CC
L
L
X
H
L
High-Z
D
IN
L
L
X
L
L
D
IN
D
IN
PIN CONFIGURATION
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
3
Rev. C
02/03/06
ISSI
IS61WV12816BLL
IS64WV12816BLL
PIN DESCRIPTIONS
A0-A16
Address Inputs
I/O0-I/O15
Data Inputs/Outputs
CE
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
LB
Lower-byte Control (I/O0-I/O7)
UB
Upper-byte Control (I/O8-I/O15)
NC
No Connection
V
DD
Power
GND
Ground
48-Pin mini BGA (B)
PIN CONFIGURATION
1 2 3 4 5 6
A
B
C
D
E
F
G
H
LB
OE
A0
A1
A2
NC
I/O
8
UB
A3
A4
CE
I/O
0
I/O
9
I/O
10
A5
A6
I/O
1
I/O
2
GND
I/O
11
NC
A7
I/O
3
V
DD
V
DD
I/O
12
NC
A16
I/O
4
GND
I/O
14
I/O
13
A14
A15
I/O
5
I/O
6
I/O
15
NC
A12
A13
WE
I/O
7
NC
A8
A9
A10
A11
NC
4
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
Rev. C
02/03/06
ISSI
IS61WV12816BLL
IS64WV12816BLL
OPERATING RANGE (V
DD
)
Range
Ambient Temperature
V
DD
(15 n
S
)
V
DD
(12 n
S
)
Industrial
40C to +85C
2.5V-3.6V
3.3V + 10%
Automotive
40C to +125C
2.5V-3.6V
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameter
Value
Unit
V
DD
Power Supply Voltage Relative to GND
0.5 to 4.0V
V
V
TERM
Terminal Voltage with Respect to GND
0.5 to V
DD
+ 0.5
V
T
STG
Storage Temperature
65 to + 150
C
P
T
Power Dissipation
1.0
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these or any other conditions above those indicated in the opera-
tional sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect reliability.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 2.5V-3.6V
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
DD
= Min., I
OH
= 1.0 mA
1.8
--
V
V
OL
Output LOW Voltage
V
DD
= Min., I
OL
= 1.0 mA
--
0.4
V
V
IH
Input HIGH Voltage
2.0
V
DD
+ 0.3
V
V
IL
Input LOW Voltage
(1)
0.3
0.4
V
I
LI
Input Leakage
GND
V
IN
V
DD
1
1
A
I
LO
Output Leakage
GND
V
OUT
V
DD
, Outputs Disabled
1
1
A
Note:
1.
V
IL
(min.) = 0.3V DC; V
IL
(min.) = 2.0V AC (pulse width - 2.0 ns). Not 100% tested.
V
IH
(max.) = V
DD
+ 0.3V DC; V
IH
(max.) = V
DD
+ 2.0V AC (pulse width - 2.0 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 3.3V + 10%
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
DD
= Min., I
OH
= 4.0 mA
2.4
--
V
V
OL
Output LOW Voltage
V
DD
= Min., I
OL
= 8.0 mA
--
0.4
V
V
IH
Input HIGH Voltage
2
V
DD
+ 0.3
V
V
IL
Input LOW Voltage
(1)
0.3
0.8
V
I
LI
Input Leakage
GND
V
IN
V
DD
1
1
A
I
LO
Output Leakage
GND
V
OUT
V
DD
, Outputs Disabled
1
1
A
Note:
1.
V
IL
(min.) = 0.3V DC; V
IL
(min.) = 2.0V AC (pulse width - 2.0 ns). Not 100% tested.
V
IH
(max.) = V
DD
+ 0.3V DC; V
IH
(max.) = V
DD
+ 2.0V AC (pulse width - 2.0 ns). Not 100% tested.
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
5
Rev. C
02/03/06
ISSI
IS61WV12816BLL
IS64WV12816BLL
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-12ns
-15 ns
Symbol
Parameter
Test Conditions
Min.
Max.
Min.
Max.
Unit
I
CC
V
DD
Operating
V
DD
= Max.,
CE = V
IL
Com.
--
35
--
30
mA
Supply Current
I
OUT
= 0 mA, f = Max.
Ind.
--
40
--
35
Auto
--
40
typ.
(2)
--
25
--
20
I
SB
1
TTL Standby
V
DD
= Max.,
Com.
--
20
--
20
mA
Current
V
IN
= V
IH
or V
IL
Ind.
--
20
--
20
(TTL Inputs)
CE
V
IH
, f = max
Auto
--
30
I
SB
2
CMOS Standby
V
DD
= Max.,
Com.
--
750
--
750
A
Current
CE
V
DD
0.2V,
Ind.
--
900
--
900
A
(CMOS Inputs)
V
IN
V
DD
0.2V, or
Auto
--
6
mA
V
IN
0.2V, f = 0
typ.
(2)
--
400
--
400
A
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at V
DD
=3.3V, T
A
=25
0
C. Not 100% tested.
CAPACITANCE
(1)
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Input/Output Capacitance
V
OUT
= 0V
8
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.