ChipFind - документация

Электронный компонент: IS62LV2568LL-70H

Скачать:  PDF   ZIP
www.docs.chipfind.ru
background image
Integrated Silicon Solution, Inc. -- 1-800-379-4774
1
Rev. B
05/03/00
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. Copyright 2000, Integrated Silicon Solution, Inc.
IS62LV2568LL
ISSI
DESCRIPTION
The
ISSI
IS62LV2568LL is a low voltage, 262,144 words
by 8 bits, CMOS SRAM. It is fabricated using
ISS
I's low
voltage, six transistor (6T), CMOS technology. The device is
targeted to satisfy the demands of the state-of-the-art
technologies such as cell phones and pagers.
When
CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be reduced
down with CMOS input levels. Additionally, easy memory
expansion is provided by using Chip Enable and Output
Enable inputs,
CE and OE. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IS62LV2568LL is available in 32-pin TSOP (Type I),
STSOP (Type I), and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
256K x 8 LOW POWER and LOW Vcc
CMOS STATIC RAM
FEATURES
Access times of 70 and 85 ns
CMOS low power operation:
-- 120 mW (typical) operating
-- 6 W (typical) standby
Low data retention voltage: 2V (min.)
Output Enable (
OE) and two Chip Enable
(
CE1 and CE2) inputs for ease in applications
TTL compatible inputs and outputs
Fully static operation:
-- No clock or refresh required
Single 2.5V to 3.0V power supply
Available in 32-pin TSOP (Type I), STSOP (Type I),
and 36-pin mini BGA
APRIL 2000
A0-A17
CE1
OE
WE
256K x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
CE2
background image
IS62LV2568LL
ISSI
2
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. B
05/03/00
PIN DESCRIPTIONS
A0-A17
Address Inputs
CE1
Chip Enable 1 Input
CE2
Chip Enable 2 Input
OE
Output Enable Input
WE
Write Enable Input
I/O0-I/O7
Input/Output
NC
No Connection
Vcc
Power
GND
Ground
PIN CONFIGURATION
36-pin mini BGA (B)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
WE
CE2
A15
VCC
A17
A16
A14
A12
A7
A6
A5
A4
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
1 2 3 4 5 6
A
B
C
D
E
F
G
H
A0
I/O4
I/O5
GND
Vcc
I/O6
I/O7
A9
A1
A2
OE
A10
CE2
WE
NC
NC
CE1
A11
A3
A4
A5
A17
A16
A12
A6
A7
A15
A13
A8
I/O0
I/O1
Vcc
GND
I/O2
I/O3
A14
32-Pin TSOP (Type I), STSOP (Type I)
background image
IS62LV2568LL
ISSI
Integrated Silicon Solution, Inc. -- 1-800-379-4774
3
Rev. B
05/03/00
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameter
Value
Unit
V
TERM
Terminal Voltage with Respect to GND
0.5 to Vcc + 0.5
V
V
CC
Vcc related to GND
0.3 to +4.6
V
T
BIAS
Temperature Under Bias
40 to +85
C
T
STG
Storage Temperature
65 to +150
C
P
T
Power Dissipation
0.7
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
CAPACITANCE
(1,2)
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
8
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25C, f = 1 MHz, Vcc = 3.0V.
TRUTH TABLE
Mode
WE
CE1
CE2
OE
I/O Operation
Vcc Current
Not Selected
X
H
X
X
High-Z
I
SB
1
, I
SB
2
(Power-down)
X
X
L
X
High-Z
I
SB
1
, I
SB
2
Output Disabled H
L
H
H
High-Z
I
CC
Read
H
L
H
L
D
OUT
I
CC
Write
L
L
H
X
D
IN
I
CC
OPERATING RANGE
Range
Ambient Temperature
V
CC
Commercial
0C to +70C
2.5V to 3.0V
Industrial
40C to +85C
2.5V to 3.0V
background image
IS62LV2568LL
ISSI
4
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. B
05/03/00
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-70
-85
Symbol Parameter
Test Conditions
Min.
Max.
Min.
Max.
Unit
I
CC
Vcc Dynamic
V
CC
= Max., CE = V
IL
Com.
--
30
--
25
mA
Operating
I
OUT
= 0 mA, f = f
MAX
Ind.
--
35
--
30
Supply Current
I
SB
1
TTL Standby
V
CC
= Max.,
Com.
--
0.4
--
0.4
mA
Current
V
IN
= V
IH
or V
IL
,
Ind.
--
1.0
--
1.0
(TTL Inputs)
CE1
V
IH
or CE2
V
IL
, f = 0
I
SB
2
CMOS Standby
V
CC
= Max., f = 0
Com.
--
5
--
5
A
Current
CE1
V
CC
0.2V,
Ind.
--
5
--
5
(CMOS Inputs)
CE2
0.2V,
or V
IN
V
CC
0.2V, V
IN
0.2V
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol Parameter
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= Min., I
OH
= 1.0 mA
2.0
--
V
V
OL
Output LOW Voltage
V
CC
= Min., I
OL
= 2.1 mA
--
0.4
V
V
IH
Input HIGH Voltage
2.2
V
CC
+ 0.3
V
V
IL
Input LOW Voltage
(1)
0.3
0.4
V
I
LI
Input Leakage
GND
V
IN
V
CC
1
1
A
I
LO
Output Leakage
GND
V
OUT
V
CC
1
1
A
Note:
1. V
IL
= 3.0V for pulse width less than 10 ns.
background image
IS62LV2568LL
ISSI
Integrated Silicon Solution, Inc. -- 1-800-379-4774
5
Rev. B
05/03/00
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-70
-85
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
t
RC
Read Cycle Time
70
--
85
--
ns
t
AA
Address Access Time
--
70
--
85
ns
t
OHA
Output Hold Time
10
--
15
--
ns
t
ACE
1
CE1 Access Time
--
70
--
85
ns
t
ACE
2
CE2 Access Time
--
70
--
85
ns
t
DOE
OE Access Time
--
35
--
45
ns
t
HZOE
(2)
OE to High-Z Output
--
25
--
25
ns
t
LZOE
(2)
OE to Low-Z Output
5
--
5
--
ns
t
LZCE
1
(2)
CE1 to Low-Z Output
10
--
10
--
ns
t
LZCE
2
(2)
CE2 to Low-Z Output
10
--
10
--
ns
t
HZCE
(2)
CE1 or CE2 to High-Z Output
0
25
0
25
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3V, input pulse levels of 0.4V to 2.2V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0.4V to 2.2V
Input Rise and Fall Times
5 ns
Input and Output Timing
1.3V
and Reference Level
Output Load
See Figures 1 and 2
AC TEST LOADS
3070
5 pF
Including
jig and
scope
3150
OUTPUT
2.8V
3070
30 pF
Including
jig and
scope
3150
OUTPUT
2.8V
Figure 1
Figure 2