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Электронный компонент: IS62WV51216BLL

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Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
1
Rev. B
02/24/05
IS62WV51216ALL
IS62WV51216BLL
ISSI
Copyright 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
512K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
High-speed access time: 45ns, 55ns
CMOS low power operation
36 mW (typical) operating
12 W (typical) CMOS standby
TTL compatible interface levels
Single power supply
1.65V--2.2V V
DD
(62WV51216ALL)
2.5V--3.6V V
DD
(62WV51216BLL)
Fully static operation: no clock or refresh
required
Three state outputs
Data control for upper and lower bytes
Industrial temperature available
Lead-free available
DESCRIPTION
The
ISSI
IS62WV51216ALL/ IS62WV51216BLL are high-
speed, 8M bit static RAMs organized as 512K words by 16
bits. It is fabricated using
ISSI
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
CS1
is HIGH (deselected) or when CS2 is LOW
(deselected) or when
CS1
is LOW, CS2 is HIGH and both
LB
and
UB
are HIGH, the device assumes a standby mode
at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory. A
data byte allows Upper Byte
(UB)
and Lower Byte (
LB)
access.
The IS62WV51216ALL and IS62WV51216BLL are packaged
in the JEDEC standard 48-pin mini BGA (7.2mm x 8.7mm)
and 44-Pin TSOP (TYPE II).
FUNCTIONAL BLOCK DIAGRAM
FEBRUARY 2005
A0-A18
CS1
OE
WE
512K x 16
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
V
DD
I/O
DATA
CIRCUIT
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
UB
LB
CS2
2
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
Rev. B
02/24/05
IS62WV51216ALL, IS62WV51216BLL
ISSI
PIN CONFIGURATIONS
48-Pin mini BGA (7.2mm x 8.7mm)
PIN DESCRIPTIONS
A0-A18
Address Inputs
I/O0-I/O15
Data Inputs/Outputs
CS1
, CS2
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
LB
Lower-byte Control (I/O0-I/O7)
UB
Upper-byte Control (I/O8-I/O15)
NC
No Connection
V
DD
Power
GND
Ground
1 2 3 4 5 6
A
B
C
D
E
F
G
H
LB
OE
A0
A1
A2
CS2
I/O
8
UB
A3
A4
CS1
I/O
0
I/O
9
I/O
10
A5
A6
I/O
1
I/O
2
GND
I/O
11
A17
A7
I/O
3
V
DD`
V
DD
I/O
12
GND
A16
I/O
4
GND
I/O
14
I/O
13
A14
A15
I/O
5
I/O
6
I/O
15
NC
A12
A13
WE
I/O
7
A18
A8
A9
A10
A11
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A4
A3
A2
A1
A0
CS1
I/O0
I/O1
I/O2
I/O3
V
DD
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
DD
I/O11
I/O10
I/O9
I/O8
A18
A8
A9
A10
A11
A17
44-Pin TSOP (Type II)
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
3
Rev. B
02/24/05
IS62WV51216ALL, IS62WV51216BLL
ISSI
TRUTH TABLE
I/O PIN
Mode
WE
WE
WE
WE
WE
CS1
CS1
CS1
CS1
CS1
CS2
OE
OE
OE
OE
OE
LB
LB
LB
LB
LB
UB
UB
UB
UB
UB
I/O0-I/O7
I/O8-I/O15
V
DD
Current
Not Selected
X
H
X
X
X
X
High-Z
High-Z
I
SB
1
, I
SB
2
X
X
L
X
X
X
High-Z
High-Z
I
SB
1
, I
SB
2
X
X
X
X
H
H
High-Z
High-Z
I
SB
1
, I
SB
2
Output Disabled
H
L
H
H
L
X
High-Z
High-Z
I
CC
H
L
H
H
X
L
High-Z
High-Z
I
CC
Read
H
L
H
L
L
H
D
OUT
High-Z
I
CC
H
L
H
L
H
L
High-Z
D
OUT
H
L
H
L
L
L
D
OUT
D
OUT
Write
L
L
H
X
L
H
D
IN
High-Z
I
CC
L
L
H
X
H
L
High-Z
D
IN
L
L
H
X
L
L
D
IN
D
IN
OPERATING RANGE (V
DD
)
Range
Ambient Temperature IS62WV51216ALL (70ns) IS62WV51216BLL (55ns, 70ns)
IS62WV51216BLL (45ns)
Commercial
0C to +70C
1.65V - 2.2V
2.5V - 3.6V
3.0 - 3.6V
Industrial
40C to +85C
1.65V - 2.2V
2.5V - 3.6V
4
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
Rev. B
02/24/05
IS62WV51216ALL, IS62WV51216BLL
ISSI
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
Parameter
Test Conditions
V
DD
Min.
Max.
Unit
V
OH
Output HIGH Voltage
I
OH
= -0.1 mA
1.65-2.2V
1.4
--
V
I
OH
= -1 mA
2.5-3.6V
2.2
--
V
V
OL
Output LOW Voltage
I
OL
= 0.1 mA
1.65-2.2V
--
0.2
V
I
OL
= 2.1 mA
2.5-3.6V
--
0.4
V
V
IH
Input HIGH Voltage
1.65-2.2V
1.4
V
DD
+ 0.2
V
2.5-3.6V
2.2
V
DD
+ 0.3
V
V
IL
(1)
Input LOW Voltage
1.65-2.2V
0.2
0.4
V
2.5-3.6V
0.2
0.6
V
I
LI
Input Leakage
GND
V
IN
V
DD
1
1
A
I
LO
Output Leakage
GND
V
OUT
V
DD
, Outputs Disabled
1
1
A
Notes:
1. V
IL
(min.) = 1.0V for pulse width less than 10 ns.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameter
Value
Unit
V
TERM
Terminal Voltage with Respect to GND
0.2 to V
DD
+0.3
V
T
BIAS
Temperature Under Bias
40 to +85
C
V
DD
V
DD
Related to GND
0.2 to +3.8
V
T
STG
Storage Temperature
65 to +150
C
P
T
Power Dissipation
1.0
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
5
Rev. B
02/24/05
IS62WV51216ALL, IS62WV51216BLL
ISSI
AC TEST CONDITIONS
Parameter
62WV51216ALL
62WV51216BLL
(Unit)
(Unit)
Input Pulse Level
0.4V to V
DD
-0.2
0.4V to V
DD
-0.3V
Input Rise and Fall Times
5 ns
5ns
Input and Output Timing
V
REF
V
REF
and Reference Level
Output Load
See Figures 1 and 2
See Figures 1 and 2
AC TEST LOADS
Figure 1
Figure 2
62WV51216ALL
62WV51216BLL
(1.65V - 2.2V)
(2.5V - 3.6V)
R1(
)
3070
1029
R2(
)
3150
1728
V
REF
0.9V
1.5V
V
TM
1.8V
2.8V
CAPACITANCE
(1)
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
8
pF
C
OUT
Input/Output Capacitance
V
OUT
= 0V
10
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
R1
5 pF
Including
jig and
scope
R2
OUTPUT
VTM
R1
30 pF
Including
jig and
scope
R2
OUTPUT
VTM