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Электронный компонент: 99026

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Features
High to low side isolation of 1000V
Common-mode dv/dt immunity of greater than
50V/nanosecond
On-chip generated negative gate drive
Overcurrent protection by means of desaturation
detection
Under voltage lockout
Fault indication output for system diagnostic
Optimized power circuit layout
High side bootstrap supply
Sockets for freewheeling fast recovery diodes
(FREDS)
Flexibility of power level utilization
5V compatible HCMOS input logic with hysterisis
Protection from cross conduction of the half
bridge
Simple, fast and low cost means of evaluation
and design
Option for using IXDP630 with RC oscillator or
IXDP631 with crystal oscillator for improved dead
time accuracy.
Three phase operation with the ability to attach
additional slave driver boards.
First Release
Copyright IXYS CORPORATION 2003
Introduction
The EVBD4400 evaluation board implements a single
power phaseleg circuit on a double sided PCB with
ground plane, using the proven ISOSMART
TM
HALF
BRIDGE DRIVER CHIPSET - IXBD4410, IXBD4411,
IXDP630. The IXDP631 is optional. This board includes
all parts required for the circuit implementation so that
you can just follow the instructions in this document and
connect the board to the load and power. The kit
consists of an assembled and tested PCB with two
power devices.
Any power circuit is layout sensitive. The layout of this kit
is a proven, working layout. The designer is invited to
duplicate this layout in his system, following the evaluation
of the driver chipset.
Most systems vary in their power level requirements and
therefore the power devices used. Due to this fact and
fluctuations in availability of power devices, the kit will not
always include the same power devices. The designer is
encouraged to use the power devices that are required for
his system. The devices that are enclosed serve only for
initial evaluation.
DS99026A(07/03)
HALF BRIDGE DRIVER Evaluation Board
EVBD4400
Figure 1: EVBD4400 Assembled PC board
Figure 2: EVBD4400 PCB solder side
EVBD4400
Figure 3: EVBD4400 PCB Schematic
2
3
EVBD4400
ASSEMBLY:
Figure 3 is a complete schematic diagram of the board.
This schematic indicates an application using MOSFET's.
When IGBT are used, freewheeling diodes (D4&D5) are
typically added.
To assemble the kit, simply solder the MOSFET power
devices included or install devices specific to your appli-
cation. Note gate, drain, source orientation of power
devices when installing on the PC board.
NOTES:
a) The ICs and Power devices are static sensitive and
require special handling.
b) Use any power device that is suitable for your applica-
tion. The PCB was designed to accept devices with TO-
247 packages. Two IXYS power devices are included in
the kit with their data sheet. D4 and D5 are required only
if Q1 and Q2 are IGBTs, and thus are not included in your
kit. (A recommendation for D4 & D5 is in the Bill of
Materials). D6, D7 footprints provide a smaller package or
footprint option.
g) Dead time is provided by timing components R17, C22
and is fixed at roughly 2.5
. See IXDP630 data sheet for
calculation and modification of the dead time value.
c) Use any convenient method of interconnection at GND,
Q1-D, Q2-S,DC-BUS. The hole spacing is a standard
5.08mm and will fit common terminal blocks. (A recom-
mendation for a connector 'P2' that the PCB will accept is
in the Bill of Materials and is available from Digi-Key among
others).
d) For fault detection, R2 is pulled up to the supply voltage
of the front end logic. If the FLT (fault) signal is to be sensed
by TTL logic, remove R2 and connect FLT externally from
P1-5 to +5V through a pull up resistor.
e) For half bridge applications, insert a jumper between
Q1-D and Q2-S.
DATA SHEETS:
The following list provides direct web links for the IXYS
devices included with this kit. Please visit the IXYS web
site at www.ixys.com for a complete overview of the entire
IXYS product line.
IXTH 6N90 Power MOSFETS:
http://www.ixys.com/91543.pdf
IXDB4410/11 Half Bridge Driver Chip Set:
http://www.ixys.com/96528.pdf
IXDP630 Digital Dead Time Generator
http://www.ixys.com/98568.pdf
TX02-4400 Interface Transformer
http://www.ixys.com/99016.pdf
It is also possible to construct your own pulse transformers
from scratch using the guidelines presented in the discus-
sion located at http://www.ixys.com/t092702.pdf.
f) The gate resistors, R6 and R11, will depend on the power
device size that is used. Twenty two ohm resistors are
installed and should work for most applications.
4
EVBD4400
Bill of Materials
Reference Qty. Description
Mfr.
Part No.
U1
1
Low side gate driver I.C.
IXYS
IXBD4410PI
U2
1
High side gate driver I.C
IXYS
IXBD4411PI
U3
1
Dead time generator I.C. (IXDP631 optional)
IXYS
IXDP630
U4
1
5V regulator
National Semi.
LM78L05ACZ
D1
1
1A, 1000V high speed diode
ITS
BYT11-1000
U1, U2
2
16 pin socket
Assmann
A16-LC-TT
U3
1
18 pins socket
Assmann
A18-LC-TT
D2, D3
2
20V, 1A Shottky diode
Diodes Inc
1N5817
Q1, Q2
2
High voltage power device
IXYS
IXTH6N90
T1
1
Interface transformer
IXYS
TX02-4400PI
R1
1
10 ohm, 1/4 W resistor
R15, 16
2
4.7ohm, 1/4 W resistors
R3, 4, 6, 11
4
22 ohm, 1/4 W resistors
R5, 10
2
68 ohm, 1/4 W resistors
R7, 12
2
4.7k ohm, 1/4 W resistors
R2, 18, 19
3
10k ohm, 1/4 W resistor
R8, 9, 13, 14
4
510k ohm, 1 W resistors
R17
1
3k ohm, 1/4 W IXDP630 osc timing resistor
C22
1
82pF IXDP630 osc timing cap
C2,3,7,9,11,13, 21 7
.1mF, 50V, ceramic cap
Panasonic
C5, 6, 16,17,18,19 6
.022mF, 50V, cermaic cap
Panasonic
C8,12, 20
3
.01mF, 50V, ceramic cap
Panasonic
C1,4,10,14
4
10mF, 25V, alum elect cap
Panasonic
C15
1
.1mF, 1000V, ceramic cap
Sprague
10GAP10
P1
1
8 pin header (cut into a 8 pin header)
Berg
68000-236
JP1, JP2
2
2 pin header/ jumpers (cut into 2 pin headers) Berg
68000-236
NOT INCLUDED:
U3
1
Crystal based dead time generator
IXYS
IXDP631
D4, D5
2
12A, 1000V fast recovery diode
IXYS
DSEI12-10A
P2
1
4 pole terminal block
Altech Corp.
AKZ250/4
R17
1
1M ohm, 1/4 W IXDP631 osc load resistor
C22, 23
2
Crystal load capacitors, 22pF 50V ceramic
Panasonic
Y1
1
Crystal for IXDP631 operation
Pletronics
5
EVBD4400
OPERATION:
For performance evaluation and power
system design please note the following:
a) The assembled board can be ran with the
IXDP630/631 removed by applying comple-
mentary 5V square waves with proper "dead
time" to the input pins INL (P1-3) and INH (P1-
2).
For standard IXDP630 operation, R17
and C22 have been loaded with their respec-
tive values represented on the bill of materi-
als. These values are for demonstration and
may not be appropriate for your application.
Change values as needed. For IXDP631
operation, load R17, C22, C23 with the rec-
ommended load components as outlined in
the IXDP630/631 data sheet along with the
crystal at the frequency of choice. R17 and
C22 serve a dual purpose depending on
which dead timer is selected.
d) Figure 4 shows the load terminated at point
A. This point could be connected to a number of
places depending on the application. For ex-
ample: Connection to ground will test the high
side device. Connection to DC BUS will test the
low side device. It could also be connected to
the center point of a capacitive divider (UPS
systems).
e) Figure 5 shows a three phase power system
implementation with a load configured in a Y
(star). It could also be configured in a DELTA
configuration. Please note the grounding
scheme. Cut the connection between "ground
plane 2" and "ground plane 4" on the compo-
nents side of the PCB and solder a 10 Ohm
resistor between these ground planes. The GND
of each board is terminated to a single ground
point.
c) Before using the PCB at full power or at-
tempting a short circuit test, make sure that a
proper high voltage electroytic capacitor is
connected between DC BUS and GND as
shown in Figure 4. The leads to this capacitor
should be as short as possible to minimize any
stray inductance.
b) Be careful with ground connections.
Avoid ground loops. In general, connect the
grounds as shown in Figure 4 to minimize
ground bounce effects. This is particularly
important when three "High/Low side driver
design kits" are connected together with a
single IXDP630 to form a three phase drive
system, such as that shown in Figure 5.
To add phases 'S' and / or 'T', enable
phases with jumpers at JP1 and/or JP2 and
apply PWM phase drive signals to TP7 and/
or TP8 taking the respective complementary
outputs from TP3 through TP6. Note that
TP1-TP15 are through-hole pads that have
been added to the board to serve as conve-
nient solder and / or test points.
If additional 'slave' boards are to be
used for mutiple phase operation, R17 -
R19, C20 - C23, and Y1 do not need to be
installed on the addtional slave boards.
The IXDP630 is hardwired for phase
'R' operation, see 630/631 data sheet, with
pins OUTENA, ENAR, and RESET tied high.
PWM drive input signal for ' R' phase is
applied to P1-6.
6
EVBD4400
Figure 5: Three Phase Configuration with Dead Time Generator
GND
C3
R1
C2
C1
+
Figure 4: Dead Time Generator & Load Termination
GND
C3
R1
C2
(Optional R2 pullup
configuration for 5V logic)
+
C1
A
7
EVBD4400
FLT Reset
Vcc
Vcc
(From FLT)(n.h.)
10K
10K
.01uF
.01uF
To Eval bd INH
To Eval bd INL
INH
INL
1
2
3
4
5
6
9
10
8
12
13
11
1 2
3 4
74HC00 1/4
74HC00 2/4
74HC00 3/4
74HC00 4/4
74HC04 1/6
74HC04 2/6
In Figures 4 & 5, the schematic assumes the de-
signer will be using some type of external control system
for starting the circuit and/or reseting the circuit in the
event a fault occures. As an alternative, Figure 6
demonstrates a simple and inexpensive Start/Reset logic
circuit for manually implementing fault protection.
With the addition of High Current MOSFET Drivers on
the outputs, the IXBD4410/11's typical 2A Peak Output
Current capability can be "boosted" to drive the latest
IXYS MOSFETS & IGBT's.
Figure 6: Simple Fault Protection Logic Circuit
Figure 6 shows the addition of two IXDD414's.
These are CMOS high-speed MOSFET drivers that
have a 14A Peak Output Drive Capability, allowing the
4410/11 chipset to drive a pair of IXFK90N20Q 90A/
200V Power Mosfets. (The 2 ohm gate resistors
shown should be Non-Inductive High Performance Film
resistors such at those available from Caddock. Par-
ticular attention also needs to be paid to Suppy By-
passing, Grounding, and minimizing the Output Lead
Inductance when designing such a high power circuit
layout).
8
EVBD4400
15
14
16
4410
OUT
Vdd
Vee
2
3
8,1
5,4
414
+
10F
2
S
G
D
IXFK90N20Q
15
14
16
4411
OUT
Vdd
Vee
2
3
8,1
5,4
414
+
10F
2
S
G
D
IXFK90N20Q
Figure 7: Boosting the 4410/11 outputs for larger MOSFETs.