Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE80068S
HE80000 SERIES
25 APR 2002
1 of 7
V1.0
A. HE80068S Introduction
HE80068S is a 8-bit CMOS micro-controller. This chip is a Power Speech Controller. It built-in
one 7-bit D/A converter and one PWM output module to provide a speech output interfaces. Use
the built-in 208K ROM can store around 68 seconds of speech data (6KHz sampling rate
ADPCM). To simply the function of this IC, the functions removed are Slow Clock, Internal
Power-On Reset, Timer2, and Watch-dig Timer. Please note.
The HE80068S provides a very simple and effective instruction set, each instruction byte
occupies only 1.5 clock cycle time, therefore, and it is suitable to apply in the high performance
systems.
B. HE80068S Features
!
Operating Voltage:
2.4V 5.2V
!
Operation frequency Range:
DC ~ 8MHz @ 5.0V
DC ~ 4MHz @ 2.4V
!
ROM size:
208K Bytes (16K PROM+192K DROM (10000h))
!
RAM size:
128 Bytes
!
Clock
:
Normal(Fast) clock:
32.768K ~ 8MHz
!
Operating Mode:
FASTSLEEP
!
8 bi-directional I/O pins, PUSH-PULL or OPEN DRAIN output selected by mask option
!
Built-in a PWM output circuit
!
Provides one internal and two external interrupt
!
Provides one 16-bit timer (Timer 1: Clock Source generated by Fast Clock)
!
Instruction Set: 32 Instructions, 4 types of Addressing Mode, 2 individual Pointer for ROM
(18-bit) and RAM (8-bit) table access.
C.HE80068S Application
!
Power Speech Controller provides around 68 seconds of speech time
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE80068S
HE80000 SERIES
25 APR 2002
2 of 7
V1.0
D. Pin Assignment
Pin
Pin Name
I/O
Function
Description
4
3
FXI,
FXO
B,
O
External Fast Clock pin.
Connecting to crystal or
RC to generate 32.768KHz
~ 8MHz frequency.
Mask Option settings :
MO_FXTAL=0R,C oscillation for Fast Clock
1Crystal oscillation for Fast Clock
User can use OP1and OP2 to change operation mode
between Normal and Sleep.
2
RSTP_N
I
System Reset .
Level trigger, active low. For let system reset.
5
TSTP_P
I
Test Pin.
Please bond this pin and add a test point on PCB for
debugging. Leave this pin floating is OK.
7.14 PRTD[7:0]
B
8-pin bi-directional I/O
port. PTRD[7..2] as wake-
up pin. PRTD[7..6] as
external interrupt pin.
Mask Option
MO_DPP[7:0] =1 : ~ Push-pull
0 : ~ Open-drain
Output must be "1" before reading whenever use the as
input (No tri-state structure).
1
VO
O
DAC voice output
Set the bit1 (DA=1) of VOC register to turn on DAC
with VO output.
6
VDD
P
Positive Power Input
15
GND
P
Power Ground Input
17
GND_PWM P
PWM Dedicated GND
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE80068S
HE80000 SERIES
25 APR 2002
3 of 7
V1.0
E. Pin Diagram
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE80068S
HE80000 SERIES
25 APR 2002
4 of 7
V1.0
F. Bonding Pad Location
PIN
Number
PIN
Name
X
Coordinate
Y
Coordinate
1
VO
X= 1171.70 Y= -129.35
2
RSTP_N
X= 1171.70 Y= -13.45
3
FXO
X= 1171.70 Y= 102.45
4
FXI
X= 1171.70 Y= 218.35
5
TSTP_P
X= 1171.70 Y= 334.25
6
VDD
X= 1171.70 Y= 450.15
7
PRTD[7]
X= 1171.70 Y= 566.05
8
PRTD[6]
X= 1171.70 Y= 681.95
9
PRTD[5]
X= 1171.70 Y= 797.85
10
PRTD[4]
X= -349.45
Y= 965.45
11
PRTD[3]
X= -465.35
Y= 965.45
12
PRTD[2]
X= -581.25
Y= 965.45
13
PRTD[1]
X= -697.15
Y= 965.45
14
PRTD[0]
X= -813.05
Y= 965.45
15
PWM
X= -937.35
Y= 965.45
16
GND_PWM
X= -1061.35 Y= 965.45
17
GND
X= -1177.25 Y= 965.45
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE80068S
HE80000 SERIES
25 APR 2002
5 of 7
V1.0
G. Electrical Characteristics
Absolute Maximum Rating
Item
Sym.
Rating
Condition
Supply Voltage
V
dd
-0.5V ~ 8V
Input Voltage
V
in
-0.5V ~ V
dd
+0.5V
Output Voltage
V
o
-0.5V ~ V
dd
+0.5V
Operating Temperature
T
op
0
0
C ~ 70
0
C
Storage Temperature
T
st
-50
0
C ~ 100
0
C
Recommended Operating Conditions
Item
Sym.
Rating
Condition
Supply Voltage
V
dd
2.4V ~ 5.2V
V
ih
0.9 V
dd
~ V
dd
Input Voltage
V
il
0.0V ~ 0.1V
dd
8MHz
V
dd
=5.0V
Operating Frequency
Fmax
4MHz
V
dd
=2.4V
Operating Temperature
T
op
0
0
C ~ 70
0
C
Storage Temperature
T
st
-50
0
C ~ 100
0
C
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE80068S
HE80000 SERIES
25 APR 2002
6 of 7
V1.0
:TEMP=25, VDD=3V+/-10%, GND=0V
PARAMETER
CONDITION
MIN TYP MA
X
UNIT
I
Fast
NORMAL Mode Current System
2M ext. R/C
0.75
1
mA
I
Sleep
Sleep Mode Current
System
1
A
I
oLPW
M
PWM
Output Sink Current
PWM
*2
V
DD
=3V: V
oL
=1V
40
60
mA
I
oVO
DAC Output Current
VO
V
DD
=3V;VO=0~2V,Data=
7F
2.5
3
mA
V
iH
Input High Voltage
I/O pins
0.8
V
DD
V
V
iL
Input Low Voltage
I/O pins
0.2
V
DD
V
V
hys
Input Hysteresis Width
I/O, RSTP_N
Threshold=2/3V
DD
(input
from low to high)
Threshold=1/3V
DD
(input
from high to low)
1/3
V
DD
V
I
oH
Output Drive Current
I/O pull-high
*1
V
oL
=2.0V
50
A
I
oL 1
Output Sink Current
I/O pull-low
*1
V
oL
=0.4V
1.0
mA
I
iL_1
Input Low Current
RSTP_N
V
iL
=GND, pull high
Internally
20
A
I
iL_2
Input Low Current
I/O
V
iL
=GND, if pull high
Internally by user
100
A
Note:
*1: Drive Current Spec. for Push-Pull I/O port only
Sink Current Spec. for both Push-Pull and Open-Drain I/O port.
*2: This Spec. base on one driver only. There are five build-in driver, so user just
multiply the number of driver he used to one driver current
to get the total amount of current.( I
oHPWM
I
oLPWM
* N; N=0,1,2,3,4,5)
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE80068S
HE80000 SERIES
25 APR 2002
7 of 7
V1.0
H. Application Circuit
I. Important Note
For accessing any address large than 64KB, users must update TPP first, TPH then TPL. Only by
this order, the pre-charge circuit of ROM will work correctly. 5us waiting is necessary before LDV
instruction is executed since Data ROM is a low speed ROM. Users can not emulate this
accessing process in ICE. So 5us delay should be added by firmware.
64KB TP Update r_tpp, r_tph, r_tpl
. Data ROM pre-charge , pre-charge
5us,, ICE
Data ROM
Please bonds the TSTP_P, RSTP_N and PRTD[7:0] with test point on PCB (can be soldered and
probed) as you can, then JESS can do some IC testing job on PCB. Neither VDD nor GND
connection is necessary for TSTP_P. The following figure is an example (Testing point with
through hole.)
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