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Электронный компонент: HE83115

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Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE8P160
HE80000 SERIES
27 Mar 02
1 of 13
Preliminary V1.12
A. HE8P160 Introduction
HE8P160 is a member of 8-bit Micro-controller OTP series product developed by Jess
Technology Co., Ltd. This IC use OTP(One Time Programming) ROM, which can be wrote by
the writer tool provided by Jess. It can provides fast verification, pilot-run product, and provide
more versatile application request to user. HE8P160 is a super-set of seven IC body( HE80012S,
HE80016S, HE80021S, HE83000, HE80012M, HE80016M, HE80021M, HE83115, HE83116,
HE89A21, HE89R21 )and internal build in 8 channel 12-bit ADC block. If user want to simulate
any one of the seven IC body, The writer tool will automatically restrict the hardware resource,
such as ROM - RAM size, it is very convenient to use.
This IC has build-in LCD driver which have many configuration and can use Mask Option to
select the configuration, such as128 pixel LCD driver + 16 Bit I/O Port... 64 pixel LCD
driver + 32Bit I/O Port. Build-in voltage regulator let LCD display stable when external battery
voltage drop. The built-in OP operation amplifier can be used with (light, voice - temperature,
humility) sensor and used as battery low detection. The 7-bit current-type D/A converter and
PWM device provide the complete speech output mechanism.
The instruction set of HE8P160 are quite easy to learn and simple to use. Only about thirty
instructions with four-type addressing mode are provided. Most of instructions take 3 oscillator
clocks (machine cycles). The processing power is enough to most of battery operation system.
B. HE8P160 Features
!
Operation Voltage:
2.4V- 5.2V
!
System Clock:
DC ~ 8MHz @ 5.2V
DC ~ 4MHz @ 2.4V
!
Internal ROM:
64K Bytes ( 64K Program ROM )
!
Internal RAM:
512 Bytes.
!
Dual Clock System
Normal (Fast) clock:
32.768K - 8MHz
Slow clock: 32.768KHz
!
Operation Mode:
DUAL, FAST' SLOW' IDLE, SLEEP Mode.
!
Build - in WDT (WATCH DOG TIMER) to prevent deadlock or abnormal condition..
!
16~32 bit Bi-directional I/O port. Mask Option can select PUSH-PULL or OPEN DRAIN
output mode for each I/O pin. The I/O PRTD [3:0] each has 5mA sink capability.
!
Build - in OP amplifier. This OP operating range between 0~(VDD-1) , that is different from
previous OP comparator operating range between 0.8-VDD, the user should notice this.
Please set the operation range on 0.8~(VDD-1) if user want to design a circuit working both
on 8P160 and target IC.
!
Build-in 125KHz, 8-channel 12-bit ADC block.
!
Build-in voltage regulator which provide LCD stable operating voltage.
!
4 COM*32 SEG LCD driver which have A,B type. Voltage regulator circuit, please reference
application circuit. The LCD highest voltage LV3 must less than 9.0 V.
!
Contain a 7-bit Current-type D/A converter.
!
Provide PWM output device( Users can select with or without Rate Selection, connect with
" VDD + PWM " or " PWMP + PWMN " )
!
Two external interrupts and three internal timer interrupts.
!
Two 16-bit timer and one Time Base timer.
!
Instruction set:
32 instructions, 4 addressing mode. 9-bit DATA POINTER for RAM and
16-bit TABLE POINTER for ROM.
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE8P160
HE80000 SERIES
27 Mar 02
2 of 13
Preliminary V1.12
C. Mask Option Comparison Table
When user use JESS writer (include application software & hardware) to write data to OTP, the
user can select specific IC from software application, in the mean time, the JESS writer will set
all the configuration automatically. The following table describe the configuration relative setting,
if user want to use HE8P160 full function setting, please reference following setting.
NAME
Description
80012S
80016S
80021S
83000
80012M
80016M
80021M
83115
83116
89A21
89R21
0: TP not changed at LDV
MO_LDVINC
1: TP++ at LDV
User
1
1
1
1
1
1
0: internal fast OSC
MO_FOSCE
1: external fast OSC, use it now
1
User
User
User
User
User
User
0: R/C osc. For fast clock
MO_FXTAL
1: X'tal osc. For fast clock
User
User
User
User
User
User
User
000: RFRC_I~=500K
001: RFRC_I~=1M
010: RFRC_I~=1.5M
011: RFRC_I~=2M
100: RFRC_I~=2.5M
101: RFRC_I~=3M
110: RFRC_I~=3.5M
MO_FRCI_S[2:0]
111: RFRC_I~=4M
000:
not
exist
User
User
User
User
User
User
0: R/C osc. For 32K clock
MO_SXTAL
1: X'tal osc. For 32K clock
0: not
exist
User
User
User
User
User
User
00: slow clock only
01: illeagal
10: dual clock
MO_FCK/SCKN
11: fast clock only
11
User
User
User
User
User
User
0: WDT disable
MO_WDTE
1: WDT enable
0
User
User
User
User
User
User
0: open-drain output
MO_CPP[7:4]
1: push-pull output
1
1
User
1
User
User
User
0: open-drain output
MO_CPP[3:0]
1: push-pull output
1
User
User
User
User
User
User
0: open-drain output
MO_DPP[7:0]
1: push-pull output
User
User
User
User
User
User
User
0: open-drain output
MO_14PP[7:0]
1: push-pull output
1
1
1
User
1
User
User
0: open-drain output
MO_15PP[7:0]
1: push-pull output
1
1
1
1
1
User
User
0: IO pin
MO_LIO14[7:0]
1: LCD pin
0
0
0
User
1
User
User
0: IO pin
MO_LIO15[7:0]
1: LCD pin
0
0
0
0
1
User
User
0: DTMF clock source 3.58 MHz
MO_DTMFSCK
1: DTMF clock source 32768 Hz
0
0
0
0
0
User
User
0: LCD regulator disable
MO_LVRG
1: LCD rgulator enable
0
0
0
0
0
0
User
0: IO pin
0
0
0
0
0
0
MO_PRTC_ADC[7:0]
1: ADC input
0
0: 2mA IoL
MO_PRTD_HIC[3:0]
1: 5mA IoL
0
0
0
0
0
0
0
0: OTP read protect
MO_PROTECTN
1: OTP not protect
User
User
User
User
User
User
User
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE8P160
HE80000 SERIES
27 Mar 02
3 of 13
Preliminary V1.12
00: ROM 4k byte
01: ROM 8k byte
10: ROM 16k byte
MO_ROM[1:0]
11: ROM 64k byte
11
00
11
11
11
10
10
00: RAM 64 byte
01: RAM 128 byte
10: RAM 256 byte
MO_RAM[1:0]
11: RAM 512 byte
01
00
01
10
10
11
11
0: TC2 not exist
MO_TC2
1: TC2 exist
0
1
1
1
1
1
1
0: TB not exist
MO_TB
1: TB exist
0
0
0
0
0
1
1
00: prt0C not exist
01: only prt0C[3:0] exist
10: only prt0C[7:4] exist
MO_PRT0C[1:0]
11: prt0C exist
00
01
11
01
11
11
11
0: prt14 not exist
MO_PRT14
1: prt14 exist
0
0
0
1
0
1
1
0: prt15 not exist
MO_PRT15
1: prt15 exist
0
0
0
0
0
1
1
0: prt14[7:0]=SEG[19:12]
MO_PRT14_SS
1: prt14[7:0]=SEG[23:16]
0
0
0
0
1
1
1
0: LCD not exist
MO_LCD
1: LCD exist
0
0
0
1
1
1
1
00: PWM not exist
01: PWM logic
10: PWM1 logic
MO_PWM[1:0]
11: PWM not exist
10
00
10
10
01
00
00
0: PWMP/PWMN output
MO_PMD
1: PWM/GND_PWM output
1
0
0
0
0
0
0
0: DAC not exist
MO_VO
1: DAC exist
1
0
1
1
1
0
0
0: Opamp not exist
MO_OPAMP
1: Opamp exist
0
1
1
1
1
0
0
0: DTMF not exist
MO_DTMF
1: DTMF exist
0
0
0
0
0
1
1
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE8P160
HE80000 SERIES
27 Mar 02
4 of 13
Preliminary V1.12
D. Pin Description
Pin
Pin-Name
I/O
Function
Description
52,
51
FXI,
FXO
B,
O
External fast clock pin.
Connection to crystal or RC to
generate 32.768 kHz ~ 8MHz
frequency.
55,
54
SXI,
SXO
I,
O
External slow clock pin.
Connecting with 32768 Hz crystal
or resistor as slow clock and
providing clock source for LCD
display, TIMER 1, Time-Base and
other internal blocks.
Mask Option setting
MO_FCKSCKN = 00: Slow clock only
0l: Illegal
10: Dual Clock
11: Fast Clock only
MO_FOSCE = 0Internal fast osc.
1External fast osc.
MO_FXTAL = 0RC osc. for fast clock
= 1X'tal osc. for fast clock
MO_SXTAL = 0RC for 32.768 Hz clock
=1 : X'tal for 32.768 Hz clock
Use OP1 and OP2 to switch among different
operation mode ( NORMAL , SLOW , IDEL and
SLEEP ). In Dual Clock mode, the main system
clock is still the Fast Clock. The 32768 Hz clock
is for LCD and Timer 1 only.
50
RSTP_N
I
System Reset
Level trigger, active low. Except for using this
pin, using mask option (MO_PORE=1) could
enable IC build-in Power-on reset circuit.
Besides , MO_WDTE can set Watch Dog Timer:
MO_WDTE = 0Disable Watch Dog Timer
= 1Enable Watch Dog Timer
53
TSTP_P
I
Test Pin , active high.
Please bond this pin and add a test point on PCB
for debugging. Leave this pin floating is OK.
82,83,
1..6
PRTC[7:0]
/ADC[7:0];
B
Port C bi-directional I/O pin total
8 pin or ADC [ 7 : 0 ] can used as
8-channel ADC Data Input Pin .
Mask Options :
MO_CPP [7..0] = 1 ~ Push-pull
= 0 ~ Open-drain
when use them as input (No tri-state structure), it
must Output " 1 " before reading.
70..77
PRTD[7:0]
B
8-pin bi-directional I/O port,
PRTD[7..2] as wake-up pin.
PRTD[7..6] as external interrupt
pin.
Mask Options :
MO_DPP [7..0] = l ~ Push-pull
= 0 ~ Open-drain
when use them as input (No tri-state structure), it
must Output " 1 " before reading
16..23
PRT14[7:0]
/SEG[23:16]
B/
O
8-pin bi-directional I/O port that is
shared with LCD segment pin.
Mask Options :
MO_LIO14 [7..0] = l ~ LCD Pin.
= 0 ~ I/O Pin.
MO_14PP [7..0] = l ~ Push-pull
= 0 ~ Open-drain
when use them as input (No tri-state structure), it
must Output " 1 " before reading
8..15
PRT15[7:0]
/SEG[31:24]
B/
O
8-pin bi-directional I/O port that is
shared with LCD segment pin.
Mask Options :
MO_LIO15 [7..0] = l ~ LCD Pin.
= 0 ~ I/O Pin.
MO_15PP [7..0] = l ~ Push-pull
= 0 ~ Open-drain
Output must be " 1 " before reading whenever
use them as input (No tri-state structure).
Suites 2202-7, Tower 6, The Gateway,
9 Canton Road, Tsimshatsui,
Kowloon, Hong Kong
Tel: (852) 2123 3289 Fax: (852) 2123 3393
E-mail: sales@jesstech.com
Home Page: www.jesstech.com
HE8P160
HE80000 SERIES
27 Mar 02
5 of 13
Preliminary V1.12
40..43
COM[3:0]
O
LCD COMmon Output
Please reference LCD and RAM map.
24..31
SEG[15:8]/D[7:0]
O
LCD segment Output / OTP
writing pin
32
SEG[7]/SDO
O
Segment / OTP writing pin
33
SEG[6]/SDI
O
Segment / OTP writing pin
34
SEG[5]/SCLK
O
Segment / OTP writing pin
35
SEG[4]/D_CN
O
SegmentOTP writing pin
36
SEG[3]/R_WN
O
Segment / OTP writing pin
37
SEG[2]/P_SN
O
Segment / OTP writing pin
These are LCD segment and OTP Writer share
pin , User Must refer standard interface to arrange
these pins on PCB board, let JESS writer can
write data to OTP . These Pins are LCD segment
pin on normal mode.
38,39
SEG[1:0]
O
LCD Segment Output
45
LC2
B
Charge Pump Switch l
44
LC1
B
Charge Pump Switch2
48
LV3
B
Charge Pump V3
47
LV2
B
Charge Pump V2
46
LV1
B
Charge Pump V1
Refer Application circuit.
63
PWM
O
The PWM output can drive
speaker or buzzer directly.
Set VOC register's Bit2PWM=l ; turn on
PWM
65
PWMP
O
The PWM positive output can
drive speaker or buzzer directly.
Set VOC register's Bit2PWM =1 ; turn on
PWM
64
PWMN
O
The PWM negative output can
drive speaker or buzzer directly.
Set VOC register's Bit2PWM=1 ; turn on
PWM
69
VO
O
D/A voice output.
Set VOC register's Bit lDA=1 ; turn on VO
67
OPIN
I
Negative input of OP comparator
68
OPIP
I
Positive input of OP comparator
66
OPO
O
OPAM output pin
Set the bit0 (OP = 1) of VOC register to turn on
OP comparator. The operating range between
0~(VDD-1)
59
DTMFO
O
DTMF Output
Through Portl2can turn on /off DTMF& write
data
Use Mask Option MO_DTMFSCK set
clock source :
MO_DTMFSCK = 0 ; Clock Source=3.579545
MHz
= l ; Clock Source=32768 Hz
58
MUTE
O
MUTE Output for Dialer
Through Port12can turn on/off MUTE
60
SDO
O
SDO for Dialer Application
Through Portl2can turn on/off SDO & write
data
61
KEYTONE
O
1024Hz 50Duty Square Wave
Through Ponl2can turn on/off KEYTONE
57
LOADER
I
Define Loader Mode
Not open for users
78
VREFP
I
ADC positive Voltage reference
Tie this pin to reference Input1V to VDDA
79
VREFN
I
ADC negative voltage reference
Tie this pin to VSSA
56
VDD
P
Digital Positive Power
49
GND
P
Digital Power Ground
81
VDDA
P
Analog Positive Power
80
VSSA
P
Analog Power Ground
7
VPP
P
OTP high voltage power
62
GND_PWM
P
Dedicated GND for PWM
Adding 0.1
F capacitor as by-pass Capacitor on
each set is necessary.
VDDA and VSSA must always tie to high and
low.