HE8P1700A
Page 1
Version .16
HE8P1700A SERIES TARGET SPECIFICATION
1.
GENERAL DESCRIPTION
.................................................................................................................................................... 4
2.
FEATURES
............................................................................................................................................................................... 4
3.
PAD ASSIGNMENT
................................................................................................................................................................. 5
4.
BLOCK DIAGRAM
................................................................................................................................................................. 8
4.1
PIN DESCRIPTION
.......................................................................................................................................................... 9
5.
PROGRAM MEMORY (ROM)
.............................................................................................................................................. 9
6.
DATA MEMORY (RAM)
...................................................................................................................................................... 10
6.1
RAM BANK LOCATION
.............................................................................................................................................. 10
6.2
RAM BANK SELECTION
............................................................................................................................................. 10
6.3
SYSTEM REGISTER ARRANGEMENT (BANK 0)
.................................................................................................... 10
7.
ACCUMULATOR
.................................................................................................................................................................. 13
7.1
CARRY FLAG
................................................................................................................................................................ 13
7.2
DECIMAL CARRY FLAG
............................................................................................................................................. 13
7.3
ZERO FLAG
................................................................................................................................................................... 13
8.
WORKING REGISTERS
...................................................................................................................................................... 13
8.1
H, L REGISTERS
........................................................................................................................................................... 13
8.2
Y, Z REGISTERS
........................................................................................................................................................... 14
8.3
LOOK-UP TABLE
.......................................................................................................................................................... 14
8.4
ADDRESSING MODE
................................................................................................................................................... 14
9.
PROGRAM COUNTER
......................................................................................................................................................... 15
9.1
ONE ADDRESS SKIPPING
........................................................................................................................................... 15
9.2
MULTI-ADDRESS JUMPING
....................................................................................................................................... 15
10.
STACK BUFFER
............................................................................................................................................................... 16
10.1
ACC & WORKING REGISTERS PROTECTION
........................................................................................................ 16
11.
OSCILLATOR
................................................................................................................................................................... 17
11.1
OSCM REGISTER
.......................................................................................................................................................... 17
11.2
INTERNAL LOW CLOCK
............................................................................................................................................ 18
HE8P1700A
Page 2
Version .16
11.3
HIGH-LOW CLOCK EXCHANGE
............................................................................................................................... 18
11.4
0.5 SECOND RESTART FUNCTION
........................................................................................................................... 19
12.
GTMR PRESCALER
........................................................................................................................................................ 19
12.1
WARMUP TIME
............................................................................................................................................................ 19
12.2
WATCH DOG (WDOG) TIMER
................................................................................................................................... 20
13.
BASIC TIMER ( T0 )
......................................................................................................................................................... 21
13.1
T0M MODE REGISTER
................................................................................................................................................ 21
13.2
T0C COUNTING REGISTER
........................................................................................................................................ 21
14.
TIMER/EVENT COUNTER (TC0)
................................................................................................................................. 22
14.1
TC0M MODE REGISTER
.............................................................................................................................................. 22
14.2
TC0C COUNTING REGISTER
..................................................................................................................................... 23
14.3
TC0R AUTO-LOAD REGISTER
................................................................................................................................... 23
14.4
PWM0 FUNCTION DESCRIPTION
............................................................................................................................. 23
15.
TIMER/EVENT COUNTER (TC1)
................................................................................................................................. 24
15.1
TC1M MODE REGISTER
.............................................................................................................................................. 24
15.2
TC1C COUNTING REGISTER
..................................................................................................................................... 25
15.3
TC1R AUTO-LOAD REGISTER
................................................................................................................................... 25
15.4
PWM1 FUNCTION DESCRIPTION
............................................................................................................................. 25
16.
SERIAL INPUT/OUTPUT TRANSCEIVER (SIO)
....................................................................................................... 26
16.1
SIOM MODE REGISTER
.............................................................................................................................................. 26
16.2
SIOB/SIOR DATA BUFFER
.......................................................................................................................................... 26
17.
INTERRUPT
...................................................................................................................................................................... 27
17.1
INTEN INTERRUPT ENABLE REGISTER
................................................................................................................. 27
17.2
INTRQ INTERRUPT REQUEST REGISTER
............................................................................................................... 27
18.
I/O PORT
............................................................................................................................................................................ 28
18.1
PORT 1 WAKEUP (P1W) REGISTER
.......................................................................................................................... 28
18.2
PULL-UP RESISTOR (P
N
UR) REGISTER
................................................................................................................... 29
18.3
PORT MODE (P
N
M) REGISTER
.................................................................................................................................. 29
18.4
PORT (P
N
) DATA REGISTER
....................................................................................................................................... 29
19.
8-CHANNEL ANALOG TO DIGITAL CONVERTER
................................................................................................. 29
19.1
ADM REGISTER
............................................................................................................................................................ 29
19.2
ADB & ADR REGISTERS
............................................................................................................................................. 29
19.3
ADC TEST MODE
......................................................................................................................................................... 30
20.
7-BIT DIGITAL TO ANALOG CONVERTER
.............................................................................................................. 30
HE8P1700A
Page 3
Version .16
21.
ABSOLUTE MAXIMUM RATING
................................................................................................................................. 32
22.
ELECTRICAL CHARACTERISTIC
.............................................................................................................................. 32
22.1
HE8P1700A
SERIES OTP OSCILLATOR FREQUENCY
VS
. OPERATING VOLTAGE GRAPH
........................... 33
23.INSTRUCTION SET
.................................................................................................................................................................. 34
24.PACKAGE INFORMATION
.................................................................................................................................................... 35
HE8P1700A
Page 4
Version .16
HE8P1700A 8-bit microcontroller with 8-bit ADC circuit
1. GENERAL DESCRIPTION
he HE8P1700A is an 8-bit micro-controller utilized with CMOS technology fabrication and featured with low power
consumption and high performance by its unique electronic structure. This chip is designed with the excellent IC structure,
including the program memory up to 4K-word OTP ROM, 256 bytes of the data memory, one 8-bit T0 basic timer, two 8-bit
timer/event counters, a watchdog timer, seven interrupt sources (T0, TC0, TC1, SIO, INT0 ~ INT2), an 8-ch ADC converter with 8
bits resolution, a 7-bit DAC converter, 2-ch PWM output, 33 I/O pins and 8 levels stack buffer. Besides, the user can choose
desired oscillator configurations for the controller. There are four oscillator configurations to select for generating system clock,
including Hi/Low Speed crystal, ceramic resonator or cost-saving RC.
2. FEATURES
Memory configuration Seven interrupt sources:
OTP ROM size: 4096 * 16 bits. Four internal interrupts: TO, TC0, TC1, SIO
RAM size: 256 * 8 bits. Three external interrupts: 1NT0 - INT2
I/Opin configuration (Total 33 pins) Eight levels stack buffer
One input port: 3 pins with wakeup function. An 8-channel ADC converter with 12-bit resolution.
Three Input/output ports: 22 pins for general purpose. A DAC converter with 7 bits resolution.
One input/output port: 8 pins shared with ADC inputs. Two 8-bit PWM output (PWM0,PWM1)
An 8-bit basic timer. Two Buzzer output (TC0,TC1)
Two 8-bit timer/event counters. A watchdog timer.
Built-in internal RC Low Clock 16KHz
59 powerful instructions Crystal type: speed up to 20 MHz.
All of instructions are 1 word with 1 or 2 cycles' execution. RC type: speed up to 10MHz.
Execution time: One cycle uses 4 clocks of oscillator.
All ROM area JMP instruction. Package:
All ROM area Subroutine CALL instruction. PDIP48, SSOP48
All ROM area lookup table function. (MOVC instruction) QFP44
PDIP40
MUL instruction for arithmetic multiplication. SKDIP28
SOP28
SSOP20
PDIP 18
SOP18
SN8P1702:
Memory configuration Two interrupt sources:
OTP ROM size: 1024 * 16 bits. One internal interrupts: TC0
RAM size: 64 * 8 bits. One external interrupts: INT0
I/O pin configuration (Total 12 pins) Eight levels stack buffer
One input port: 1 pins with wakeup function. An 4-channel ADC converter with 12-bit resolution.
Two Input/output ports: 7 pins for general purpose.
One input/output port: 4 pins shared with ADC inputs. One 8-bit PWM output (PWM0)
One Buzzer output (TC0)
An 8-bit timer/event counters. A watchdog timer.
Built-in internal RC Low Clock 16KHz
59powerful instructions Crystal type: speed up to 20 MHz.
All of instructions are 1 word with 1 or 2 cycles' execution. RC type:speed up to 10MHz.
Execution time: One cycle uses 4 clocks of oscillator.
Package:
All ROM area JMP instruction.
SSOP20
All ROM area Subroutine CALL instruction.
PDIP 18
All ROM area lookup table function. (MOVC instruction)
SOP18
T
HE8P1700A
Page 5
Version .16
3. PAD ASSIGNMENT
4 8 P I N
P 2 . 5
1
U
4 8 P 2 . 4
P 2 . 6
2
4 7 P 5 . 0 / S C K
P 2 . 7
3
4 6 P 5 . 1 / S I
V S S
4
4 5 P 5 . 2 / S O
V S S
5
4 4 P 5 . 3 / T C 1 / P W M 1
X O U T
6
4 3 V S S
X I N
7
4 2 P 5 . 4 / T C 0 / P W M 0
V P P
8
4 1 P 5 . 5
P 0 . 0 / I N T 0
9
4 0 P 5 . 6
P 0 . 1 / I N T 1 1 0
3 9 P 5 . 7
P 0 . 2 / I N T 2 1 1
3 8 D A O
R S T 1 2
3 7 V D D
P 1 . 5 1 3
3 6 A V D D
P 1 . 4 1 4
3 5 A V R E F
P 1 . 3 1 5
3 4 P 4 . 0 / A I N 0
V D D 1 6
3 3 P 4 . 1 / A I N 1
V S S 1 7
3 2 P 4 . 2 / A I N 2
P 1 . 2 1 8
3 1 P 4 . 3 / A I N 3
P 1 . 1 1 9
3 0 P 4 . 4 / A I N 4
P 1 . 0 2 0
2 9 P 4 . 5 / A I N 5
P 2 . 0 2 1
2 8 P 4 . 6 / A I N 6
P 2 . 1 2 2
2 7 P 4 . 7 / A I N 7
P 2 . 2 2 3
2 6 A V S S
P 2 . 3 2 4
2 5 V S S
H E 8 P 1 7 0 8 A P
H E 8 P 1 7 0 8 A X
X : S S O P
4 4 P I N
XIN
XOUT
VSS
P2.7
P2.6
P2.5
P2.4
P5.0/SCK
P5.1/SI
P5.2/SO
P5.3/TC1/PWM1
4 4 4 3 4 2 4 1 4 0 3 9 3 8 3 7 3 6 3 5 3 4
V P P 1
O
3 3 P 5 . 4 / T C 0 / P W M 0
P 0 . 0 / I N T 0 2
3 2 P 5 . 5
P 0 . 1 / I N T 1 3
3 1 P 5 . 6
P 0 . 2 / I N T 2 4
3 0 P 5 . 7
R S T 5
2 9 D A O
P 1 . 5 6
H E 8 P 1 7 0 7 A Q
2 8 V D D
P 1 . 4 7
2 7 A V R E F
P 1 . 3 8
2 6 P 4 . 0 / A I N 0
V D D 9
2 5 P 4 . 1 / A I N 1
P 1 . 2 1 0
2 4 P 4 . 2 / A I N 2
P 1 . 1 1 1
2 3 P 4 . 3 / A I N 3
1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2
P1.0
P2.0
P2.1
P2.2
P2.3
VSS
AVSS
P4.7/AIN7
P4.6/AIN6
P4.5/AIN5
P4.4/AIN4