KING BILLION ELECTRONICS CO., LTD
HE84G763
HE80004 Series
June 30, 2003
1
V1.01
This specification is subject to change without notice. Please contact sales person for the latest version before use.
- Table of Contents -
1.
General Description ___________________________________________________________________3
2.
Features _____________________________________________________________________________3
3.
Functional Block Diagram______________________________________________________________4
4.
Pin Description _______________________________________________________________________4
5.
ROM Map Configurations______________________________________________________________6
6.
External RAM/Flash Memory___________________________________________________________9
7.
LCD Display RAM Map ______________________________________________________________10
8.
LCD driver configurations_____________________________________________________________12
8.1.
16 Gray Scale LCD Display RAM Map ________________________________________________13
8.2.
4 Gray Scale LCD Display RAM Map _________________________________________________18
8.3.
Black and White LCD Display RAM Map______________________________________________21
9.
LCD Power Supply___________________________________________________________________24
10.
LCDC Control register _____________________________________________________________25
11.
Oscillators ________________________________________________________________________26
12.
General Purpose I/O _______________________________________________________________27
13.
Timer1 ___________________________________________________________________________29
14.
Timer2 ___________________________________________________________________________30
15.
Time Base ________________________________________________________________________31
16.
Watch Dog Timer __________________________________________________________________32
17.
Voice Output ______________________________________________________________________33
18.
Low Voltage Detection/Reset _________________________________________________________37
19.
Infrared output____________________________________________________________________38
20.
Universal Asynchronous Receiver/Transmitter__________________________________________40
20.1.
Interface Registers _________________________________________________________________41
20.2.
Baud Rate Configuration Register ____________________________________________________41
20.3.
Interrupt & Identification Register ___________________________________________________42
20.4.
Line Control Register_______________________________________________________________43
KING BILLION ELECTRONICS CO., LTD
HE84G763
HE80004 Series
June 30, 2003
2
V1.01
This specification is subject to change without notice. Please contact sales person for the latest version before use.
20.5.
Line Status Register ________________________________________________________________44
21.
Extension Register Access ___________________________________________________________45
22.
Summary of Registers and Mask Options ______________________________________________45
23.
Absolute Maximum Rating __________________________________________________________48
24.
Recommended Operating Conditions _________________________________________________48
25.
AC/DC Characteristics _____________________________________________________________48
26.
Application Circuit_________________________________________________________________50
27.
Important Note ____________________________________________________________________52
28.
Updated History ___________________________________________________________________52
KING BILLION ELECTRONICS CO., LTD
HE84G763
HE80004 Series
June 30, 2003
3
V1.01
This specification is subject to change without notice. Please contact sales person for the latest version before use.
1. General Description
HE84G763 is a member of 8-bit Micro-controller series developed by King Billion Electronics. External
address and data buses are provided to access external memory. This chip has 4096 pixel, 16 gray-scale
LCD driver built-in with 4 different configurations, and up to 34-bit general purpose I/O ports. The
built-in OP comparator can be used with light, voice, temperature and humility sensor or used to detect
the battery low. The 7/8 bits current-type D/A converter and PWM driver output provides the complete
speech output solutions. The 768K bytes ROM and 5K bytes RAM can be used for the storage of large
speech data, image and text, etc. An UART is included to provide the serial communication capability. IR
output makes it suitable for remote control applications.
The instruction sets of HE80000 series is easy to learn and simple to use. There are only thirty-two
instructions and four addressing modes. Most of instructions take only 3 oscillator clocks to complete.
The performance and low power consumption make it suitable for battery-powered applications such as
translator, data bank, educational toy, digital voice recorder, etc.
2. Features
Operation Voltage:
2.4V ~ 3.6V
Dual Clock System:
Fast clock
32768 Hz ~ 8 MHz
Slow clock 32768 Hz
Four operation modes: Fast, Slow, Idle, Sleep modes.
Internal Program ROM: 512K bytes
Internal Data ROM:
256K bytes
Internal RAM:
5 K bytes
External memory buses to interface external Mask ROM, EPROM, NOR FLASH memory, etc.
22 ~ 34 bi-directional general-purpose I/O ports
with push-pull or Open-Drain output type
selectable for each I/O pin by mask option.
Up to 4096 pixels 16, 4 gray-scale or Black/White LCD driver.
Segment extender interface with KDGS80 and KDGS80.
4 LCD configurations (COM X SEG): 32 COM x 96 SEG, 48 COM x 80 SEG, 64 COM x 64
SEG, 80 COM x 48 SEG.
Built-in LCD power supply with regulator and 3, 4, and 5 times charge pump circuit.
One 7/8-bit current-type D/A converter.
One 7/8-bit PWM output.
One built-in OP comparator.
Built-in UART for serial communication.
IR output.
Low voltage reset: 2.2V
Low voltage detection: 2.4V, 2.6V, 2.8V and 3.0V
Two external interrupts, three internal timer interrupts and extension UART interrupt
Watch dog timer to prevent deadlock condition.
Two 16-bit timers and one time-base timer.
Instruction set: 32 instructions, 4 addressing mode.
KING BILLION ELECTRONICS CO., LTD
HE84G763
HE80004 Series
June 30, 2003
4
V1.01
This specification is subject to change without notice. Please contact sales person for the latest version before use.
3. Functional Block Diagram
SEG
FXI, FXO
COM
LCD
Driver
8 Bit CPU
Fast Clock
OSC.
LVP, LVL[5..1], LGS1,
768 KB ROM
SXI, SXO
LGS2, LCAP?A, LCAP?B
LCD Power
Supply
Slow Clock
OSC
5 KB RAM
OLFR, OCCK
PWM
Segment Ext.
Interface
TC1
PWM
SEGA, SEGD
TC2
VO, DAO
Ext. Memory
Interface
DAC
TBI
PRTC, PRTD, PRT10,
OPO,OPIN, OPIP
PRT17
I/O Port
WDT
OP Amp
SIN, SOUT
LVR
IRO
UART
IR
LVD
4. Pin Description
U14
HE84G763
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22 23 24
25 26
27 28 29
30 31 32
33 34
35 36
37 38 39
40 41 42
43 44 45
46 47
48 49 50
51 52 53
58
57
56
55
54
59
60 61 62
63 64 65
66 67 68
69 70
71 72 73
74 75 76
77 78 79
80
81 82 83
84 85 86
87 88 89
90 91
92 93 94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
PRT17[1]/SEG1
PRT17[0]/SEG0
COM31
COM30
COM29
COM28
COM27
COM26
COM25
COM24
COM23
COM22
COM21
COM20
COM19
COM18
COM17
COM16
COM15
COM14
CO
M
1
3
CO
M
1
2
CO
M
1
1
CO
M
1
0
CO
M
9
CO
M
8
CO
M
7
CO
M
6
CO
M
5
CO
M
4
CO
M
3
CO
M
2
CO
M
1
CO
M
0
LV
L
1
LV
L
2
LV
L
3
LV
L
4
LV
L
5
LG
S
2
LV
P
L
C
AP4A
L
C
AP2B
L
C
AP2A
L
C
AP1A
L
C
AP1B
L
C
AP3A
LV
R
E
G
LG
S
1
L
VAG
OL
F
R
O
CCK
GN
D
VO
DA
O
OP
I
N
OP
I
P
OP
O
RS
T
P
_
N
FX
O
FX
I
TS
T
P
_
P
SX
O
SX
I
VX VD
D
P
R
T
10[
7
]
P
R
T
10[
6
]
P
R
T
10[
5
]
P
R
T
10[
4
]
P
R
T
10[
3
]
P
R
T
10[
2
]
P
R
T
10[
1
]
P
R
T
10[
0
]
P
R
TD[7
]/INT2
/
W
K
U
P
[
5
]
P
R
TD[6
]/INT1
/
W
K
U
P
[
4
]
P
R
TD[5
]/W
K
U
P
[
3
]
P
R
TD[4
]/W
K
U
P
[
2
]
P
R
TD[3
]/W
K
U
P
[
1
]
P
R
TD[2
]/W
K
U
P
[
0
]
P
R
TD[1
]/S
IN
P
R
TD[0
]/S
O
U
T
PR
T
C
[
7
]
PR
T
C
[
6
]
PR
T
C
[
5
]
PR
T
C
[
4
]
PR
T
C
[
3
]
PR
T
C
[
2
]
PR
T
C
[
1
]
PR
T
C
[
0
]
V
DD_
RA
M
IR
O
PW
M
G
ND_
P
W
M
CMSG32
CMSG33
CMSG34
CMSG35
CMSG36
CMSG37
CMSG38
CMSG39
CMSG40
CMSG41
CMSG42
CMSG43
CMSG44
CMSG45
CMSG46
CMSG47
CMSG48
CMSG49
CMSG50
CMSG51
CM
S
G
5
2
CM
S
G
5
3
CM
S
G
5
4
CM
S
G
5
5
CM
S
G
5
6
CM
S
G
5
7
CM
S
G
5
8
CM
S
G
5
9
CM
S
G
6
0
CM
S
G
6
1
CM
S
G
6
2
CM
S
G
6
3
CM
S
G
6
4
CM
S
G
6
5
CM
S
G
6
6
CM
S
G
6
7
CM
S
G
6
8
CM
S
G
6
9
CM
S
G
7
0
CM
S
G
7
1
CM
S
G
7
2
CM
S
G
7
3
CM
S
G
7
4
CM
S
G
7
5
CM
S
G
7
6
CM
S
G
7
7
CM
S
G
7
8
CM
S
G
7
9
SEG
47/
D
[
7]
SEG
46/
D
[
6]
SEG
45/
D
[
5]
SEG
44/
D
[
4]
SEG
43/
D
[
3]
SEG
42/
D
[
2]
SEG
41/
D
[
1]
SEG
40/
D
[
0]
SEG39
/
A
[
23]
SEG38
/
A
[
22]
SEG37
/
A
[
21]
SEG36
/
A
[
20]
SEG35
/
A
[
19]
SEG34
/
A
[
18]
SEG33
/
A
[
17]
SEG32
/
A
[
16]
SEG31
/
A
[
15]
SEG30
/
A
[
14]
SEG29
/
A
[
13]
SEG28
/
A
[
12]
SEG27
/
A
[
11]
SEG26
/
A
[
10]
SEG
25/
A[
9]
SEG
24/
A[
8]
SEG
23/
A[
7]
SEG
22/
A[
6]
SEG
21/
A[
5]
SEG
20/
A[
4]
SEG
19/
A[
3]
SEG
18/
A[
2]
SEG
17/
A[
1]
SEG
16/
A[
0]
SEG
15/
OE
SEG
14/
W
E
SEG
13/
C
S
0
SEG
12/
C
S
1
SEG
11/
C
S
2
SEG
10/
C
S
3
PR
T
15[
1
]
/
SEG9
PR
T
15[
0
]
/
SEG8
PR
T
17[
7
]
/
SEG7
PR
T
17[
6
]
/
SEG6
PR
T
17[
5
]
/
SEG5
PR
T
17[
4
]
/
SEG4
PR
T
17[
3
]
/
SEG3
PR
T
17[
2
]
/
SEG2
Pin Name
Pin # I/O
Description
COM[31..0]
3 ~ 34 O LCD COMMON Driver pads.
LVL1 35
P LCD
Bias
Voltage
1.
LVL2 36
P LCD
Bias
Voltage
2
LVL3 37
P LCD
Bias
Voltage
3
LVL4 38
P LCD
Bias
Voltage
4
LVL5 39
P LCD
Bias
Voltage
5.
KING BILLION ELECTRONICS CO., LTD
HE84G763
HE80004 Series
June 30, 2003
5
V1.01
This specification is subject to change without notice. Please contact sales person for the latest version before use.
Pin Name
Pin # I/O
Description
LGS2 40
I LCD
Drive
Voltage
Setting
LVP
41
P Charge Pump Output.
LCAP4A
42
O Charge Pump Capacitor Pin.
LCAP2B
43
O Charge Pump Capacitor Pin.
LCAP2A
44
O Charge Pump Capacitor Pin.
LCAP1A
45
O Charge Pump Capacitor Pin.
LCAP1B
46
O Charge Pump Capacitor Pin.
LCAP3A
47
O Charge Pump Capacitor Pin.
LVREG 48
O
Voltage Regulator Output. VDD is regulated to generate LVREG, which is in turns
pumped to LVP. Adjust resistor between LGS1 and LVREG to set LVREG voltage.
LGS1 49
I Regulator
Voltage
Setting
LVAG
50
O Reference Voltage Output. Fixed 0.9 Volt DC reference voltage
OLFR
51
O LCD frame signal for interfacing with LCD segment extender KDGS80.
OCCK
52
O LCD data load pin for interfacing with LCD segment extender KDGS80.
GND 53
P Power
ground
Input.
OPO
54
O Output of OP Amp.
OPIP
55
I Non-inverting input of OP Amp.
OPIN
56
I Inverting input of OP Amp.
DAO
57
O Alternate output of DAC.
VO 58
O DAC
Output.
RSTP_N 59
I
System Reset input pin. Level trigger, active low on this pin will put the chip in reset
state.
FXO,
FXI
60,
61
O,
B
External fast clock pin. Two types of oscillator can be selected by MO_FXTAL (`0' for
RC type and `1' for crystal type). For RC type oscillator, one resistor needs to be
connected between FXI and GND. For crystal oscillator, one crystal needs to be placed
between FXI and FXO. Please refer to application circuit for details.
TSTP_P 62
I
Test input pin. Please bond this pad and reserve a test point on PCB for debugging. But
for improving ESD, please connect this point with zero Ohm resistor to GND.
SXO,
SXI
63,
64
O,
I
External slow clock pins. Slow clock is clock source for LCD display, TIMER1,
Time-Base and other internal blocks. Both crystal and RC oscillator are provided. The
slow clock type can be selected by mask option MO_SXTAL. Choose `0' for RC type
and `1' for crystal oscillator.
VX 65
I
Input pin for x32 PLL circuit. Connect to external resistor and capacitors as shown in
application circuit.
VDD 66
P
Positive power Input. A 0.1 F decoupling capacitors should be placed as close to IC
VDD and GND pads as possible for best decoupling effect.
PRT10[7..0] 67~74
B
8-bit bi-directional I/O port 10. The output type of I/O pad can also be selected by mask
option MO_10PP[7..0] (`1' for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
pad as input pad, "1" must be outputted before reading.
PRTD[7..2]
PRTD[1]/SIN
PRTD[0]/SOUT
75~82 B
8-bit bi-directional I/O port D. The output type of I/O pad can also be selected by mask
option MO_DPP[7..0] (`1' for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O as
input, `1' must be outputted before reading the pin.
PRTD[7..2] can be used as wake-up pins. PRTD[7..6] can be as external interrupt
sources.
PRTD[1] shares pad with UART Receiver SIN pin.
PRTD[0] shares pad with UART transmitter SOUT pin.
PRTC[7:0] 83~90
B
8-bit bi-directional I/O port C. The output type of I/O pad can also be selected by mask
option MO_CPP[7..0] (`1' for push-pull and `0' for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O as
input, `1' must be outputted before reading the pin.
VDD_RAM 91
P Dedicated
power input for RAM
IRO
92
O The Infrared output.
PWM 93
O
The PWM output can drive speaker or buzzer directly. Using VDD & PWM to drive
output device.
GND_PWM
94
P Dedicated Ground for PWM output.
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