1
LT1933
1933f
APPLICATIO S
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FEATURES
TYPICAL APPLICATIO
U
DESCRIPTIO
U
600mA, 500kHz Step-Down
Switching Regulator
in SOT-23
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LT
1933 is a current mode PWM step-down DC/DC
converter with an internal 0.75A power switch, packaged
in a tiny 6-lead SOT-23. The wide input range of 3.6V to
36V makes the LT1933 suitable for regulating power from
a wide variety of sources, including unregulated wall
transformers, 24V industrial supplies and automotive
batteries. Its high operating frequency allows the use of
tiny, low cost inductors and ceramic capacitors, resulting
in low, predictable output ripple.
Cycle-by-cycle current limit provides protection against
shorted outputs, and soft-start eliminates input current
surge during start up. The low current (<2A) shutdown
provides output disconnect, enabling easy power man-
agement in battery-powered systems.
Wide Input Range: 3.6V to 36V
5V at 600mA from 16V to 36V Input
3.3V at 600mA from 12V to 36V Input
5V at 500mA from 6.3V to 36V Input
3.3V at 500mA from 4.5V to 36V Input
Fixed Frequency 500kHz Operation
Uses Tiny Capacitors and Inductors
Soft-Start
Internally Compensated
Low Shutdown Current: <2A
Output Adjustable Down to 1.25V
Low Profile (1mm) SOT-23 (ThinSOTTM) Package
Automotive Battery Regulation
Industrial Control Supplies
Wall Transformer Regulation
Distributed Supply Regulation
Battery-Powered Equipment
3.3V Step-Down Converter
V
IN
4.5V TO 36V
OFF ON
0.1F
22H
1N4148
MBRM140
10k
16.5k
22F
1933 TA01a
2.2F
V
OUT
3.3V/500mA
V
IN
BOOST
GND
FB
SHDN
SW
LT1933
Efficiency
LOAD CURRENT (mA)
0
90
95
300
400
1933 TA01b
85
80
100
200
600
500
75
70
65
EFFICIENCY (%)
V
IN
= 12V
V
OUT
= 5V
V
OUT
= 3.3V
ThinSOT is a trademark of Linear Technology Corporation.
2
LT1933
1933f
(Note 1)
Input Voltage (V
IN
) .................................... 0.4V to 36V
BOOST Pin Voltage .................................................. 43V
BOOST Pin Above SW Pin ....................................... 20V
SHDN Pin .................................................. 0.4V to 36V
FB Voltage ................................................... 0.4V to 6V
Operating Temperature Range (Note 2)
LT1933E ................................................. 40C to 85C
LT1933I ................................................ 40C to 125C
Maximum Junction Temperature .......................... 125C
Storage Temperature Range ................. 65C to 150C
Lead Temperature (Soldering, 10 sec).................. 300C
T
JMAX
= 125C,
JA
= 165C/ W,
JC
= 102C/ W
ORDER PART
NUMBER
S6 PART MARKING
LT1933ES6
LT1933IS6
LTAGN
LTAGP
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Undervoltage Lockout
3.35
3.6
V
Feedback Voltage
1.225
1.245
1.265
V
FB Pin Bias Current
V
FB
= Measured V
REF
+ 10mV (Note 4)
40
120
nA
Quiescent Current
Not Switching
1.6
2.5
mA
Quiescent Current in Shutdown
V
SHDN
= 0V
0.01
2
A
Reference Line Regulation
V
IN
= 5V to 36V
0.01
%/V
Switching Frequency
V
FB
= 1.1V
400
500
600
kHz
V
FB
= 0V
55
kHz
Maximum Duty Cycle
88
94
%
Switch Current Limit
(Note 3)
0.75
1.05
A
Switch V
CESAT
I
SW
= 400mA
370
500
mV
Switch Leakage Current
2
A
Minimum Boost Voltage Above Switch
I
SW
= 400mA
1.9
2.3
V
BOOST Pin Current
I
SW
= 400mA
18
25
mA
SHDN Input Voltage High
2.3
V
SHDN Input Voltage Low
0.3
V
SHDN Bias Current
V
SHDN
= 2.3V (Note 5)
34
50
A
V
SHDN
= 0V
0.01
0.1
A
The
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25C.
V
IN
= 12V, V
BOOST
= 17V, unless otherwise noted. (Note 2)
ABSOLUTE AXI U RATI GS
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PACKAGE/ORDER I FOR ATIO
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BOOST 1
GND 2
FB 3
6 SW
5 V
IN
4 SHDN
TOP VIEW
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The LT1933E is guaranteed to meet performance specifications
from 0C to 70C. Specifications over the 40C to 85C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LT1933I specifications are
guaranteed over the 40C to 125C temperature range.
Note 3: Current limit guaranteed by design and/or correlation to static test.
Slope compensation reduces current limit at higher duty cycle.
Note 4: Current flows out of pin.
Note 5: Current flows into pin.
Consult factory for parts specified with wider operating temperature ranges.
3
LT1933
1933f
TYPICAL PERFOR A CE CHARACTERISTICS
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Efficiency, V
OUT
= 5V
Efficiency, V
OUT
= 3.3V
Switch Current Limit
Maximum Load Current
Maximum Load Current
Switch Voltage Drop
Feedback Voltage
Undervoltage Lockout
Switching Frequency
TEMPERATURE (C)
50
FEEDBACK VOLTAGE (V)
1.260
1.255
1.250
1.240
1.230
1.245
1.235
25
0
25
1933 G07
50
75
100
125
TEMPERATURE (C)
50
UVLO (V)
3.8
3.6
3.4
3.2
3.0
25
0
25
1933 G08
50
75
100
125
TEMPERATURE (C)
50
SWITCHING FREQUENCY (kHz)
600
550
500
450
400
25
0
25
1933 G09
50
75
100
125
INPUT VOLTAGE (V)
0
LOAD CURRENT (mA)
600
700
20
1933 G04
500
400
5
10
15
30
25
800
L = 22H
L = 33H
T
A
= 25C
V
OUT
= 5V
INPUT VOLTAGE (V)
0
LOAD CURRENT (mA)
600
700
20
1933 G05
500
400
5
10
15
30
25
800
L = 22H
L = 15H
T
A
= 25C
V
OUT
= 3.3V
LOAD CURRENT (mA)
0
80
90
100
300
400
1933 G01
70
100
200
600
500
60
EFFICIENCY (%)
V
IN
= 24V
V
IN
= 12V
T
A
= 25C
V
OUT
= 5V
D1 = MBRM140
L1 = Toko D53LCB 33H
LOAD CURRENT (mA)
0
80
90
100
300
400
1933 G02
70
100
200
600
500
60
EFFICIENCY (%)
V
IN
= 24V
V
IN
= 12V
V
IN
= 5V
T
A
= 25C
V
OUT
= 3.3V
D1 = MBRM140
L1 = Toko D53LCB 22H
DUTY CYCLE (%)
0
SWITCH CURRENT LIMIT (mA)
600
800
1200
1000
80
1933 G03
400
200
0
20
40
60
100
MINIMUM
TYPICAL
T
A
= 25C
SWITCH CURRENT (A)
0
0
SWITCH VOLTAGE (mV)
100
200
300
400
600
500
0.2
0.4
1933 G06
0.6
0.1
0.3
0.5
T
A
= 85C
T
A
= 25C
T
A
= 40C
4
LT1933
1933f
TYPICAL PERFOR A CE CHARACTERISTICS
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Frequency Foldback
Soft-Start
SHDN Pin Current
Typical Minimum Input Voltage
Typical Minimum Input Voltage
Operating Waveforms
Operating Waveforms,
Discontinuous Mode
FB PIN VOLTAGE (V)
0.0
SWITCHING FREQUENCY (kHz)
700
600
300
100
400
500
200
0
0.5
1933 G10
1.0
1.5
T
A
= 25C
SHDN PIN VOLTAGE (V)
0
SWITCH CURRENT LIMIT (A)
1.4
1.2
0.6
0.2
0.8
1.0
0.4
0
1
1933 G11
2
3
4
T
A
= 25C
DC = 30%
0
SHDN PIN CURRENT (
A)
200
150
50
100
0
4
1933 G12
8
12
16
SHDN PIN VOLTAGE (V)
T
A
= 25C
Switch Current Limit
TEMPERATURE (C)
50
SWITCH CURRENT LIMIT (A)
1.4
1.2
1.0
0.6
0
0.2
0.8
0.4
25
0
25
1933 G15
50
75
100
125
LOAD CURRENT (mA)
5
INPUT VOLTAGE (V)
6
7
8
1933 G13
4
V
OUT
= 5V
T
A
= 25C
L = 33H
TO START
TO RUN
1
10
100
LOAD CURRENT (mA)
4.5
INPUT VOLTAGE (V)
5.0
5.5
6.0
1933 G14
3.0
3.5
4.0
V
OUT
= 3.3V
T
A
= 25C
L = 22H
TO START
TO RUN
1
10
100
V
SW
10V/DIV
I
L
200mA/DIV
V
OUT
10mV/DIV
V
IN
= 12V, V
OUT
= 3.3V, I
OUT
= 400mA,
L = 22H, C
OUT
= 22F
1933 G16
V
SW
10V/DIV
I
L
200mA/DIV
V
OUT
10mV/DIV
V
IN
= 12V, V
OUT
= 3.3V, I
OUT
= 20mA,
L = 22H, C
OUT
= 22F
1933 G16
5
LT1933
1933f
PI FU CTIO S
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BLOCK DIAGRA
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BOOST (Pin 1): The BOOST pin is used to provide a drive
voltage, higher than the input voltage, to the internal
bipolar NPN power switch.
GND (Pin 2): Tie the GND pin to a local ground plane below
the LT1933 and the circuit components. Return the feed-
back divider to this pin.
FB (Pin 3): The LT1933 regulates its feedback pin to
1.245V. Connect the feedback resistor divider tap to this
pin. Set the output voltage according to V
OUT
= 1.245V
(1 + R1/R2). A good value for R2 is 10k.
SHDN (Pin 4): The SHDN pin is used to put the LT1933 in
shutdown mode. Tie to ground to shut down the LT1933.
Tie to 2.3V or more for normal operation. If the shutdown
feature is not used, tie this pin to the V
IN
pin. SHDN also
provides a soft-start function; see the Applications Infor-
mation section.
V
IN
(Pin 5): The V
IN
pin supplies current to the LT1933's
internal regulator and to the internal power switch. This
pin must be locally bypassed.
SW (Pin 6): The SW pin is the output of the internal power
switch. Connect this pin to the inductor, catch diode and
boost capacitor.
3
R
DRIVER
Q1
S
OSC
SLOPE
COMP
FREQUENCY
FOLDBACK
INT REG
AND
UVLO
V
C
g
m
1.245V
1933 BD
2
5
4
Q
Q
1
6
BOOST
SW
FB
R2
R1
V
OUT
L1
D2
C3
C1
D1
V
IN
C2
V
IN
ON OFF
GND
C4
R3
SHDN
6
LT1933
1933f
APPLICATIO S I FOR ATIO
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FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1%
resistors according to:
R1 = R2(V
OUT
/1.245 1)
R2 should be 20k or less to avoid bias current errors.
Reference designators refer to the Block Diagram.
Input Voltage Range
The input voltage range for LT1933 applications depends
on the output voltage and on the absolute maximum
ratings of the V
IN
and BOOST pins.
The minimum input voltage is determined by either the
LT1933's minimum operating voltage of ~3.35V, or by its
maximum duty cycle. The duty cycle is the fraction of time
that the internal switch is on and is determined by the input
and output voltages:
DC = (V
OUT
+ V
D
)/(V
IN
V
SW
+ V
D
)
where V
D
is the forward voltage drop of the catch diode
(~0.4V) and V
SW
is the voltage drop of the internal switch
(~0.4V at maximum load). This leads to a minimum input
voltage of:
V
IN(MIN)
= (V
OUT
+ V
D
)/DC
MAX
V
D
+ V
SW
with DC
MAX
= 0.88
The maximum input voltage is determined by the absolute
maximum ratings of the V
IN
and BOOST pins and by the
minimum duty cycle DC
MIN
= 0.08 (corresponding to a
minimum on time of 130ns):
V
IN(MAX)
= (V
OUT
+ V
D
)/DC
MIN
V
D
+ V
SW
Note that this is a restriction on the operating input
voltage; the circuit will tolerate transient inputs up to the
absolute maximum ratings of the V
IN
and BOOST pins.
Inductor Selection and Maximum Output Current
A good first choice for the inductor value is:
L = 5 (V
OUT
+ V
D
)
where V
D
is the voltage drop of the catch diode (~0.4V) and
L is in H. With this value the maximum load current will
be above 500mA. The inductor's RMS current rating must
be greater than your maximum load current and its satu-
ration current should be about 30% higher. For robust
operation in fault conditions the saturation current should
OPERATIO
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The LT1933 is a constant frequency, current mode step
down regulator. A 500kHz oscillator enables an RS flip-
flop, turning on the internal 750mA power switch Q1. An
amplifier and comparator monitor the current flowing
between the V
IN
and SW pins, turning the switch off when
this current reaches a level determined by the voltage at
V
C
. An error amplifier measures the output voltage through
an external resistor divider tied to the FB pin and servos the
V
C
node. If the error amplifier's output increases, more
current is delivered to the output; if it decreases, less
current is delivered. An active clamp (not shown) on the V
C
node provides current limit. The V
C
node is also clamped
to the voltage on the SHDN pin; soft-start is implemented
by generating a voltage ramp at the SHDN pin using an
external resistor and capacitor.
An internal regulator provides power to the control cir-
cuitry. This regulator includes an undervoltage lockout to
prevent switching when V
IN
is less than ~3.35V. The SHDN
pin is used to place the LT1933 in shutdown, disconnect-
ing the output and reducing the input current to less than
2A.
The switch driver operates from either the input or from
the BOOST pin. An external capacitor and diode are used
to generate a voltage at the BOOST pin that is higher than
the input supply. This allows the driver to fully saturate the
internal bipolar NPN power switch for efficient operation.
The oscillator reduces the LT1933's operating frequency
when the voltage at the FB pin is low. This frequency
foldback helps to control the output current during startup
and overload.
(Refer to Block Diagram)
7
LT1933
1933f
Table 1. Inductor Vendors
Vendor
URL
Part Series
Inductance Range (H)
Size (mm)
Coilcraft
www.coi1craft.com
DO1608C
10 to 22
2.9 4.5 6.6
MSS5131
10 to 22
3.1 5.1 5.1
MSS6122
10 to 33
2.2 6.1 6.1
Sumida
www.sumida.com
CR43
10 to 22
3.5 4.3 4.8
CDRH4D28
10 to 33
3.0 5.0 5.0
CDRH5D28
22 to 47
3.0 5.7 5.7
Toko
www.toko.com
D52LC
10 to 22
2.0 5.0 5.0
D53LC
22 to 47
3.0 5.0 5.0
Wrth Elektronik
www.we-online.com
WE-TPC MH
10 to 22
2.8 4.8 4.8
WE-PD4 S
10 to 22
2.9 4.5 6.6
WE-PD2 S
10 to 47
3.2 4.0 4.5
be ~1A. To keep efficiency high, the series resistance
(DCR) should be less than 0.2. Table 1 lists several
vendors and types that are suitable.
Of course, such a simple design guide will not always
result in the optimum inductor for your application. A
larger value provides a slightly higher maximum load
current, and will reduce the output voltage ripple. If your
load is lower than 500mA, then you can decrease the value
of the inductor and operate with higher ripple current. This
allows you to use a physically smaller inductor, or one with
a lower DCR resulting in higher efficiency. There are
several graphs in the Typical Performance Characteristics
section of this data sheet that show the maximum load
current as a function of input voltage and inductor value
for several popular output voltages. Low inductance may
result in discontinuous mode operation, which is OK, but
further reduces maximum load current. For details of
maximum output current and discontinuous mode opera-
tion, see Linear Technology Application Note 44. Finally,
for duty cycles greater than 50% (V
OUT
/V
IN
< 0.5), there is
a minimum inductance required to avoid subharmonic
oscillations. Choosing L greater than 3(V
OUT
+ V
D
) H
prevents subharmonic oscillations at all duty cycles.
Catch Diode
A 0.5A or 1A Schottky diode is recommended for the catch
diode, D1. The diode must have a reverse voltage rating
equal to or greater than the maximum input voltage. The
ON Semiconductor MBR0540 is a good choice; it is rated
for 0.5A forward current and a maximum reverse voltage
of 40V. The MBRM140 provides better efficiency, and will
handle extended overload conditions.
Input Capacitor
Bypass the input of the LT1933 circuit with a 2.2F or
higher value ceramic capacitor of X7R or X5R type. Y5V
types have poor performance over temperature and ap-
plied voltage, and should not be used. A 2.2F ceramic is
adequate to bypass the LT1933 and will easily handle the
ripple current. However, if the input power source has high
impedance, or there is significant inductance due to long
wires or cables, additional bulk capacitance may be nec-
essary. This can be provided with a low performance
electrolytic capacitor.
Step-down regulators draw current from the input supply
in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage ripple
at the LT1933 and to force this very high frequency
switching current into a tight local loop, minimizing EMI.
A 2.2F capacitor is capable of this task, but only if it is
placed close to the LT1933 and the catch diode; see the
PCB Layout section. A second precaution regarding the
ceramic input capacitor concerns the maximum input
voltage rating of the LT1933. A ceramic input capacitor
combined with trace or cable inductance forms a high
quality (under damped) tank circuit. If the LT1933 circuit
is plugged into a live supply, the input voltage can ring to
twice its nominal value, possibly exceeding the LT1933's
APPLICATIO S I FOR ATIO
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LT1933
1933f
voltage rating. This situation is easily avoided; see the Hot
Plugging Safely section.
Output Capacitor
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated by
the LT1933 to produce the DC output. In this role it
determines the output ripple, and low impedance at the
switching frequency is important. The second function is
to store energy in order to satisfy transient loads and
stabilize the LT1933's control loop.
Ceramic capacitors have very low equivalent series resis-
tance (ESR) and provide the best ripple performance. A
good value is
C
OUT
= 60/V
OUT
where C
OUT
is in F. Use X5R or X7R types, and keep in
mind that a ceramic capacitor biased with V
OUT
will have
less than its nominal capacitance. This choice will provide
low output ripple and good transient response. Transient
performance can be improved with a high value capacitor,
but a phase lead capacitor across the feedback resistor R1
may be required to get the full benefit (see the Compensa-
tion section).
High performance electrolytic capacitors can be used for
the output capacitor. Low ESR is important, so choose one
that is intended for use in switching regulators. The ESR
should be specified by the supplier, and should be 0.1 or
less. Such a capacitor will be larger than a ceramic
capacitor and will have a larger capacitance, because the
capacitor must be large to achieve low ESR. Table 2 lists
several capacitor vendors.
Figure 1 shows the transient response of the LT1933 with
several output capacitor choices. The output is 3.3V. The
load current is stepped from 100mA to 400mA and back
to 100mA, and the oscilloscope traces show the output
voltage. The upper photo shows the recommended value.
The second photo shows the improved response (less
voltage drop) resulting from a larger output capacitor and
a phase lead capacitor. The last photo shows the response
to a high performance electrolytic capacitor. Transient
performance is improved due to the large output capaci-
tance, but output ripple (as shown by the broad trace) has
increased because of the higher ESR of this capacitor.
Table 2. Capacitor Vendors
Vendor
Phone
URL
Part Series
Comments
Panasonic
(714) 373-7366
www.panasonic.com
Ceramic,
Polymer,
EEF Series
Tantalum
Kemet
(864) 963-6300
www.kemet.com
Ceramic,
Tantalum
T494, T495
Sanyo
(408) 749-9714
www.sanyovideo.com
Ceramic,
Polymer,
POSCAP
Tantalum
Murata
(404) 436-1300
www.murata.com
Ceramic
AVX
www.avxcorp.com
Ceramic,
Tantalum
TPS Series
Taiyo Yuden
(864) 963-6300
www.taiyo-yuden.com
Ceramic
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LT1933
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APPLICATIO S I FOR ATIO
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Figure 1. Transient Load Response of the LT1933 with Different
Output Capacitors as the Load Current is Stepped from 100mA to
400mA. V
IN
= 12V, V
OUT
= 3.3V, L = 22H.
22F
FB
16.5k
10k
V
OUT
1933 F01a
V
OUT
50mV/DIV
I
OUT
200mA/DIV
FB
V
OUT
1933 F01b
16.5k
10k
22F
2x
470pF
V
OUT
50mV/DIV
I
OUT
200mA/DIV
SANYO
4TPB100M
FB
1933 F01c
V
OUT
+
16.5k
10k
100F
V
OUT
50mV/DIV
I
OUT
200mA/DIV
10
LT1933
1933f
BOOST Pin Considerations
Capacitor C3 and diode D2 are used to generate a boost
voltage that is higher than the input voltage. In most cases
a 0.1F capacitor and fast switching diode (such as the
1N4148 or 1N914) will work well. Figure 2 shows two
ways to arrange the boost circuit. The BOOST pin must be
at least 2.3V above the SW pin for best efficiency. For
outputs of 3V and above, the standard circuit (Figure 2a)
is best. For outputs between 2.5V and 3V, use a 0.47F
capacitor and a small Schottky diode (such as the BAT-
54). For lower output voltages the boost diode can be tied
to the input (Figure 2b). The circuit in Figure 2a is more
efficient because the BOOST pin current comes from a
lower voltage source. You must also be sure that the
maximum voltage rating of the BOOST pin is not exceeded.
The minimum operating voltage of an LT1933 application
is limited by the undervoltage lockout (~3.35V) and by the
maximum duty cycle as outlined above. For proper startup,
the minimum input voltage is also limited by the boost
circuit. If the input voltage is ramped slowly, or the LT1933
is turned on with its SHDN pin when the output is already
in regulation, then the boost capacitor may not be fully
charged. Because the boost capacitor is charged with the
energy stored in the inductor, the circuit will rely on some
minimum load current to get the boost circuit running
properly. This minimum load will depend on input and
output voltages, and on the arrangement of the boost
circuit. The minimum load generally goes to zero once the
circuit has started. Figure 3 shows a plot of minimum load
to start and to run as a function of input voltage. In many
cases the discharged output capacitor will present a load
to the switcher which will allow it to start. The plots show
the worst-case situation where V
IN
is ramping very slowly.
For lower start-up voltage, the boost diode can be tied to
V
IN
; however, this restricts the input range to one-half of
the absolute maximum rating of the BOOST pin.
APPLICATIO S I FOR ATIO
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V
IN
BOOST
GND
SW
V
IN
LT1933
(2a)
D2
1933 F02a
V
OUT
C3
V
BOOST
V
SW
V
OUT
MAX V
BOOST
V
IN
+ V
OUT
V
IN
BOOST
GND
SW
V
IN
LT1933
(2b)
D2
1933 F02b
V
OUT
C3
V
BOOST
V
SW
V
IN
MAX V
BOOST
2V
IN
Figure 2. Two Circuits for Generating the Boost Voltage
Figure 3. The Minimum Input Voltage Depends
on Output Voltage, Load Current and Boost Circuit
Minimum Input Voltage V
OUT
= 3.3V
Minimum Input Voltage V
OUT
= 5V
LOAD CURRENT (mA)
4.5
INPUT VOLTAGE (V)
5.0
5.5
6.0
1933 F03a
3.0
3.5
4.0
V
OUT
= 3.3V
T
A
= 25C
L = 22H
TO START
TO RUN
1
10
100
LOAD CURRENT (mA)
5
INPUT VOLTAGE (V)
6
7
8
1933 F03b
4
V
OUT
= 5V
T
A
= 25C
L = 33H
TO START
TO RUN
1
10
100
11
LT1933
1933f
At light loads, the inductor current becomes discontinu-
ous and the effective duty cycle can be very high. This
reduces the minimum input voltage to approximately
300mV above V
OUT
. At higher load currents, the inductor
current is continuous and the duty cycle is limited by the
maximum duty cycle of the LT1933, requiring a higher
input voltage to maintain regulation.
Soft-Start
The SHDN pin can be used to soft-start the LT1933,
reducing the maximum input current during start up. The
SHDN pin is driven through an external RC filter to create
a voltage ramp at this pin. Figure 4 shows the start up
waveforms with and without the soft-start circuit. By
choosing a large RC time constant, the peak start up
current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply 60A when the SHDN
pin reaches 2.3V.
Shorted and Reversed Input Protection
If the inductor is chosen so that it won't saturate exces-
sively, an LT1933 buck regulator will tolerate a shorted
output. There is another situation to consider in systems
where the output will be held high when the input to the
LT1933 is absent. This may occur in battery charging
applications or in battery backup systems where a battery
or some other supply is diode OR-ed with the LT1933's
output. If the V
IN
pin is allowed to float and the SHDN pin
is held high (either by a logic signal or because it is tied to
V
IN
), then the LT1933's internal circuitry will pull its
quiescent current through its SW pin. This is fine if your
system can tolerate a few mA in this state. If you ground
the SHDN pin, the SW pin current will drop to essentially
zero. However, if the V
IN
pin is grounded while the output
is held high, then parasitic diodes inside the LT1933 can
APPLICATIO S I FOR ATIO
W
U
U
U
Figure 4. To Soft-Start the LT1933, Add a Resistor and Capacitor to the SHDN Pin.
V
IN
= 12V, V
OUT
= 3.3V, C
OUT
= 22F, R
LOAD
= 10.
RUN
5V/DIV
I
IN
100mA/DIV
V
OUT
5V/DIV
RUN
SHDN
GND
1933 F04a
RUN
5V/DIV
I
IN
100mA/DIV
V
OUT
5V/DIV
RUN
15k
0.1F
SHDN
GND
1933 F04b
0.5ms/DIV
50s/DIV
12
LT1933
1933f
Figure 5. Diode D4 Prevents a Shorted Input from Discharging
a Backup Battery Tied to the Output; It Also Protects the Circuit
from a Reversed Input. The LT1933 Runs Only When the Input
is Present
V
IN
BOOST
GND
FB
SHDN
SW
5
D4
V
IN
4
1
6
2
3
LT1933
1933 F05
V
OUT
BACKUP
D4: MBR0540
APPLICATIO S I FOR ATIO
W
U
U
U
pull large currents from the output through the SW pin and
the V
IN
pin. Figure 5 shows a circuit that will run only when
the input voltage is present and that protects against a
shorted or reversed input.
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LT1933 circuits. However, these ca-
pacitors can cause problems if the LT1933 is plugged into
a live supply (see Linear Technology Application Note 88
for a complete discussion). The low loss ceramic capaci-
tor combined with stray inductance in series with the
power source forms an under damped tank circuit, and the
voltage at the V
IN
pin of the LT1933 can ring to twice the
nominal input voltage, possibly exceeding the LT1933's
rating and damaging the part. If the input supply is poorly
controlled or the user will be plugging the LT1933 into an
energized supply, the input network should be designed to
prevent this overshoot.
Figure 6 shows the waveforms that result when an LT1933
circuit is connected to a 24V supply through six feet of 24-
gauge twisted pair. The first plot is the response with a
+
+
LT1933
2.2F
V
IN
20V/DIV
I
IN
5A/DIV
20s/DIV
V
IN
CLOSING SWITCH
SIMULATES HOT PLUG
I
IN
(6a)
(6b)
(6c)
LOW
IMPEDANCE
ENERGIZED
24V SUPPLY
STRAY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
+
+
LT1933
2.2F
10F
35V
AI.EI.
LT1933
2.2F
0.1F
1
1933 F06
V
IN
20V/DIV
I
IN
5A/DIV
20s/DIV
V
IN
20V/DIV
I
IN
5A/DIV
20s/DIV
DANGER!
RINGING V
IN
MAY EXCEED
ABSOLUTE MAXIMUM
RATING OF THE LT1933
Figure 6. A Well Chosen Input Network Prevents Input Voltage Overshoot and
Ensures Reliable Operation When the LT1933 is Connected to a Live Supply
13
LT1933
1933f
APPLICATIO S I FOR ATIO
W
U
U
U
Figure 7. Model for Loop Response
+
+
1.245V
SW
V
C
LT1933
GND
1933 F07
R1
OUT
ESR
ERROR
AMPLIFIER
CURRENT MODE
POWER STAGE
FB
R2
500k
R
C
100k
C
C
80pF
C1
C1
g
m
=
150mhos
g
m
+
C
PL
0.7V
1.1mho
2.2F ceramic capacitor at the input. The input voltage
rings as high as 35V and the input current peaks at 20A.
One method of damping the tank circuit is to add another
capacitor with a series resistor to the circuit. In Figure 6b
an aluminum electrolytic capacitor has been added. This
capacitor's high equivalent series resistance damps the
circuit and eliminates the voltage overshoot. The extra
capacitor improves low frequency ripple filtering and can
slightly improve the efficiency of the circuit, though it is
likely to be the largest component in the circuit. An
alternative solution is shown in Figure 6c. A 1 resistor is
added in series with the input to eliminate the voltage
overshoot (it also reduces the peak input current). A 0.1F
capacitor improves high frequency filtering. This solution
is smaller and less expensive than the electrolytic capaci-
tor. For high input voltages its impact on efficiency is
minor, reducing efficiency less than one half percent for a
5V output at full load operating from 24V.
Frequency Compensation
The LT1933 uses current mode control to regulate the
output. This simplifies loop compensation. In particular,
the LT1933 does not require the ESR of the output
capacitor for stability allowing the use of ceramic capaci-
tors to achieve low output ripple and small circuit size.
Figure 7 shows an equivalent circuit for the LT1933
control loop. The error amp is a transconductance ampli-
fier with finite output impedance. The power section,
consisting of the modulator, power switch and inductor, is
modeled as a transconductance amplifier generating an
output current proportional to the voltage at the V
C
node.
Note that the output capacitor integrates this current, and
that the capacitor on the V
C
node (C
C
) integrates the error
amplifier output current, resulting in two poles in the loop.
R
C
provides a zero. With the recommended output capaci-
tor, the loop crossover occurs above the R
C
C
C
zero. This
simple model works well as long as the value of the
inductor is not too high and the loop crossover frequency
is much lower than the switching frequency. With a larger
ceramic capacitor (very low ESR), crossover may be lower
and a phase lead capacitor (C
PL
) across the feedback
divider may improve the phase margin and transient
response. Large electrolytic capacitors may have an ESR
large enough to create an additional zero, and the phase
lead may not be necessary.
If the output capacitor is different than the recommended
capacitor, stability should be checked across all operating
conditions, including load current, input voltage and tem-
perature. The LT1375 data sheet contains a more thor-
ough discussion of loop compensation and describes how
to test the stability using a transient load.
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 8 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents flow in the LT1933's V
IN
and SW pins, the catch
diode (D1) and the input capacitor (C2). The loop formed
by these components should be as small as possible and
tied to system ground in only one place. These compo-
nents, along with the inductor and output capacitor,
SHUTDOWN
VIAS TO LOCAL GROUND PLANE
OUTLINE OF LOCAL GROUND PLANE
V
IN
V
OUT
1933 F08
SYSTEM
GROUND
C2
D1
C1
Figure 8. A Good PCB Layout Ensures Proper, Low EMI Operation
14
LT1933
1933f
V
IN
14.5V TO 36V
OFF ON
C3
0.1F
D3, 6V
D1
L1
47H
R2
10k
R1
86.6k
C1
10F
1933 TA02d
C2
2.2F
V
OUT
12V/450mA
D2
V
IN
BOOST
GND
FB
SHDN
SW
LT1933
5
4
1
6
2
3
V
IN
3.6V TO 20V
OFF ON
C3
0.1F
D2
L1
10H
R2
10k
R1
4.42k
C1
22F
2x
1933 TA02a
C2
2.2F
V
OUT
1.8V/500mA
V
IN
BOOST
GND
FB
SHDN
SW
LT1933
D1
5
4
1
6
2
3
V
IN
4.5V TO 36V
OFF ON
C3
0.1F
D2
L1
22H
R2
10k
R1
16.5k
C1
22F
6.3V
1933 TA02b
C2
2.2F
V
OUT
3.3V/500mA
V
IN
BOOST
GND
FB
SHDN
SW
LT1933
D1
5
4
1
6
2
3
V
IN
6.3V TO 36V
OFF ON
C3
0.1F
D2
L1
33H
R2
10k
R1
30.1k
C1
22F
6.3V
1933 TA02c
C2
2.2F
V
OUT
5V/500mA
V
IN
BOOST
GND
FB
SHDN
SW
LT1933
D1
5
4
1
6
2
3
12V Step-Down Converter
1.8V Step-Down Converter
3.3V Step-Down Converter
5V Step-Down Converter
should be placed on the same side of the circuit board, and
their connections should be made on that layer. Place a
local, unbroken ground plane below these components,
and tie this ground plane to system ground at one location,
ideally at the ground terminal of the output capacitor C1.
The SW and BOOST nodes should be as small as possible.
Finally, keep the FB node small so that the ground pin and
ground traces will shield it from the SW and BOOST nodes.
Include two vias near the GND pin of the LT1933 to help
remove heat from the LT1933 to the ground plane.
High Temperature Considerations
The die temperature of the LT1933 must be lower than the
maximum rating of 125C. This is generally not a concern
unless the ambient temperature is above 85C. For higher
temperatures, care should be taken in the layout of the
circuit to ensure good heat sinking of the LT1933. The
maximum load current should be derated as the ambient
temperature approaches 125C.
The die temperature is calculated by multiplying the LT1933
power dissipation by the thermal resistance from junction
to ambient. Power dissipation within the LT1933 can be
estimated by calculating the total power loss from an
efficiency measurement and subtracting the catch diode
loss. The resulting temperature rise at full load is nearly
independent of input voltage. Thermal resistance depends
on the layout of the circuit board, but a value of 125C/W
is typical.
Die temperature rise was measured on a two-layer, five by
five cm circuit board in still air. The LT1933 producing 5V
at 500mA showed a temperature rise of 28C, allowing it
to deliver full load to 97C ambient. Above this tempera-
ture the load current should be reduced. For 3.3V at
500mA the temperature rise is 24C.
Other Linear Technology Publications
Application notes AN19, AN35 and AN44 contain more
detailed descriptions and design information for Buck
regulators and other switching regulators. The LT1376
data sheet has a more extensive discussion of output
ripple, loop compensation and stability testing. Design
Note DN100 shows how to generate a bipolar output
supply using a Buck regulator.
TYPICAL APPLICATIO S
U
15
LT1933
1933f
S6 Package
6-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1634)
PACKAGE DESCRIPTIO
N
U
1.50 1.75
(NOTE 4)
2.60 3.00
0.25 0.50
TYP 6 PLCS
NOTE 3
DATUM `A'
0.09 0.20
(NOTE 3)
S6 SOT-23 0502
2.80 3.10
(NOTE 4)
0.95 BSC
1.90 BSC
0.90 1.30
0.90 1.45
0.09 0.15
NOTE 3
0.20 BSC
0.35 0.55 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ)
ATTENTION: ORIGINAL SOT23-6L PACKAGE.
MOST SOT23-6L PRODUCTS CONVERTED TO THIN SOT23
PACKAGE, DRAWING # 05-08-1636 AFTER APPROXIMATELY
APRIL 2001 SHIP DATE
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
16
LT1933
1933f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2004
PART NUMBER
DESCRIPTION
COMMENTS
LT1074/LT1074HV 4.4A I
OUT
, 100kHz, High Efficiency Step-Down
V
IN
: 7.3V to 45V/64V, V
OUT(MIN)
= 2.21V, I
Q
= 8.5mA, I
SD
= 10A,
DC/DC Converter
DD-5/DD-7, TO220-5/ TO220-7 Packages
LT1076/LT1076HV 1.6A I
OUT
, 100kHz, High Efficiency Step-Down
V
IN
: 7.3V to 45V/64V, V
OUT(MIN)
= 2.21V, I
Q
= 8.5mA, I
SD
= 10A,
DC/DC Converter
DD-5/DD-7, TO220-5/ TO220-7 Packages
LT1676
60V, 440mA I
OUT
, 100kHz, High Efficiency Step-Down
V
IN
: 7.4V to 60V, V
OUT(MIN)
= 1.24V, I
Q
= 3.2mA, I
SD
= 2.5A,
DC/DC Converter
S8 Package
LT1765
25V, 2.75A I
OUT
, 1.25MHz, High Efficiency Step-Down
V
IN
: 3V to 25V, V
OUT(MIN)
= 1.2V, I
Q
= 1mA, I
SD
= 15A,
DC/DC Converter
S8, TSSOP16E Packages
LT1766
60V, 1.2A I
OUT
, 200kHz, High Efficiency Step-Down
V
IN
: 5.5V to 60V, V
OUT(MIN)
= 1.2V, I
Q
= 2.5mA, I
SD
= 25A,
DC/DC Converter
TSSOP16/TSSOP16E Packages
LT1767
25V, 1.2A I
OUT
, 1.25MHz, High Efficiency Step-Down
V
IN
: 3V to 25V, V
OUT(MIN)
= 1.2V, I
Q
= 1mA, I
SD
= 6A,
DC/DC Converter
MS8/MS8E Packages
LT1776
40V, 550mA I
OUT
, 200kHz, High Efficiency Step-Down
V
IN
: 7.4V to 40V, V
OUT(MIN)
= 1.24V, I
Q
= 3.2mA, I
SD
= 30A,
DC/DC Converter
N8, S8 Packages
LT1940
25V, Dual 1.4A I
OUT
, 1.1MHz, High Efficiency Step-Down
V
IN
: 3.6V to 25V, V
OUT(MIN)
= 1.25V, I
Q
= 3.8mA, I
SD
= <30A,
DC/DC Converter
TSSOP16E Package
LT1956
60V, 1.2A I
OUT
, 500kHz, High Efficiency Step-Down
V
IN
: 5.5V to 60V, V
OUT(MIN)
= 1.2V, I
Q
= 2.5mA, I
SD
= 25A,
DC/DC Converter
TSSOP16/TSSOP16E Packages
LT1976
60V, 1.2A I
OUT
, 200kHz, High Efficiency Step-Down
V
IN
: 3.3V to 60V, V
OUT(MIN)
= 1.2V, I
Q
= 100A, I
SD
= <1A,
DC/DC Converter with Burst-Mode
TSSOP16E Package
LT3010
80V, 50mA, Low Noise Linear Regulator
V
IN
: 1.5V to 80V, V
OUT(MIN)
= 1.28V, I
Q
= 30A, I
SD
= <1A,
MS8E Package
LT3407
Dual 600mA I
OUT
, 1.5MHz, Synchronous Step-Down
V
IN
: 2.5V to 5.5V, V
OUT(MIN)
= 0.6V, I
Q
= 40A, I
SD
= <1A,
DC/DC Converter
MS10E Package
LT3412
2.5A I
OUT
, 4MHz, Synchronous Step-Down DC/DC Converter
V
IN
: 2.5V to 5.5V, V
OUT(MIN)
= 0.8V, I
Q
= 60A, I
SD
= <1A,
TSSOP16E Package
LTC3414
4A I
OUT
, 4MHz, Synchronous Step-Down DC/DC Converter
V
IN
: 2.3V to 5.5V, V
OUT(MIN)
= 0.8V, I
Q
= 64A, I
SD
= <1A,
TSSOP20E Package
LT3430/LT3431
60V, 2.75A I
OUT
, 200kHz/500kHz, High Efficiency Step-Down
V
IN
: 5.5V to 60V, V
OUT(MIN)
= 1.2V, I
Q
= 2.5mA, I
SD
= 30A,
DC/DC Converter
TSSOP16E Package
RELATED PARTS
V
IN
3.6V TO 36V
OFF ON
C3
0.47F
D2
L1
15H
R2
10k
R1
10.5k
C1
22F
1933 TA03
C2
2.2F
V
OUT
2.5V/500mA
V
IN
BOOST
GND
FB
SHDN
SW
LT1933
D1
5
4
1
6
2
3
2.5V Step-Down Converter
TYPICAL APPLICATIO S
U
LT/TP 0704 1K PRINTED IN USA
Burst Mode is a registered trademark of Linear Technology Corporation.
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