1
LT1962 Series
300mA, Low Noise,
Micropower
LDO Regulators
s
Low Noise: 20
V
RMS
(10Hz to 100kHz)
s
Output Current: 300mA
s
Low Quiescent Current: 30
A
s
Wide Input Voltage Range: 1.8V to 20V
s
Low Dropout Voltage: 270mV
s
Very Low Shutdown Current: < 1
A
s
No Protection Diodes Needed
s
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3V, 3.3V, 5V
s
Adjustable Output from 1.22V to 20V
s
Stable with 3.3
F Output Capacitor
s
Stable with Aluminum, Tantalum or
Ceramic Capacitors
s
Reverse Battery Protection
s
No Reverse Current
s
Overcurrent and Overtemperature Protected
s
8-Lead MSOP Package
The LT
1962 series are micropower, low noise, low
dropout regulators. The devices are capable of supplying
300mA of output current with a dropout voltage of 270mV.
Designed for use in battery-powered systems, the low
30
A quiescent current makes them an ideal choice.
Quiescent current is well controlled; it does not rise in
dropout as it does with many other regulators.
A key feature of the LT1962 regulators is low output noise.
With the addition of an external 0.01
F bypass capacitor,
output noise drops to 20
V
RMS
over a 10Hz to 100kHz
bandwidth. The LT1962 regulators are stable with output
capacitors as low as 3.3
F. Small ceramic capacitors can
be used without the series resistance required by other
regulators.
Internal protection circuitry includes reverse battery pro-
tection, current limiting, thermal limiting and reverse cur-
rent protection. The parts come in fixed output voltages of
1.5V, 1.8V, 2.5V, 3V, 3.3V and 5V, and as an adjustable
device with a 1.22V reference voltage. The LT1962 regu-
lators are available in the 8-lead MSOP package.
3.3V Low Noise Regulator
s
Cellular Phones
s
Battery-Powered Systems
s
Noise-Sensitive Instrumentation Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
LOAD CURRENT (mA)
0
DROPOUT VOLTAGE (mV)
400
350
300
250
200
150
100
50
0
1962 TA02
100
200
300
50
150
250
Dropout Voltage
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
IN
SHDN
0.01
F
10
F
1962 TA01
OUT
SENSE
V
IN
3.7V TO
20V
BYP
GND
LT1962-3.3
3.3V AT 300mA
20
V
RMS
NOISE
1
F
+
2
LT1962 Series
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Operating Voltage
(LT1962)
I
LOAD
= 300mA (Notes 4, 12)
q
1.8
2.3
V
Regulated Output Voltage
LT1962-1.5
V
IN
= 2V, I
LOAD
= 1mA
1.485
1.500
1.515
V
(Notes 4, 5)
2.5V < V
IN
< 20V, 1mA < I
LOAD
< 300mA
q
1.462
1.500
1.538
V
LT1962-1.8
V
IN
= 2.3V, I
LOAD
= 1mA
1.782
1.800
1.818
V
2.8V < V
IN
< 20V, 1mA < I
LOAD
< 300mA
q
1.755
1.800
1.845
V
LT1962-2.5
V
IN
= 3V, I
LOAD
= 1mA
2.475
2.500
2.525
V
3.5V < V
IN
< 20V, 1mA < I
LOAD
< 300mA
q
2.435
2.500
2.565
V
LT1962-3
V
IN
= 3.5V, I
LOAD
= 1mA
2.970
3.000
3.030
V
4V < V
IN
< 20V, 1mA < I
LOAD
< 300mA
q
2.925
3.000
3.075
V
LT1962-3.3
V
IN
= 3.8V, I
LOAD
= 1mA
3.267
3.300
3.333
V
4.3V < V
IN
< 20V, 1mA < I
LOAD
< 300mA
q
3.220
3.300
3.380
V
LT1962-5
V
IN
= 5.5V, I
LOAD
= 1mA
4.950
5.000
5.050
V
6V < V
IN
< 20V, 1mA < I
LOAD
< 300mA
q
4.875
5.000
5.125
V
ADJ Pin Voltage
LT1962
V
IN
= 2V, I
LOAD
= 1mA
1.208
1.220
1.232
V
(Notes 4, 5)
2.3V < V
IN
< 20V, 1mA < I
LOAD
< 300mA
q
1.190
1.220
1.250
V
Line Regulation
LT1962-1.5
V
IN
= 2V to 20V, I
LOAD
= 1mA
q
1
5
mV
LT1962-1.8
V
IN
= 2.3V to 20V, I
LOAD
= 1mA
q
1
5
mV
LT1962-2.5
V
IN
= 3V to 20V, I
LOAD
= 1mA
q
1
5
mV
LT1962-3
V
IN
= 3.5V to 20V, I
LOAD
= 1mA
q
1
5
mV
LT1962-3.3
V
IN
= 3.8V to 20V, I
LOAD
= 1mA
q
1
5
mV
LT1962-5
V
IN
= 5.5V to 20V, I
LOAD
= 1mA
q
1
5
mV
LT1962 (Note 4)
V
IN
= 2V to 20V, I
LOAD
= 1mA
q
1
5
mV
Load Regulation
LT1962-1.5
V
IN
= 2.5V,
I
LOAD
= 1mA to 300mA
3
8
mV
V
IN
= 2.5V,
I
LOAD
= 1mA to 300mA
q
15
mV
LT1962-1.8
V
IN
= 2.8V,
I
LOAD
= 1mA to 300mA
4
9
mV
V
IN
= 2.8V,
I
LOAD
= 1mA to 300mA
q
18
mV
(Note 1)
IN Pin Voltage ........................................................
20V
OUT Pin Voltage ....................................................
20V
Input to Output Differential Voltage (Note 2) .........
20V
SENSE Pin Voltage ...............................................
20V
ADJ Pin Voltage ......................................................
7V
BYP Pin Voltage ....................................................
0.6V
SHDN Pin Voltage .................................................
20V
Output Short-Circuit Duration ......................... Indefinite
Operating Junction Temperature Range
(Note 3) ............................................ 40
C to 125
C
Storage Temperature Range ................. 65
C to 150
C
Lead Temperature (Soldering, 10 sec).................. 300
C
ABSOLUTE AXI U RATI GS
W
W
W
U
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are T
A
= 25
C. (Note 3)
ELECTRICAL CHARACTERISTICS
ORDER PART
NUMBER
LT1962EMS8
LT1962EMS8-1.5
LT1962EMS8-1.8
LT1962EMS8-2.5
LT1962EMS8-3
LT1962EMS8-3.3
LT1962EMS8-5
MS8 PART MARKING
LTML
LTSZ
LTTA
LTPT
T
JMAX
= 150
C,
JA
= 125
C/ W
SEE THE APPLICATIONS
INFORMATION SECTION
FOR ADDITIONAL
INFORMATION ON
THERMAL RESISTANCE
*PIN 2: SENSE FOR LT1962-1.5/LT1962-1.8/
LT1962-2.5/LT1962-3/LT1962-3.3/LT1962-5.
ADJ FOR LT1962
1
2
3
4
OUT
SENSE/ADJ*
BYP
GND
8
7
6
5
IN
NC
NC
SHDN
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
PACKAGE/ORDER I FOR ATIO
U
U
W
LTPQ
LTPS
LTPR
Consult factory for parts specified with wider operating temperature ranges.
3
LT1962 Series
Load Regulation
LT1962-2.5
V
IN
= 3.5V,
I
LOAD
= 1mA to 300mA
5
12
mV
V
IN
= 3.5V,
I
LOAD
= 1mA to 300mA
q
25
mV
LT1962-3
V
IN
= 4V,
I
LOAD
= 1mA to 300mA
7
15
mV
V
IN
= 4V,
I
LOAD
= 1mA to 300mA
q
30
mV
LT1962-3.3
V
IN
= 4.3V,
I
LOAD
= 1mA to 300mA
7
17
mV
V
IN
= 4.3V,
I
LOAD
= 1mA to 300mA
q
33
mV
LT1962-5
V
IN
= 6V,
I
LOAD
= 1mA to 300mA
12
25
mV
V
IN
= 6V,
I
LOAD
= 1mA to 300mA
q
50
mV
LT1962 (Note 4)
V
IN
= 2.3V,
I
LOAD
= 1mA to 300mA
2
6
mV
V
IN
= 2.3V,
I
LOAD
= 1mA to 300mA
q
12
mV
Dropout Voltage
I
LOAD
= 10mA
0.10
0.15
V
V
IN
= V
OUT(NOMINAL)
I
LOAD
= 10mA
q
0.21
V
(Notes 6, 7, 12)
I
LOAD
= 50mA
0.15
0.20
V
I
LOAD
= 50mA
q
0.28
V
I
LOAD
= 100mA
0.18
0.24
V
I
LOAD
= 100mA
q
0.33
V
I
LOAD
= 300mA
0.27
0.33
V
I
LOAD
= 300mA
q
0.43
V
GND Pin Current
I
LOAD
= 0mA
q
30
75
A
V
IN
= V
OUT(NOMINAL)
I
LOAD
= 1mA
q
65
120
A
(Notes 6, 8)
I
LOAD
= 50mA
q
1.1
1.6
mA
I
LOAD
= 100mA
q
2
3
mA
I
LOAD
= 300mA
q
8
12
mA
Output Voltage Noise
C
OUT
= 10
F, C
BYP
= 0.01
F, I
LOAD
= 300mA, BW = 10Hz to 100kHz
20
V
RMS
ADJ Pin Bias Current
(Notes 4, 9)
30
100
nA
Shutdown Threshold
V
OUT
= Off to On
q
0.8
2
V
V
OUT
= On to Off
q
0.25
0.65
V
SHDN Pin Current
V
SHDN
= 0V
0.01
0.5
A
(Note 10)
V
SHDN
= 20V
1
5
A
Quiescent Current in Shutdown
V
IN
= 6V, V
SHDN
= 0V
0.1
1
A
Ripple Rejection
V
IN
V
OUT
= 1.5V (Avg), V
RIPPLE
= 0.5V
P-P
, f
RIPPLE
= 120Hz,
55
65
dB
I
LOAD
= 300mA
Current Limit
V
IN
= 7V, V
OUT
= 0V
700
mA
V
IN
= V
OUT(NOMINAL)
+ 1V,
V
OUT
= 0.1V
q
320
mA
Input Reverse Leakage Current
V
IN
= 20V, V
OUT
= 0V
q
1
mA
Reverse Output Current
LT1962-1.5
V
OUT
= 1.5V, V
IN
< 1.5V
10
20
A
(Note 11)
LT1962-1.8
V
OUT
= 1.8V, V
IN
< 1.8V
10
20
A
LT1962-2.5
V
OUT
= 2.5V, V
IN
< 2.5V
10
20
A
LT1962-3
V
OUT
= 3V, V
IN
< 3V
10
20
A
LT1962-3.3
V
OUT
= 3.3V, V
IN
< 3.3V
10
20
A
LT1962-5
V
OUT
= 5V, V
IN
< 5V
10
20
A
LT1962 (Note 4)
V
OUT
= 1.22V, V
IN
< 1.22V
5
10
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are T
A
= 25
C. (Note 3)
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Absolute maximum input to output differential voltage cannot be
achieved with all combinations of rated IN pin and OUT pin voltages. With
the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from in to out can not exceed
20V.
Note 3: The LT1962 regulators are tested and specified under pulse load
conditions such that T
J
T
A
. The LT1962 is 100% tested at T
A
= 25
C.
Performance at 40
C and 125
C is assured by design, characterization
and correlation with statistical process controls.
Note 4: The LT1962 (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
4
LT1962 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
OUTPUT CURRENT (mA)
0
DROPOUT VOLTAGE (mV)
150
200
250
150
250
1962 G01
100
50
0
50
100
200
300
350
400
300
T
J
= 125
C
T
J
= 25
C
OUTPUT CURRENT (mA)
0
0
GUARANTEED DROPOUT VOLTAGE (mV)
100
200
300
50
100
150
200
1962 G02
250
400
500
50
150
250
350
450
300
= TEST POINTS
T
J
125
C
T
J
25
C
TEMPERATURE (
C)
50
DROPOUT VOTLAGE (mV)
350
25
1962 G03
200
100
25
0
50
50
0
400
300
250
150
75
100
125
I
L
= 300mA
I
L
= 100mA
I
L
= 50mA
I
L
= 10mA
I
L
= 1mA
Typical Dropout Voltage
Guaranteed Dropout Voltage
Dropout Voltage
Quiescent Current
TEMPERATURE (
C)
50
0
QUIESCENT CURRENT (
A)
5
15
20
25
50
35
0
50
75
1962 G04
10
40
45
30
25
25
100
125
V
IN
= 6V
V
SHDN
= V
IN
R
L
=
, I
L
= 0 (LT1962-1.5/-1.8
/2.5/-3/-3.3/-5)
R
L
= 250k, I
L
= 5
A (LT1962)
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 6: To satisfy requirements for minimum input voltage, the LT1962
(adjustable version) is tested and specified for these conditions with an
external resistor divider (two 250k resistors) for an output voltage of
2.44V. The external resistor divider will add a 5
A DC load on the output.
Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V
IN
V
DROPOUT
.
Note 8: GND pin current is tested with V
IN
= V
OUT(NOMINAL)
or V
IN
= 2.3V
(whichever is greater) and a current source load. This means the device is
ELECTRICAL CHARACTERISTICS
tested while operating in its dropout region. This is the worst-case GND
pin current. The GND pin current will decrease slightly at higher input
voltages.
Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin. This current is
included in the specification for GND pin current.
Note 11: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 12: For the LT1962, LT1962-1.5 and LT1962-1.8 dropout voltage will
be limited by the minimum input voltage specification under some output
voltage/load conditions. See the curve of Minimum Input Voltage in the
Typical Performance Characteristics. For other fixed voltage versions of
the LT1962, the minimum input voltage is limited by the dropout voltage.
LT1962-1.5 Output Voltage
LT1962-1.8 Output Voltage
TEMPERATURE (
C)
50
OUTPUT VOLTAGE (V)
125
1962 G05
0
50
100
25
25
75
1.532
1.524
1.516
1.508
1.500
1.492
1.484
1.476
1.468
I
L
= 1mA
TEMPERATURE (
C)
50
OUTPUT VOLTAGE (V)
125
1962 G06
0
50
100
25
25
75
1.836
1.827
1.818
1.809
1.800
1.791
1.782
1.773
1.764
I
L
= 1mA
5
LT1962 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
LT1962-3 Quiescent Current
LT1962-3.3 Output Voltage
LT1962-5 Output Voltage
LT1962 ADJ Pin Voltage
LT1962-2.5 Output Voltage
LT1962-3 Output Voltage
TEMPERATURE (
C)
50
OUTPUT VOTLAGE (V)
2.53
25
1962 G07
2.50
2.48
25
0
50
2.47
2.46
2.54
2.52
2.51
2.49
75
100
125
I
L
= 1mA
TEMPERATURE (
C)
50
OUTPUT VOTLAGE (V)
3.045
25
1962 G08
3.000
2.970
25
0
50
2.955
2.940
3.060
3.030
3.015
2.985
75
100
125
I
L
= 1mA
TEMPERATURE (
C)
50
OUTPUT VOTLAGE (V)
5.075
25
1962 G10
5.000
4.950
25
0
50
4.925
4.900
5.100
5.050
5.025
4.975
75
100
125
I
L
= 1mA
TEMPERATURE (
C)
50
ADJ PIN VOTLAGE (V)
1.235
25
1962 G11
1.220
1.210
25
0
50
1.205
1.200
1.240
1.230
1.225
1.215
75
100
125
I
L
= 1mA
LT1962-1.5 Quiescent Current
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (
A)
800
700
600
500
400
300
200
100
0
8
1962 G12
2
4
6
10
7
1
3
5
9
T
J
= 25
C
R
L
=
V
SHDN
= V
IN
V
SHDN
= 0V
LT1962-2.5 Quiescent Current
LT1962-1.8 Quiescent Current
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (
A)
800
700
600
500
400
300
200
100
0
8
1962 G13
2
4
6
10
7
1
3
5
9
T
J
= 25
C
R
L
=
V
SHDN
= V
IN
V
SHDN
= 0V
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (
A)
800
700
600
500
400
300
200
100
0
8
1962 G14
2
4
6
10
7
1
3
5
9
T
J
= 25
C
R
L
=
V
SHDN
= V
IN
V
SHDN
= 0V
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (
A)
800
700
600
500
400
300
200
100
0
8
1962 G15
2
4
6
10
7
1
3
5
9
T
J
= 25
C
R
L
=
V
SHDN
= V
IN
V
SHDN
= 0V
TEMPERATURE (
C)
50
OUTPUT VOTLAGE (V)
3.345
25
1962 G09
3.300
3.270
25
0
50
3.255
3.240
3.360
3.330
3.315
3.285
75
100
125
I
L
= 1mA
6
LT1962 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
LT1962-3.3 Quiescent Current
LT1962-5 Quiescent Current
LT1962 Quiescent Current
LT1962-1.5 GND Pin Current
LT1962-1.8 GND Pin Current
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (
A)
800
700
600
500
400
300
200
100
0
8
1962 G16
2
4
6
10
7
1
3
5
9
T
J
= 25
C
R
L
=
V
SHDN
= V
IN
V
SHDN
= 0V
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (
A)
800
700
600
500
400
300
200
100
0
8
1962 G17
2
4
6
10
7
1
3
5
9
T
J
= 25
C
R
L
=
V
SHDN
= V
IN
V
SHDN
= 0V
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (
A)
40
35
30
25
20
15
10
5
0
16
1962 G18
4
8
12
20
14
2
6
10
18
T
J
= 25
C
R
L
= 250k
V
SHDN
= V
IN
V
SHDN
= 0V
LT1962-3 GND Pin Current
LT1962-3.3 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (
A)
500
1000
1500
250
750
1250
2
4
6
8
1962 G19
10
1
0
3
5
7
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 1.5V
R
L
= 30
I
L
= 50mA*
R
L
= 150
I
L
= 10mA*
R
L
= 1.5k
I
L
= 1mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (
A)
500
1000
1500
250
750
1250
2
4
6
8
1962 G20
10
1
0
3
5
7
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 1.8V
R
L
= 36
I
L
= 50mA*
R
L
= 180
I
L
= 10mA*
R
L
= 1.8k
I
L
= 1mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (
A)
500
1000
1500
250
750
1250
2
4
6
8
1962 G21
10
1
0
3
5
7
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 2.5V
R
L
= 50
I
L
= 50mA*
R
L
= 250
I
L
= 10mA*
R
L
= 2.5k
I
L
= 1mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (
A)
500
1000
1500
250
750
1250
2
4
6
8
1962 G22
10
1
0
3
5
7
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 3V
R
L
= 60
I
L
= 50mA*
R
L
= 300
I
L
= 10mA*
R
L
= 3k
I
L
= 1mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (
A)
500
1000
1500
250
750
1250
2
4
6
8
1962 G23
10
1
0
3
5
7
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 3.3V
R
L
= 66
I
L
= 50mA*
R
L
= 330
I
L
= 10mA*
R
L
= 3.3k
I
L
= 1mA*
LT1962-2.5 GND Pin Current
LT1962-5 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (
A)
500
1000
1500
250
750
1250
2
4
6
8
1962 G24
10
1
0
3
5
7
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 5V
R
L
= 100
I
L
= 50mA*
R
L
= 500
I
L
= 10mA*
R
L
= 5k
I
L
= 1mA*
7
LT1962 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
LT1962-1.5 GND Pin Current
LT1962-3 GND Pin Current
LT1962-2.5 GND Pin Current
LT1962-1.8 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
8
7
6
5
4
3
2
1
0
8
1962 G26
2
4
6
10
7
1
3
5
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 1.5V
R
L
= 5
I
L
= 300mA*
R
L
= 7.5
I
L
= 200mA*
R
L
= 15
I
L
= 100mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
8
7
6
5
4
3
2
1
0
8
1962 G27
2
4
6
10
7
1
3
5
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 1.8V
R
L
= 6
I
L
= 300mA*
R
L
= 9
I
L
= 200mA*
R
L
= 18
I
L
= 100mA*
GND Pin Current vs I
LOAD
LT1962 GND Pin Current
LT1962-3.3 GND Pin Current
LT1962-5 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
8
7
6
5
4
3
2
1
0
8
1962 G28
2
4
6
10
7
1
3
5
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 2.5V
R
L
= 8.33
I
L
= 300mA*
R
L
= 12.5
I
L
= 200mA*
R
L
= 25
I
L
= 100mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
8
7
6
5
4
3
2
1
0
8
1962 G29
2
4
6
10
7
1
3
5
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 3V
R
L
= 10
I
L
= 300mA*
R
L
= 15
I
L
= 200mA*
R
L
= 30
I
L
= 100mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
8
7
6
5
4
3
2
1
0
8
1962 G30
2
4
6
10
7
1
3
5
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 3.3V
R
L
= 11
I
L
= 300mA*
R
L
= 16.5
I
L
= 200mA*
R
L
= 33
I
L
= 100mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
8
7
6
5
4
3
2
1
0
8
1962 G31
2
4
6
10
7
1
3
5
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 5V
R
L
= 16.7
I
L
= 300mA*
R
L
= 25
I
L
= 200mA*
R
L
= 50
I
L
= 100mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
8
7
6
5
4
3
2
1
0
8
1962 G32
2
4
6
10
7
1
3
5
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 1.22V
R
L
= 4.07
I
L
= 300mA*
R
L
= 6.1
I
L
= 200mA*
R
L
= 12.2
I
L
= 100mA*
OUTPUT CURRENT (mA)
0
GND PIN CURRENT (mA)
3
4
5
150
250
1962 G33
2
1
0
50
100
200
6
7
8
300
V
IN
= V
OUT(NOMINAL)
+ 1V
LT1962 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (
A)
500
1000
1500
250
750
1250
2
4
6
8
1962 G25
10
1
0
3
5
7
9
T
J
= 25
C
V
IN
= V
SHDN
*FOR V
OUT
= 1.22V
R
L
= 24.4
I
L
= 50mA*
R
L
= 122
I
L
= 10mA*
R
L
= 1.22k
I
L
= 1mA*
8
LT1962 Series
SHDN Pin Threshold (On-to-Off)
TEMPERATURE (
C)
50
0
SHDN PIN THRESHOLD (V)
0.1
0.3
0.4
0.5
1.0
0.7
0
50
75
1962 G34
0.2
0.8
0.9
0.6
25
25
100
125
I
L
= 1mA
SHDN Pin Input Current
ADJ Pin Bias Current
Current Limit
SHDN Pin Input Current
SHDN Pin Threshold (Off-to-On)
Current Limit
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
TEMPERATURE (
C)
50
0
SHDN PIN THRESHOLD (V)
0.1
0.3
0.4
0.5
1.0
0.7
0
50
75
1962 G35
0.2
0.8
0.9
0.6
25
25
100
125
I
L
= 1mA
I
L
= 300mA
SHDN PIN VOLTAGE (V)
0
0
SHDN PIN INPUT CURRENT (
A)
0.2
0.6
0.8
1.0
1.4
1
5
7
1962 G36
0.4
1.2
4
9
10
2
3
6
8
TEMPERATURE (
C)
50
SHDN PIN INPUT CURRENT (
A)
1.4
25
1962 G37
0.8
0.4
25
0
50
0.2
0
1.6
1.2
1.0
0.6
75
100
125
V
SHDN
= 20V
TEMPERATURE (
C)
50
20
25
35
25
75
1962 G38
15
10
25
0
50
100
125
5
0
30
ADJ PIN BIAS CURRENT (nA)
INPUT VOLTAGE (V)
0
0
CURRENT LIMIT (A)
0.1
0.3
0.4
0.5
1.0
0.7
2
4
5
1962 G39
0.2
0.8
0.9
0.6
1
3
6
7
V
OUT
= 0V
TEMPERATURE (
C)
50
CURRENT LIMIT (A)
0.8
1.0
1.2
25
75
1962 G40
0.6
0.4
25
0
50
100
125
0.2
0
V
IN
= 7V
V
OUT
= 0V
OUTPUT VOLTAGE (V)
0
1
REVERSE OUTPUT CURRENT (
A)
30
40
50
60
70
80
90
100
8
9
7
1962 F07
20
10
0
2
3
4
6
5
10
LT1962
LT1962-5
T
J
= 25
C
V
IN
= 0V
CURRENT FLOWS
INTO OUTPUT PIN
V
OUT
= V
ADJ
(LT1962)
LT1962-1.5
LT1962-1.8
LT1962-2.5
LT1962-3
LT1962-3.3
Reverse Output Current
Reverse Output Current
TEMPERATURE (
C)
50
REVERSE OUTPUT CURRENT (
A)
20
25
30
25
75
1962 G42
15
10
25
0
50
100
125
5
0
V
IN
= 0V
V
OUT
= 1.22V (LT1962)
V
OUT
= 1.5V (LT1962-1.5)
V
OUT
= 1.8V (LT1962-1.8)
V
OUT
= 2.5V (LT1962-2.5)
V
OUT
= 3V (LT1962-3)
V
OUT
= 3.3V (LT1962-3.3)
V
OUT
= 5V (LT1962-5)
LT1962
LT1962-1.5/-1.8/-2.5/-3/-3.3/-5
9
LT1962 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
Ripple Rejection
Load Regulation
Output Noise Spectral Density
Output Noise Spectral Density
RMS Output Noise
vs Bypass Capacitor
LT1962 Minimum Input Voltage
Input Ripple Rejection
Input Ripple Rejection
FREQUENCY (Hz)
20
RIPPLE REJECTION (dB)
30
50
70
80
10
1k
10k
1M
1962 G43
10
100
100k
60
40
0
I
L
= 300mA
V
IN
= V
OUT(NOMINAL)
+ 1V
+ 50mV
RMS
RIPPLE
C
BYP
= 0
C
OUT
= 10
F
C
OUT
= 3.3
F
FREQUENCY (Hz)
20
RIPPLE REJECTION (dB)
30
50
70
80
10
1k
10k
1M
1962 G44
10
100
100k
60
40
0
I
L
= 300mA
V
IN
= V
OUT(NOMINAL)
+ 1V
+ 50mV
RMS
RIPPLE
C
OUT
= 10
F
C
BYP
= 0.01
F
C
BYP
= 1000pF
C
BYP
= 100pF
TEMPERATURE (
C)
50
RIPPLE REJECTION (dB)
66
25
1962 G45
60
56
25
0
50
54
52
68
64
62
58
75
100
125
I
L
= 300mA
V
IN
= V
OUT(NOMINAL)
+ 1V
+ 0.5V
P-P
RIPPLE AT f = 120Hz
TEMPERATURE (
C)
50
0
MINIMUM INPUT VOLTAGE (V)
0.25
0.75
1.00
1.25
2.50
1.75
0
50
75
1962 G46
0.50
2.00
2.25
1.50
25
25
100
125
V
OUT
= 1.22V
I
L
= 300mA
I
L
= 1mA
TEMPERATURE (
C)
50
LOAD REGULATION (mV)
5
0
5
25
75
1962 G47
10
15
25
0
50
100
125
20
25
LT1962
LT1962-2.5
LT1962-1.8
LT1962-1.5
V
IN
= V
OUT(NOMINAL)
+ 1V
I
L
= 1mA TO 300mA
LT1962-3
LT1962-3.3
LT1962-5
FREQUENCY (Hz)
0.1
OUTPUT NOISE SPECTRIAL DENSITY (
V/
Hz)
1
10
1k
10k
100k
1962 G48
0.01
100
10
LT1962
LT1962-2.5
LT1962-1.5
LT1962-5
LT1962-3.3
I
L
= 300mA
C
OUT
= 10
F
C
BYP
= 0
LT1962-3
LT1962-1.8
FREQUENCY (Hz)
0.1
OUTPUT NOISE SPECTRAL DENSITY (
V/
Hz)
1
10
1k
10k
100k
1962 G49
0.01
100
10
LT1962-5
LT1962
I
L
= 300mA
C
OUT
= 10
F
C
BYP
= 0.01
F
C
BYP
= 100pF
C
BYP
= 1000pF
C
BYP
(pF)
10
80
OUTPUT NOISE (
V
RMS
) 120
160
100
1k
10k
1962 G50
40
60
100
140
20
0
I
L
= 300mA
C
OUT
= 10
F
f = 10Hz to 100kHz
LT1962-5
LT1962-3.3
LT1962-3
LT1962
LT1962-2.5
LT1962-1.8
LT1962-1.5
RMS Output Noise
vs Load Current (10Hz to 100kHz)
LOAD CURRENT (mA)
40
OUTPUT NOISE (
V
RMS
)
60
100
140
160
0.01
1
10
1000
1962 G51
20
0.1
100
120
80
0
C
OUT
= 10
F
C
BYP
= 0
F
C
BYP
= 0.01
F
LT1962-5
LT1962-5
LT1962
LT1962
10
LT1962 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
LT1962-5 10Hz to 100kHz
Output Noise (C
BYP
= 1000pF)
V
OUT
100
V/DIV
C
OUT
= 10
F
1ms/DIV
1962 G54
I
L
= 300mA
LT1962-5 10Hz to 100kHz
Output Noise (C
BYP
= 0.01
F)
V
OUT
100
V/DIV
C
OUT
= 10
F
1ms/DIV
1962 G55
I
L
= 300mA
LT1962-5 Transient Response
TIME (ms)
0
OUTPUT VOLTAGE
DEVIATION (V)
LOAD CURRENT (mA)
0
0.2
0.4
1.6
1962 G56
0.2
0.4
0
100
200
300
0.4
0.2
0.6 0.8
1.2
1.8
1.4
1.0
2.0
V
IN
= 6V
C
IN
= 10
F
C
OUT
= 10
F
C
BYP
= 0
LT1962-5 Transient Response
TIME (
s)
0
OUTPUT VOLTAGE
DEVIATION (mV)
LOAD CURRENT (mA)
0
0.05
0.10
400
1962 G57
0.05
0.10
0
100
200
300
100
50
150 200
300
450
350
250
500
V
IN
= 6V
C
IN
= 10
F
C
OUT
= 10
F
C
BYP
= 0.01
F
LT1962-5 10Hz to 100kHz
Output Noise (C
BYP
= 0)
V
OUT
100
V/DIV
C
OUT
= 10
F
1ms/DIV
1962 G52
I
L
= 300mA
LT1962-5 10Hz to 100kHz
Output Noise (C
BYP
= 100pF)
V
OUT
100
V/DIV
C
OUT
= 10
F
1ms/DIV
1962 G53
I
L
= 300mA
U
U
U
PI FU CTIO S
OUT (Pin 1): Output. The output supplies power to the
load. A minimum output capacitor of 3.3
F is required to
prevent oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.
SENSE (Pin 2): Sense. For fixed voltage versions of the
LT1962 (LT1962-1.5/LT1962-1.8/LT1962-2.5/LT1962-3/
LT1962-3.3/LT1962-5), the SENSE pin is the input to the
error amplifier. Optimum regulation will be obtained at the
point where the SENSE pin is connected to the OUT pin of
the regulator. In critical applications, small voltage drops
are caused by the resistance (R
P
) of PC traces between the
regulator and the load. These may be eliminated by con-
necting the SENSE pin to the output at the load as shown
in Figure 1 (Kelvin Sense Connection). Note that the
voltage drop across the external PC traces will add to the
dropout voltage of the regulator. The SENSE pin bias
current is 10
A at the nominal rated output voltage. The
SENSE pin can be pulled below ground (as in a dual supply
system where the regulator load is returned to a negative
supply) and still allow the device to start and operate.
ADJ (Pin 2): Adjust. For the adjustable LT1962, this is the
input to the error amplifier. This pin is internally clamped
to
7V. It has a bias current of 30nA which flows into the
11
LT1962 Series
Figure 1. Kelvin Sense Connection
IN
SHDN
1962 F01
R
P
OUT
V
IN
SENSE
GND
LT1962
R
P
4
2
1
5
8
+
+
LOAD
U
U
U
PI FU CTIO S
pin. The ADJ pin voltage is 1.22V referenced to ground and
the output voltage range is 1.22V to 20V.
BYP (Pin 3): Bypass. The BYP pin is used to bypass the
reference of the LT1962 to achieve low noise performance
from the regulator. The BYP pin is clamped internally to
0.6V (one V
BE
). A small capacitor from the output to this
pin will bypass the reference to lower the output voltage
noise. A maximum value of 0.01
F can be used for
reducing output voltage noise to a typical 20
V
RMS
over a
10Hz to 100kHz bandwidth. If not used, this pin must be
left unconnected.
GND (Pin 4): Ground.
SHDN (Pin 5): Shutdown. The SHDN pin is used to put the
LT1962 regulators into a low power shutdown state. The
output will be off when the SHDN pin is pulled low. The
SHDN pin can be driven either by 5V logic or open-
collector logic with a pull-up resistor. The pull-up resistor
is required to supply the pull-up current of the open-
collector gate, normally several microamperes, and the
SHDN pin current, typically 1
A. If unused, the SHDN pin
must be connected to V
IN
. The device will not function if
the SHDN pin is not connected.
NC (Pins 6, 7): No Connect. These pins are not internally
connected. For improved power handling capabilities,
these pins can be connected to the PC board.
IN (Pin 8): Input. Power is supplied to the device through
the IN pin. A bypass capacitor is required on this pin if the
device is more than six inches away from the main input
filter capacitor. In general, the output impedance of a
battery rises with frequency, so it is advisable to include a
bypass capacitor in battery-powered circuits. A bypass
capacitor in the range of 1
F to 10
F is sufficient. The
LT1962 regulators are designed to withstand reverse
voltages on the IN pin with respect to ground and the OUT
pin. In the case of a reverse input, which can happen if a
battery is plugged in backwards, the device will act as if
there is a diode in series with its input. There will be no
reverse current flow into the regulator and no reverse
voltage will appear at the load. The device will protect both
itself and the load.
APPLICATIO S I FOR ATIO
W
U
U
U
The LT1962 series are 300mA low dropout regulators with
micropower quiescent current and shutdown. The devices
are capable of supplying 300mA at a dropout voltage of
300mV. Output voltage noise can be lowered to 20
V
RMS
over a 10Hz to 100kHz bandwidth with the addition of a
0.01
F reference bypass capacitor. Additionally, the refer-
ence bypass capacitor will improve transient response of
the regulator, lowering the settling time for transient load
conditions. The low operating quiescent current (30
A)
drops to less than 1
A in shutdown. In addition to the low
quiescent current, the LT1962 regulators incorporate sev-
eral protection features which make them ideal for use in
battery-powered systems. The devices are protected
against both reverse input and reverse output voltages. In
battery backup applications where the output can be held
up by a backup battery when the input is pulled to ground,
the LT1962-X acts like it has a diode in series with its
output and prevents reverse current flow. Additionally, in
dual supply applications where the regulator load is re-
turned to a negative supply, the output can be pulled below
ground by as much as 20V and still allow the device to start
and operate.
Adjustable Operation
The adjustable version of the LT1962 has an output
voltage range of 1.22V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2. The
device servos the output to maintain the ADJ pin voltage
at 1.22V referenced to ground. The current in R1 is then
equal to 1.22V/R1 and the current in R2 is the current in R1
12
LT1962 Series
Figure 2. Adjustable Operation
(see LT1962-5 Transient Response in the Typical Perfor-
mance Characteristics). However, regulator start-up time
is inversely proportional to the size of the bypass capaci-
tor, slowing to 15ms with a 0.01
F bypass capacitor and
10
F output capacitor.
Output Capacitance and Transient Response
The LT1962 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small capaci-
tors. A minimum output capacitor of 3.3
F with an ESR of
3
or less is recommended to prevent oscillations. The
LT1962-X is a micropower device and output transient
response will be a function of output capacitance. Larger
values of output capacitance decrease the peak deviations
and provide improved transient response for larger load
current changes. Bypass capacitors, used to decouple
individual components powered by the LT1962, will in-
crease the effective output capacitor value. With larger
capacitors used to bypass the reference (for low noise
operation), larger values of output capacitance are needed.
For 100pF of bypass capacitance, 4.7
F of output capaci-
tor is recommended. With a 1000pF bypass capacitor or
larger, a 6.8
F output capacitor is recommended.
The shaded region of Figure 3 defines the range over which
the LT1962 regulators are stable. The minimum ESR
needed is defined by the amount of bypass capacitance
used, while the maximum ESR is 3
.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
IN
1962 F02
R2
OUT
V
IN
V
OUT
ADJ
GND
LT1962
R1
+
V
V
R
R
I
R
V
V
I
nA
OUT
ADJ
ADJ
ADJ
=
+
+
( )( )
=
=
1 22
1
2
1
2
1 22
30
.
.
AT 25 C
OUTPUT RANGE = 1.22V TO 20V
APPLICATIO S I FOR ATIO
W
U
U
U
plus the ADJ pin bias current. The ADJ pin bias current,
30nA at 25
C, flows through R2 into the ADJ pin. The
output voltage can be calculated using the formula in
Figure 2. The value of R1 should be no greater than 250k
to minimize errors in the output voltage caused by the ADJ
pin bias current. Note that in shutdown the output is turned
off and the divider current will be zero.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.22V.
Specifications for output voltages greater than 1.22V will
be proportional to the ratio of the desired output voltage to
1.22V: V
OUT
/1.22V. For example, load regulation for an
output current change of 1mA to 300mA is 2mV typical
at V
OUT
= 1.22V. At V
OUT
= 12V, load regulation is:
(12V/1.22V)(2mV) = 19.7mV
Bypass Capacitance and Low Noise Performance
The LT1962 regulators may be used with the addition of a
bypass capacitor from V
OUT
to the BYP pin to lower output
voltage noise. A good quality low leakage capacitor is
recommended. This capacitor will bypass the reference of
the regulator, providing a low frequency noise pole. The
noise pole provided by this bypass capacitor will lower the
output voltage noise to as low as 20
V
RMS
with the
addition of a 0.01
F bypass capacitor. Using a bypass
capacitor has the added benefit of improving transient
response. With no bypass capacitor and a 10
F output
capacitor, a 10mA to 300mA load step will settle to within
1% of its final value in less than 100
s. With the addition
of a 0.01
F bypass capacitor, the output will settle to
within 1% for a 10mA to 300mA load step in less than
10
s, with total output voltage deviation of less than 2%
OUTPUT CAPACITANCE (
F)
1
ESR (
)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
3
10
1962 F03
2
4
5
6 7 8 9
STABLE REGION
C
BYP
= 330pF
C
BYP
1000pF
C
BYP
= 100pF
C
BYP
= 0
Figure 3. Stability
13
LT1962 Series
temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitance in
a small package, but exhibit strong voltage and tempera-
ture coefficients as shown in Figures 4 and 5. When used
with a 5V regulator, a 10
F Y5V capacitor can exhibit an
effective value as low as 1
F to 2
F over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
Figure 5. Ceramic Capacitor Temperature Characteristics
Figure 4. Ceramic Capacitor DC Bias Characteristics
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
1962 F04
20
0
20
40
60
80
100
0
4
8
10
2
6
12
14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10
F
TEMPERATURE (
C)
50
40
20
0
20
40
60
80
100
25
75
1962 F05
25
0
50
100
125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10
F
APPLICATIO S I FOR ATIO
W
U
U
U
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
The resulting voltages produced can cause appreciable
amounts of noise, especially when a ceramic capacitor is
used for noise bypassing. A ceramic capacitor produced
Figure 6's trace in response to light tapping from a pencil.
Similar vibration induced behavior can masquerade as
increased output voltage noise.
Figure 6. Noise Resulting from Tapping on a Ceramic Capacitor
LT1962-5
C
OUT
= 10
F
C
BYP
= 0.01
f
I
LOAD
= 100mA
V
OUT
500
V/DIV
100ms/DIV
1962 F06
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125
C). The
power dissipated by the device will be made up of two
components:
1. Output current multiplied by the input/output voltage
differential: (I
OUT
)(V
IN
V
OUT
), and
2. GND pin current multiplied by the input voltage:
(I
GND
)(V
IN
).
The GND pin current can be found by examining the GND
Pin Current curves in the Typical Performance Character-
istics. Power dissipation will be equal to the sum of the two
components listed above.
The LT1962 series regulators have internal thermal limit-
ing designed to protect the device during overload condi-
tions. For continuous normal conditions, the maximum
junction temperature rating of 125
C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambient.
Additional heat sources mounted nearby must also be
considered.
14
LT1962 Series
T
JMAX
= 50
C + 35.3
C = 85.3
C
Protection Features
The LT1962 regulators incorporate several protection
features which make them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125
C.
The input of the device will withstand reverse voltages of
20V. Current flow into the device will be limited to less than
1mA (typically less than 100
A) and no negative voltage
will appear at the output. The device will protect both itself
and the load. This provides protection against batteries
which can be plugged in backward.
The output of the LT1962 can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 500k or higher, limiting current
flow to less than 40
A. For adjustable versions, the output
will act like an open circuit; no current will flow out of the
pin. If the input is powered by a voltage source, the output
will source the short-circuit current of the device and will
protect itself by thermal limiting. In this case, grounding
the SHDN pin will turn off the device and stop the output
from sourcing the short-circuit current.
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 100k) in series with a
diode when pulled above ground.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following table lists thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.
Table 1. Measured Thermal Resistance
COPPER AREA
THERMAL RESISTANCE
TOPSIDE*
BACKSIDE
BOARD AREA
(JUNCTION-TO-AMBIENT)
2500mm
2
2500mm
2
2500mm
2
110
C/W
1000mm
2
2500mm
2
2500mm
2
115
C/W
225mm
2
2500mm
2
2500mm
2
120
C/W
100mm
2
2500mm
2
2500mm
2
130
C/W
50mm
2
2500mm
2
2500mm
2
140
C/W
*Device is mounted on topside.
Calculating Junction Temperature
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
100mA and a maximum ambient temperature of 50
C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX)
(V
IN(MAX)
V
OUT
) + I
GND
(V
IN(MAX)
)
where,
I
OUT(MAX)
= 100mA
V
IN(MAX)
= 6V
I
GND
at (I
OUT
= 100mA, V
IN
= 6V) = 2mA
So,
P = 100mA(6V 3.3V) + 2mA(6V) = 0.28W
The thermal resistance will be in the range of 110
C/W to
140
C/W depending on the copper area. So the junction
temperature rise above ambient will be approximately
equal to:
0.28W(125
C/W) = 35.3
C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
APPLICATIO S I FOR ATIO
W
U
U
U
15
LT1962 Series
APPLICATIO S I FOR ATIO
W
U
U
U
from the 1.22V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 13V difference between OUT and ADJ
pin divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage or is left open
circuit. Current flow back into the output will follow the
curve shown in Figure 7.
When the IN pin of the LT1962 is forced below the OUT pin
or the OUT pin is pulled above the IN pin, input current will
typically drop to less than 2
A. This can happen if the input
of the device is connected to a discharged (low voltage)
battery and the output is held up by either a backup battery
OUTPUT VOLTAGE (V)
0
1
REVERSE OUTPUT CURRENT (
A)
30
40
50
60
70
80
90
100
8
9
7
1962 F07
20
10
0
2
3
4
6
5
10
LT1962
LT1962-5
T
J
= 25
C
V
IN
= 0V
CURRENT FLOWS
INTO OUTPUT PIN
V
OUT
= V
ADJ
(LT1962)
LT1962-1.5
LT1962-1.8
LT1962-2.5
LT1962-3
LT1962-3.3
Figure 7. Reverse Output Current
or a second regulator circuit. The state of the SHDN pin will
have no effect on the reverse output current when the
output is pulled above the input.
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
MSOP (MS8) 1100
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0.021
0.006
(0.53
0.015)
0
6
TYP
SEATING
PLANE
0.007
(0.18)
0.043
(1.10)
MAX
0.009 0.015
(0.22 0.38)
0.005
0.002
(0.13
0.05)
0.034
(0.86)
REF
0.0256
(0.65)
BSC
1
2
3
4
0.193
0.006
(4.90
0.15)
8
7 6
5
0.118
0.004*
(3.00
0.102)
0.118
0.004**
(3.00
0.102)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
16
LT1962 Series
sn1962 1962fas LT/TP 0101 2K REV A PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2000
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX: (408) 434-0507
q
www.linear-tech.com
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1120
125mA Low Dropout Regulator with 20
A I
Q
Includes 2.5V Reference and Comparator
LT1121
150mA Micropower Low Dropout Regulator
30
A I
Q
, SOT-223 Package
LT1129
700mA Micropower Low Dropout Regulator
50
A Quiescent Current
LT1175
500mA Negative Low Dropout Micropower Regulator
45
A I
Q
, 0.26V Dropout Voltage, SOT-223 Package
LT1521
300mA Low Dropout Micropower Regulator with Shutdown
15
A I
Q
, Reverse Battery Protection
LT1529
3A Low Dropout Regulator with 50
A I
Q
500mV Dropout Voltage
LTC1627
High Efficiency Synchronous Step-Down Switching Regulator
Burst Mode
TM
Operation, Monolithic, 100% Duty Cycle
LT1761
100mA, Low Noise, Low Dropout Micropower Regulator in SOT-23
20
A Quiescent Current, 20
V
RMS
Noise
LT1762
150mA, Low Noise, LDO Micropower Regulator
25
A Quiescent Current, 20
V
RMS
Noise
LT1763
500mA, Low Noise, LDO Micropower Regulator
30
A Quiescent Current, 20
V
RMS
Noise
LT1764
3A, Fast Transient Response Low Dropout Regulator
340mV Dropout Voltage, 40
V
RMS
Noise
LT1772
Constant Frequency Current Mode Step-Down DC/DC Controller
Up to 94% Efficiency, SOT-23 Package, 100% Duty Cycle
LT1963
1.5A, Fast Transient Response Low Dropout Regulator
SO-8, SOT-223 Packages
Burst Mode is a trademark of Linear Technology Corporation.
C4
0.01
F
R1
0.1
R2
0.1
R5
10k
R4
2.2k
R7
1.21k
C2
10
F
1962 TA03
V
IN
> 3.7V
3.3V
300mA
C5
0.01
F
8
1
3
2
4
C3
0.01
F
IN
SHDN
OUT
FB
BYP
GND
LT1962-3.3
IN
SHDN
OUT
BYP
ADJ
GND
LT1962
SHDN
+
C1
10
F
+
+
1/2 LT1490
R6
2k
R3
2.2k
Paralleling of Regulators for Higher Output Current
IN
SHDN
OUT
V
IN
>2.7V
FB
GND
LT1962-2.5
R7
100k
C1
10
F
*ADJUST R1 FOR 0mA TO 300mA
CONSTANT CURRENT
+
R6
2.2k
LT1004-1.2
C3
0.33
F
C2
1
F
1962 TA04
R5
0.1
R4
2.2k
R3
2k
R2
40.2k
R1*
1k
+
LOAD
1/2 LT1490
Adjustable Current Source
TYPICAL APPLICATIO S
U
PDF 
ZIP