LTC6905
1
6905fa
, LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a
trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners. Protected by U.S. Patents, including 6614313, 6342817.
One External Resistor Sets the Frequency
Fast Start-Up Time: 100
s Typical
Frequency Range: 17MHz to 170MHz
Frequency Error 0.5% Typ 17MHz to 170MHz
(T
A
= 0C to 70C, Over All Settings)
20ppm/C Temperature Stability
Rise Time: 0.5ns, C
L
= 5pF
Timing Jitter: 50ps at 170MHz
50% 2.5% Duty Cycle
6mA Typical Supply Current, f
OSC
= 100MHz
CMOS Output Drives 500 Load (V
S
= 3V)
Operates from a Single 2.7V to 5.5V Supply
Low Profile (1mm) ThinSOT
TM
Package
17MHz to 170MHz
Resistor Set SOT-23 Oscillator
High Frequency Precision Oscillator
High Speed Data Bus Clock
Fixed Crystal Oscillator Replacement
Ceramic Oscillator Replacement
The LTC
6905 precision, programmable silicon oscillator
is easy to use and occupies very little board space. It
requires only a single resistor to set the output frequency
from 17MHz to 170MHz with a typical frequency error of
0.5% or less.
The LTC6905 operates with a single 2.7V to 5.5V power
supply and provides a rail-to-rail, 50% duty cycle square
wave output. The CMOS output driver ensures fast rise/fall
times and rail-to-rail switching. Operation is simple: A
single resistor, R
SET
, between 10K to 25K is used to set the
frequency, and an internal three-state divider (DIV input)
allows for division of the master clock by 1, 2 or 4,
providing three frequencies for each R
SET
value.
The LTC6905 features a proprietary feedback loop that
linearizes the relationship between R
SET
and frequency,
eliminating the need for tables to calculate frequency. The
oscillator can be easily programmed using the simple
formula outlined below:
f
MHz
k
R
MHz
N
N
Open
OSC
SET
=
+
=
=
=
=
+
168 5
10
1 5
1
1
2
4
.
.
,
,
,
,
DIV Pin
V
DIV Pin
DIV Pin
GND
For higher accuracy, fixed frequency versions that include
an internal frequency-setting resistor, see the LTC6905-
XXX Series datasheet.
Basic Connection
Typical Distribution of Frequency Error, T
A
= 25C
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
V
+
1
2
3
5
17.225MHz f
OSC
170MHz
5V
5V
10k R
SET
25k
0.1F
6905 TA01
4
GND
LTC6905
SET
OUT
DIV
OPEN
2
1
4
% ERROR
0.5
0
UNITS
10
20
30
40
50
60
NOTE: RESISTOR, R
SET
, TOLERANCE WILL ADD
TO THE FREQUENCY ERROR
0.3
0.1
0.1
0.3
6905 TA02
0.5
V
+
= 3V
R
SET
= 12k
DIV = 1
LTC6905
2
6905fa
Supply Voltage (V
+
) to GND ........................ 0.3V to 6V
DIV to GND .................................... 0.3V to (V
+
+ 0.3V)
SET to GND ................................... 0.3V to (V
+
+ 0.3V)
Output Short-Circuit Duration (Note 6) ........... Indefinite
Operating Temperature Range (Note 7)
LTC6905C, I ....................................... 40C to 85C
LTC6905H ........................................ 40C to 125C
Specified Temperature Range (Note 8)
LTC6905C ............................................... 0C to 70C
LTC6905I .............................................40C to 85C
LTC6905H .........................................40C to 125C
Storage Temperature Range ................. 65C to 150C
Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER
T
JMAX
= 125C,
JA
= 150C/W
LTC6905CS5
LTC6905IS5
LTC6905HS5
(Note 1)
TOP VIEW
S5 PACKAGE
5-LEAD PLASTIC SOT-23
1
2
3
V
+
GND
SET
5
4
OUT
DIV
S5 PART MARKING
LTBJC
ABSOLUTE AXI U RATI GS
W
W
W
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PACKAGE/ORDER I FOR ATIO
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W
The
denotes the specifications which apply over the full specified
temperature range, otherwise specifications are at T
A
= 25C or as noted. V
+
= 2.7V to 5.5V, R
L
= 15k, C
L
= 5pF, Pin 4 = V
+
unless
otherwise noted. All voltages are with respect to GND.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
f
Frequency Accuracy (Notes 2, 9)
V
+
= 2.7V, 17.225MHz < f < 170MHz
0.5
1.4
%
V
+
= 5V, 17.225MHz < f < 170MHz
2.2
%
LTC6905CS5
V
+
= 2.7V, 17.225MHz < f < 170MHz
1.7
%
V
+
= 5V, 17.225MHz < f < 170MHz
2.5
%
LTC6905HS5 (25C T 125C),
LTC6905IS5 (25C T 85C)
V
+
= 2.7V, 17.225MHz < f < 170MHz
1.9
%
V
+
= 5V, 17.225MHz < f < 170MHz
2.9
%
LTC6905HS5 (40C T 125C),
LTC6905IS5 (40C T 85C)
V
+
= 2.7V, 17.225MHz < f < 170MHz
3.5
%
V
+
= 5V, 17.225MHz < f < 170MHz
3.5
%
R
SET
Frequency-Setting Resistor Range
10
25
k
f
MAX
Maximum Frequency
Pin 4 = V
+
, N = 1
170
MHz
f
MIN
Minimum Frequency
Pin 4 = 0V, N = 4
17.225
MHz
f/T
Freq Drift Over Temp (Note 2)
R
SET
= 10k
20
ppm/C
f/V
Freq Drift Over Supply (Notes 2, 9)
V
+
= 2.7V to 5.5V, R
SET
= 10k
0.5
%/V
Timing Jitter (Note 3)
0.8
%
Long-Term Stability of Output Frequency
300
ppm/kHr
Duty Cycle
47.5
50
52.5
%-
V
+
Operating Supply Range
2.7
5.5
V
I
S
Power Supply Current
R
SET
= 10k, N = 1, R
L
= ,
V
+
= 5.5V
14
20
mA
f
OSC
= 170MHz, C
L
= 5pF
V
+
= 2.7V
7
12
mA
R
SET
= 20k, N = 4, R
L
= ,
V
+
= 5.5V
5
7
mA
f
OSC
= 21.44MHz, C
L
= 5pF
V
+
= 2.7V
3
5
mA
V
IH
High Level DIV Input Voltage
V
+
0.15
V
ELECTRICAL CHARACTERISTICS
LTC6905
3
6905fa
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
The
denotes the specifications which apply over the full specified
temperature range, otherwise specifications are at T
A
= 25C or as noted. V
+
= 2.7V to 5.5V, R
L
= 15k, C
L
= 5pF, Pin 4 = V
+
unless
otherwise noted. All voltages are with respect to GND.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Frequency accuracy is defined as the deviation from the f
OSC
equation. Accuracy is tested with DIV = V
+
, N = 1 and other divide ratios
are guaranteed by design.
Note 3: Jitter is the ratio of the peak-to-peak distribution of the period to
the mean of the period. This specification is based on characterization and
is not 100% tested.
Note 4: To conform with the Logic IC Standard convention, current out of
a pin is arbitrarily given as a negative value.
Note 5: Output rise and fall times are measured between the 10% and
90% power supply levels.
ELECTRICAL CHARACTERISTICS
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
Supply Current vs Frequency
FREQUENCY (MHz)
0
SUPPLY CURRENT (mA)
10
12
14
200
6905 G01
8
4
4
1
1
6
0
2
50
100
150
4
18
16
5.5V
2.7V
2
2
R
SET
(k)
10
FREQUENCY ERROR (%)
0
0.20
0.40
22
6905 G02
0.20
0.40
12
14
16
18
20
24
0.60
0.80
0.60
SUPPLY VOLTAGE (V)
2.5
0.40
FREQUENCY ERROR (%)
0.20
0.20
0.40
0.60
4.5
1.40
6905 G03
0
3.5
3
5
4
5.5
0.80
1.00
1.20
Frequency Error vs R
SET
Frequency Error vs Supply Voltage
V
IL
Low Level DIV Input Voltage
0.2
V
I
DIV
DIV Input Current (Note 4)
Pin 4 = V
+
V
+
= 5.5V
15
40
A
Pin 4 = 0V
V
+
= 5.5V
40
11
A
V
OH
High Level Output Voltage (Note 4)
V
+
= 5.5V
I
OH
= 1mA
5.25
5.45
V
I
OH
= 4mA
5.20
5.30
V
V
+
= 2.7V
I
OH
= 1mA
2.5
2.6
V
I
OH
= 4mA
2.4
2.4
V
V
OL
Low Level Output Voltage (Note 4)
V
+
= 5.5V
I
OL
= 1mA
0.05
0.25
V
I
OL
= 4mA
0.2
0.3
V
V
+
= 2.7V
I
OL
= 1mA
0.1
0.3
V
I
OL
= 4mA
0.4
0.5
V
t
r
,
t
f
OUT Rise/Fall Time (Note 5)
0.5
ns
V
SET
Voltage at R
SET
Pin
V
+
= 5.5V
4.27
4.5
4.73
V
V
+
= 2.7V
1.61
1.7
1.79
V
Note 6: A heat sink may be required to keep the junction temperature
below the absolute maximum when the output is shorted indefinitely.
Note 7: The LTC6905C is guaranteed functional over the operating
temperature range.
Note 8: The LTC6905 is guaranteed to meet specified performance from
0C to 70C. The LTC6905C-XXX is designed, characterized and expected
to meet specified performance from 40C to 85C but is not tested or QA
sampled at these temperatures. The LTC6905I-XXX is guaranteed to meet
specified performance from 40C to 85C.
Note 9: The LTC6905 is optimized for the performance with a 3V power
supply voltage. Please consult LTC Marketing for parts optimized for 5V
operation.
LTC6905
4
6905fa
LTC6905 Output Operating at
17.5MHz, V
S
= 3V
LTC6905 Output Operating at
170MHz, V
S
= 3V
R
OUT
vs V
+
Jitter vs Frequency
SUPPLY VOLTAGE (V)
2.5
0
OUTPUT RESISTANCE (
)
5
15
20
25
4.5
45
6905 G04
10
3.5
3
5
4
5.5
30
35
40
FREQUENCY (MHz)
0
0
JITTER (%)
0.20
0.60
4
2
1
0.80
1.00
40
80 100
180
6905 G05
0.40
20
60
120 140 160
1.20
12.5ns/DIV
6905 G06
1ns/DIV
6905 G07
TYPICAL PERFOR A CE CHARACTERISTICS
U
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TEMPERATURE (C)
40
1.0
PERCENTAGE ERROR (%)
0.8
0.4
0.2
0
1.0
0.4
0
40
60
6905 G08
0.6
0.6
0.8
0.2
20
20
80
100 120
Frequency vs Temperature
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PI FU CTIO S
V
+
(Pin 1): Voltage Supply (2.7V V
+
5.5V). This supply
must be kept free from noise and ripple. It should be
bypassed directly to the GND (Pin 2) with a 0.1F capacitor
or higher.
GND (Pin 2): Ground. Should be tied to a ground plane for
best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V
+
deter-
mines the oscillator frequency. The voltage on this pin is
held by the LTC6905 to approximately 1V below the V
+
voltage. For best performance, use a precision metal film
resistor with a value between 10k and 25k and limit the
capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the value
of N in the frequency equation. Pin 4 should be tied to V
+
for the 1 setting, the highest frequency range. Floating Pin
4 divides the master oscillator by 2. Pin 4 should be tied to
GND for the 4 setting, the lowest frequency range. To detect
a floating DIV pin, the LTC6905 attempts to pull the pin
toward midsupply. This is realized with two internal current
sources, one tied to V
+
and Pin 4 and the other one tied to
ground and Pin 4. Therefore, driving the DIV pin high re-
quires sourcing approximately 15A. Likewise, driving DIV
low requires sinking 15A. When Pin 4 is floated, it should
be bypassed by a 1nF capacitor to ground or it should be
surrounded by a ground shield to prevent excessive cou-
pling from other PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5k
and/or 5pF loads. For larger loads, refer to the Applications
Information section.
1V/DIV
1V/DIV
LTC6905
5
6905fa
BLOCK DIAGRA
W
THEORY OF OPERATIO
U
As shown in the Block Diagram, the LTC6905's master
oscillator is controlled by the ratio of the voltage between
the V
+
and SET pins and the current entering the SET pin
(I
RES
). The voltage on the SET pin is forced to approxi-
mately 1V below V
+
by the PMOS transistor and its gate
bias voltage.
A resistor R
SET
, connected between the V
+
and SET pins,
"locks together" the voltage (V
+
V
SET
) and current, I
RES
,
variation. This provides the LTC6905's high precision. The
master oscillation frequency reduces to:
f
MHz
k
R
MHz
MO
SET
=
+
168 5
10
1 5
.
.
To extend the output frequency range, the master oscilla-
tor signal is divided by 1, 2 or 4 before driving OUT (Pin
5). The LTC6905 is optimized for use with resistors
between 10k and 25k, corresponding to oscillator fre-
quencies between 17.225MHz and 170MHz. The divide-
by value is determined by the state of the DIV input
(Pin 4). Tie DIV to V
+
or drive it to within 0.4V of V
+
to
select 1. This is the highest frequency range, with the
Figure 1. R
SET
vs Output Frequency
master output frequency passed directly to OUT. The DIV
pin may be floated or driven to midsupply to select 2, the
intermediate frequency range. The lowest frequency range,
4, is selected by tying DIV to GND or driving it below
0.5V. Figure 1 shows the relationship between R
SET
,
divider setting and output frequency, including the over-
lapping frequencies.
OUTPUT FREQUENCY (MHz)
10
R
SET
(
)
15
20
4 2
1
6905 F01
10
5
60
110
160
30
25
+
+
+
1
3
GAIN = 1
V
+
V
BIAS
I
RES
I
RES
R
SET
SET
GND
MASTER OSCILLATOR
PROGRAMMABLE
DIVIDER
(1, 2 OR 4)
V
RES
= 1V 5%
(V
+
V
SET
)
THREE-STATE
INPUT DETECT
GND
V
+
15A
6905 BD
15A
OUT
DIVIDER
SELECT
5
DIV
4
2
f
OSC
=
f
MO
N
LTC6905
6
6905fa
APPLICATIO S I FOR ATIO
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SELECTING THE DIVIDER SETTING AND RESISTOR
The LTC6905's master oscillator has a frequency range
spanning 68.9MHz to 170MHz. A programmable divider
extends the frequency range from 17.225MHz to 170MHz.
Table 1 describes the recommended frequencies for each
divider setting. Note that the ranges overlap; at some
frequencies there are two divider/resistor combinations
that result in the same frequency. Choosing a higher
divider setting will result in less jitter at the expense of
slightly higher supply current.
Table 1. Frequency Range vs Divider Setting
DIVIDER SETTING
FREQUENCY RANGE
1
DIV (Pin 4) = V
+
68.9MHz to 170MHz
2
DIV (Pin 4) = Floating
34.45MHz to 85MHz
4
DIV (Pin 4) = GND
17.225MHz to 43MHz
After choosing the proper divider setting, determine the
correct frequency-setting resistor. Because of the linear
correspondence between oscillation period and resis-
tance, a simple equation relates resistance with frequency.
R
k
N
MHz
f
MHz
SET
OSC
=
10
168 5
1 5
1
2
4
.
.
, N =
(R
SETMIN
= 10k, R
SETMAX
= 25k)
Any resistor, R
SET
, tolerance adds to the inaccuracy of the
oscillator, f
OSC
.
START-UP TIME
The start-up time and settling time to within 1% of the final
frequency is typically 100s.
MAXIMUM OUTPUT LOAD
The LTC6905 output (Pin 5) can drive a capacitive load
(C
LOAD
) of 5pF or more. Driving a C
LOAD
greater than 5pF
depends on the oscillator's frequency (f
OSC
) and output
resistance (R
OUT
). The output rise time or fall time due to
R
OUT
and C
LOAD
is equal to 2.2
R
OUT
C
LOAD
(from 10%
to 90% of the rise or fall transition). If the total output rise
time plus fall time is arbitrarily specified to be equal to or
less than 20% of the oscillator's period (1/f
OSC
), then the
maximum output C
LOAD
in
picofarads (pF)
should be equal
to or less than [45454/(R
OUT
f
OSC
)] (R
OUT
in ohms and
f
OSC
in MHz).
Example: An LTC6905 is operating with a 3V power supply
and is set for a f
OSC
= 50MHz.
R
OUT
with V
+
= 3V is 27 (using the R
OUT
vs V
+
graph in
the Typical Performance Characteristics).
The maximum output C
LOAD
should be
equal to or less
than [45454/(27 50)] = 33.6pF.
The lowest resistive load Pin 5 can drive can be calculated
using the minimum high level output voltage in the Elec-
trical Characteristics. With a V
+
equal to 5.5V and 4mA
output current, the minimum high level output voltage is
5V and the lowest resistive load Pin 5 can drive is 1.25k
(5V/4mA). With a V
+
equal to 2.7V and 4mA output
current, the minimum high level output voltage is 1.9V and
the lowest resistive load Pin 5 can drive is 475 (1.9V/4mA).
FREQUENCY ACCURACY AND POWER SUPPLY NOISE
The frequency accuracy of the LTC6905 may be affected
when its power supply generates noise with frequency
contents equal to f
MO
/64 or its multiples (f
MO
is the internal
LTC6905
master oscillator frequency before the divider
and f
MO
/64 is the master oscillator control loop fre-
quency). If for example, the master oscillator frequency is
set equal to 80MHz and the LTC6905 is powered by a
switching regulator, then the oscillator frequency may
show an additional error if the switching frequency is
1.4MHz (80MHz/64).
JITTER AND POWER SUPPLY NOISE
If the LTC6905 is powered by a supply that has frequency
contents equal to the output frequency then the oscillators
jitter may increase. In addition, power supply ripple in
excess of 20mV at any frequency may increase jitter.
JITTER AND DIVIDE RATIO
At a given output frequency, a higher master oscillator
frequency and a higher divide ratio will result in lower jitter
and higher power supply dissipation. Indeterminate jitter
percentage will decrease by a factor of slightly less than
the square root of the divider ratio, while determinate jitter
will not be similarly attenuated. Please consult the speci-
fication tables and Jitter vs Frequency graph showing jitter
at various divider ratios.
LTC6905
7
6905fa
APPLICATIO S I FOR ATIO
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JITTER AND STRAY CAPACITANCE ON THE SET PIN
(PIN 3)
The stray capacitance on the SET pin (Pin 3) should be
limited to 10pF or less to avoid increased jitter or unstable
oscillation.
LTC6905 SUGGESTED CRITICAL COMPONENT
LAYOUT
In order to provide the specified performance, it is re-
quired that the frequency setting resistor R
SET
and the
supply bypass capacitor be placed as close as possible to
the LTC6905. The following additional rules should be
followed for best performance:
1) The bypass capacitor must be placed as close as
possible to the LTC6905, and no vias should be placed
between the capacitor and the LTC6905. The bypass
capacitor must be on the same side of the circuit board
as the LTC6905.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
2) The resistor R
SET
should be placed as close as possible
to the LTC6905, and the connection of R
SET
to V
CC
should be closely shared with the bypass capacitor. The
resistor R
SET
may be placed on the opposite side of the
board from the LTC6905, directly underneath the by-
pass capacitor.
3) If a ground plane is used, the connection of the LTC6905
to the ground plane should be as close as possible to the
LTC6905 GND pin and should be composed of multiple,
high current capacity vias.
PACKAGE DESCRIPTIO
U
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
1.50 1.75
(NOTE 4)
2.80 BSC
0.30 0.45 TYP
5 PLCS (NOTE 3)
DATUM `A'
0.09 0.20
(NOTE 3)
S5 TSOT-23 0302
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 0.90
1.00 MAX
0.01 0.10
0.20 BSC
0.30 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
Figure 2. LTC6905 Suggested Critical Component Layout
LTC6905
6905 F02
C
R
LTC6905
8
6905fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2005
LT/TP 0205 1K REV A PRINTED IN USA
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APPLICATIO S I FOR ATIO
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Figure 3. Current Controlled Oscillator
Figure 4. Voltage Controlled Oscillator
f
N
MHz
k
V
V
R
I
V
V
MHz
OSC
SET
SET
CNTRL
SET
=
+
+
+
1
168 5
10
1 5
.
.
I
CNTRL
Frequency 100kHz
Example (Figure 3): V
SET
= (V
+
1V), R
SET
= 10k, N = 1
f
MHz
k
I
MHz
OSC
CNTRL
=
(
)
+
[
]
168 5
1 10
1 5
.
.
f
N
MHz
k
V
V
R
V
V
R
V
V
MHz
OSC
SET
SET
SET
CNTRL
CNTRL
SET
=
+
+
+
1
168 5
10
1 5
.
.
V
CNTRL
Frequency 100kHz
Example (Figure 4): V
SET
= (V
+
1V), R
SET
= 10k, R
CNTRL
= 33.2k,
N = 1, V
+
= 3V
f
MHz
k
k
V
V
k
MHz
OSC
CNTRL
=
+
168 5
10
1
10
2
33 2
1 5
.
.
.
ALTERNATIVE METHODS OF SETTING THE OUTPUT
FREQUENCY OF THE LTC6905
The LTC6905 may be programmed by any method that
sources a current into the SET pin (Pin 3). The accuracy of
the programming is best with a simple resistor because
the LTC6905 takes into account both the voltage at the SET
pin and the current into the SET pin when generating the
output frequency. Since the voltage at the SET pin can vary
by as much as 5%, setting the frequency using a current
rather than a resistor will result in as much as 5% addi-
tional inaccuracy in the output frequency.
Figure 3 shows a method to control the frequency of the
LTC6905 using a current source. R
SET
, in this case, sets a
maximum frequency according to the regular expression
for f
OSC
. The current source will subtract current from the
SET pin to lower the frequency.
Figure 4 shows a method for controlling the frequency of
the LTC6905 using a voltage source. In this case, R
SET
sets
a constant current into the SET pin, and R
CNTRL
will sub-
tract from this current in order to change the frequency.
Increasing V
CNTRL
will increase the output frequency.
V
+
1
2
3
5
f
OSC
69.8MHz TO 170MHz
V
+
0.1F
I
CNTRL
0A TO 60A
R
SET
10k
6905 F03
4
GND
V
+
N = 1
LTC6905
SET
OUT
DIV
V
+
1
2
3
5
V
+
= 3V
0.1F
R
SET
10k
V
CNTRL
0V TO 2V
6905 F04
4
GND
V
+
N = 1
LTC6905
SET
OUT
DIV
+
R
CNTRL
33.2k
f
OSC
69.8MHz TO 170MHz
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