1 (10)
DA9138.003
29 January, 2001
MAS9138
ASYNCHRONOUS TO SYNCHRONOUS CONVERTER
Pin compatible with MAS7838
Interfaces a duplex asynchronous to synchronous channel
Modem speeds of 600, 1.2k, 2.4k, 4.8k, 7.2k, 9.6k, 12k,
14.4k, 19.2k and 38.4k bps with a single 4.9152 MHz crystal
DESCRIPTION
MAS9138 is a single chip duplex asynchronous to
synchronous converter. It converts asynchronous start
stop characters to synchronous format, with stop bit
deletion when required as defined in the CCITT
recommendation V.14. On the receiver channel
MAS9138 converts the incoming synchronous data to
asynchronous start stop character format with stop bit
insertion when required as defined in the CCITT
recommendation V.14. MAS9138 implements the data
modes for the synchronous interface as specified in the
V.14. MAS9138 can be configured to operate at any
frequency up to 38.4 kbits/s within these modes. The
device contains a bit generator and frequency selection
logic to allow easy operation at other data rates. With
just one crystal the device can adapt to ten (10)
different bit rates so it is ideally suited to be used with
the most common modem systems ranging from V.22
to V.34.
FEATURES
APPLICATION
Implements CCITT recommendation V.14
Bypass
operation
Character length from 8 to 11 bits including start
stop and parity bits
CMOS and LS-TTL compatible interface
Low power consumption (typically 10 mW)
No additional circuitry needed to perform conversion
Single +3.3...+5V supply
Operating temperature -40
o
C to 85
o
C
16-pin PDIP and SO package
Data communication systems
Adapts asynchronous terminals to synchronous
modems
Full or half card PC modems using UART as a data
source
Simplifying data multiplexing systems
BLOCK DIAGRAM
CL1
CL2
ESR
TMG
OSC
TSL
TXC
TDO
RXC
RDI
ASY
HST
VSS
VDD
TDI
RDO
CONTROL
O
S
C
ASYNC
TO
SYNC
SYNC
TO
ASYNC
>
1
_
MAS9138
2 (10)
DA9138.003
29 January, 2001
PIN CONFIGURATION
PDIP 16
TSL
TMG
OSC
TXC*
CL1
CL2
XESR
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 VDD
RXC
RDI
RDO
XHST
XASY
TDO
TDI
TSL
TMG
OSC
TXC*
CL1
CL2
XESR
VSS
1
2
3
4
5
6
7
8
SO16
9
10
11
12
13
14
15
16 VDD
RXC
RDI
RDO
XHST
XASY
TDO
TDI
MAS9138N
MAS9138S
9138
XXXXX.X
YYWW
9138
XXXXX.X
YYWW
Top marking: YYWW = Year Week, XXXXX.X = Lot Number, =ESD Indicator
PIN DESCRIPTION
Pin name
Pin no.
I/O
Function
PDIP
SO
TSL
1
1
I
Timing select. 0 selects external sampling timing 16 x TXC from pin 2,
TMG. 1 selects internal sampling timing.
TMG
2
2
I
Timing. Square wave timing signal 16 x TXC (TSL = 0) or 128 x
TXCmax (TSL = 1).
Max f = 10 Mhz when VDD = 5v and 5MHz when VDD = 3.3v.
OSC
3
3
O
Oscillator. Output for crystal. If used, the crystal is connected between
pins 2 and 3.
TXC
4
4
I
Transmitter timing (MAS9138 only).
Synchronous square wave timing for transmitter. The transmitted data
output, TDO is synchronized to the rising edge of TXC. The duty cycle
of TXC has to be 50% +/- 5%.
CL1
5
5
I
Character length. The total character length including one start bit, one
stop bit and possible parity bit is selected with the CL1 and CL2
signals.
CL2
6
6
I
XESR
7
7
I
Extended signalling rate. The tolerance of the synchronous bit rate can
be:
XESR = 1 (basic signalling rate) TXC -2.5%...+1.0%
XESR = 0 (extended signalling rate) TXC -2.5%...2.3%
VSS
8
8
G
Ground
3 (10)
DA9138.003
29 January, 2001
PIN DESCRIPTION
Pin name
Pin no.
I/O
Function
PDIP
SO
TDI
9
9
I
Transmitter data input. 1 = mark or stop bit. 0 = space, start or break
signal.
TDO
10
10
O
Transmitter data output. Output data is synchronized to the
synchronous timing signal TXC (pin 4). 1 = mark. 0 = space.
XASY
11
11
I
Asynchronous mode. XASY = 0 Asynchronous transmission, XASY = 1
Synchronous transmission. In synchronous transmission the converter
is totally bypassed in both directions: TDI = TDO, RDI = RDO
XHST
12
12
I
Higher speed signalling timing. XHST = 1 normal synchronous to
asynchronous conversion (CCITT V.14). XHST = 0 asynchronous to
synchronous conversion with higher speed synchronous timing (TXC,
RXC). TXC and RXC timing must be 1-2% higher than the normal bit
rate in order to allow some overspeed in the asynchronous data.
On the receiver side the RX buffer is deleted and the synchronous
data RDI is directly connected to the asynchronous output RDO.
RDO
13
13
O
Receiver data output. RDO is the received data converted back to
asynchrnous mode.
1 = mark or stop bit, 0 = space, start or break signal
RDI
14
14
I
Receiver data input. 1 = mark, 0 = space. The received data must be
synchronized to the receiver timing RXC from the synchronous
channel (pin 15).
RXC
15
15
I
Receiver timing (MAS9138 only). Receiver square wave timing from
the synchronous channel. The received data RDI must be
synchronized to the rising edge of RXC.
VDD
16
16
P
Power supply
ABSOLUTE MAXIMUM RATINGS
(GND = 0V)
Parameter
Symbol
Conditions
Min
Max
Unit
Supply Voltage
VDD
-0.5
5.5
V
Storage Temperature
Ts
-55
+150
o
C
RECOMMEDED OPERATION CONDITIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Supply Voltage
VDD
3
3.3 to
5.0
5.25
V
Supply current
IDD
VDD = 5V
2
5
mA
Operating Temperature
Ta
-40
+85
o
C
4 (10)
DA9138.003
29 January, 2001
ELECTRICAL CHARACTERISTICS
u
Inputs
(test conditions: -40
o
C to 85
o
C)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input low voltage
V
IL
VDD=5V, VSS=0V
0.8
V
VDD=3.3V, VSS=0V
0.4
V
Input high voltage
V
IH
VDD=5V, VSS=0V
2
V
VDD=3.3V, VSS=0V
1.4
V
Input leakage current
I
IL
VDD=5V, VSS=0V
-100
A
VDD=3.3V, VSS=0V
-100
A
Input capacitance load
C
I
VDD=5V, VSS=0V
1
pF
VDD=3.3V, VSS=0V
1
pF
Internal pull-up resistor for
digital inputs
R
pull-up
VDD=5V, VSS=0V, VIN=0.4V
150
k
VDD=5V, VSS=0V, VIN=2.5V
300
k
VDD=3.3V, VSS=0V,
VIN=0.4V
200
275
350
k
VDD=3.3V, VSS=0V,
VIN=1.5V
600
1000
1500
k
u
Outputs (TDO, RDO)
(test conditions: -40
o
C to 85
o
C)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output low voltage
V
OL
VDD=5V, VSS=0V, I
OL
=+1.8mA
0.4
V
VDD=3.3V, VSS=0V,
I
OL
=+0.6mA
0.2
V
Output high voltage
V
OH
VDD=5V, VSS=0V, I
OL
=-4.3mA
3.0
V
VDD=3.3V, VSS=0V, I
OL
=-
2.1mA
1.8
V
u
Outputs (OSC)
(test conditions: -40
o
C to 85
o
C)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output low voltage
V
OL
VDD=5V, VSS=0V, I
OL
=+0.5mA
0.4
V
VDD=3.3V, VSS=0V,
I
OL
=+0.19mA
0.2
V
Output high voltage
V
OH
VDD=5V, VSS=0V, I
OL
=-1.4mA
3.0
V
VDD=3.3V, VSS=0V, I
OL
=-
0.7mA
1.8
5 (10)
DA9138.003
29 January, 2001
u
Data timing
(test conditions:VDD=3.3V - 5V, VSS=0V, -40
o
C to 85
o
C)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Low to high logic transition
time
t
R
CL = 10pF
20
ns
High to low logic transition
time
t
R
CL = 10 pF
20
ns
(test conditions:VDD=3.3V - 5V, VSS=0V, -40
o
C to 85
o
C, TSL = 1)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
TDO delay time after TXC
T1
50
T
TXC
/16
+ 350
ns
RDI setup time before RXC
T2
1/4
T
RXC
ns
RDI hold time after RXC
T3
1/4
T
RXC
ns
(test conditions:VDD=3.3V - 5V, VSS=0V, -40
o
C to 85
o
C, TSL = 0, TMG = 16xTXC)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
TDO delay time after TXC
T1
50
1/TMG
+ 350
ns
RDI setup time before RXC
T2
1/4
T
RXC
ns
RDI hold time after RXC
T3
1/4
T
RXC
ns
TIMING DIAGRAMS
The MAS9138 shifts the data out with rising edge of TXC. The data from RDI is read in with falling edge of RXC.
T
RXC
T2
T3
RXC
RDI
TXC
TDO
T
TXC
delay
T1
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