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DA9178.000
22 Apr, 2003
MAS9178
AM Receiver IC
High Sensitivity
Very Low Power Consumption
Wide Supply Voltage Range
Power Down Control
Control for AGC On
High Selectivity by Crystal Filter
Fast Startup Feature
DESCRIPTION
The MAS9178 AM-Receiver chip is a highly sensitive,
simple to use AM receiver specially intended to
receive time signals in the frequency range from 40
kHz to 100 kHz. Only a few external components are
required for time signal receiver. The circuit has
preamplifier, wide range automatic gain control,
demodulator and output comparator built in. The
output signal can be processed directly by an
additional digital circuitry to extract the data from the
received signal. The control for AGC (automatic gain
control) can be used to switch AGC on or off if
necessary. Unlike MAS1016A and MAS1016B,
MAS9178 does not require AGC control procedure in
WWVB and JJY systems.
MAS9178A1 has differential input and internal 0.875
pF compensation capacitor for crystal shunt
capacitance compensation.
MAS9178A5 requires external compensation
capacitor for crystal shunt capacitance compensation.
It can be used with crystals that do not match with
fixed 0.875 pF compensation capacitance of
MAS9178A1.
FEATURES
APPLICATIONS
Highly Sensitive AM Receiver, 0.4
V
RMS
typ.
Wide Supply Voltage Range from 1.1 V to 3.6 V
Very Low Power Consumption
Power Down Control
Fast
Startup
Only a Few External Components Necessary
Control for AGC On
Wide Frequency Range from 40 kHz to 100 kHz
High Selectivity by Quartz Crystal Filter
Time Signal Receiver WWVB (USA), JJY (Japan),
DCF77 (Germany) and MSF (UK)
Receiver for ASK Modulated Data Signals
BLOCK DIAGRAM
AGC Amplifier
Power Supply/Biasing
Demodulator
&
Comparator
RFP
RFM
VDD
VSS
PDN
AGC
DEC
OUT
QOP
QI
QOM
AON
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DA9178.000
22 Apr, 2003
PAD LAYOUT
VDD QOP QI QOM AGC
VSS RFM RFP PDN AON
1906 m
1778 m
OUT
DEC
9178
A1
DIE size = 1.91 x 1.78 mm; PAD size = 100 x 100
m except for VSS PAD size 104 x 112
m
Note: Because the substrate of the die is internally connected to VDD, the die has to be connected to VDD or
left floating. Please make sure that VDD is the first pad to be bonded. Pick-and-place and all component
assembly are recommended to be performed in ESD protected area.
Note: Coordinates are pad center points where origin has been located in the center of VDD pad
Pad Identification
Name
X-coordinate
Y-coordinate
Note
Power Supply Voltage
VDD
0
m
0
m
Quartz Filter Output for Crystal
QOP
306
m
19
m
Quartz Filter Input for Crystal and External
Compensation Capacitor
QI
549
m
19
m
Quartz Filter Output for External
Compensation Capacitor
QOM
866
m
19
m
AGC Capacitor
AGC
1146
m
19
m
Receiver Output
OUT
1389
m
19
m
1
Demodulator Capacitor
DEC
1389
m
1428
m
AGC On Control
AON
1146
m
1428
m
2
Power Down Input
PDN
829
m
1428
m
3
Positive Receiver Input
RFP
586
m
1428
m
Negative Receiver Input
RFM
269
m
1428
m
Power Supply Ground
VSS
16
m
1407
m
Notes:
1) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced
(modulated)
-
the output is a current source/sink with |I
OUT
| > 5
A
-
at power down the output is pulled to VSS (pull down switch)
2) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)
-
Internal pull-up with current < 1
A which is switched off at power down
3) PDN = VSS means receiver on; PDN = VDD means receiver off
-
Fast start-up is triggered when the receiver is after power down (PDN=VDD) controlled to power up
(PDN=VSS) i.e. at the falling edge of PDN signal.
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DA9178.000
22 Apr, 2003
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Conditions
Min
Max
Unit
Supply Voltage
V
DD
-V
SS
-0.3
5.0
V
Input Voltage
V
IN
V
SS
-0.3
V
DD
+0.3
V
Power Dissipation
P
MAX
100
mW
Operating Temperature
T
OP
-20
70
o
C
Storage Temperature
T
ST
-40
120
o
C
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 1.4V, Temperature = 25C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Operating Voltage
V
DD
1.10
3.60
V
Current Consumption
I
DD
VDD=3.6 V, Vin=0
V
VDD=1.4 V, Vin=0
V
56
76
66
95
A
Stand-By Current
I
DDoff
0.1
A
Input Frequency Range
f
IN
40
100
kHz
Minimum Input Voltage
V
IN min
0.4
1
Vrms
Maximum Input Voltage
V
IN max
20
mVrms
Input Levels |l
IN
|<0.5
A
V
IL
V
IH
0.8 V
DD
0.2 V
DD
V
Output Current
V
OL
<0.2 V
DD
;V
OH
>0.8 V
DD
|I
OUT
|
5
A
Output Pulse
T
100ms
1
Vrms
V
IN
20 mVrms
50
140
ms
T
200ms
1
Vrms
V
IN
20 mVrms
150
230
ms
T
500ms
1
Vrms
V
IN
20 mVrms
400
500
600
ms
T
800ms
1
Vrms
V
IN
20 mVrms
700
800
900
ms
Startup Time
T
Start
Fast Start-up
Without Fast Start-up
12
3
s
min
Output Delay Time
T
Delay
50
100
ms
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DA9178.000
22 Apr, 2003
TYPICAL APPLICATION
AGC Amplifier
Power Supply/Biasing
Demodulator
&
Comparator
RFP
RFM
VDD
VSS
PDN
AGC
DEC
OUT
QOP
QI
QOM
AON
+
1.4 V
Receiver
Output
C
AGC
10
F
C
DEC
47 nF
Note 3
Power Down /
Fast Startup
Control
Note 2
Note 1
Note 4
Optional
Control
for AGC on/hold
Ferrite
Antenna
Figure 1
Application circuit of internal compensation capacitance version MAS9178A1.
AGC Amplifier
Power Supply/Biasing
Demodulator
&
Comparator
RFP
RFM
VDD
VSS
PDN
AGC
DEC
OUT
QOP
QI
QOM
AON
+
1.4 V
Receiver
Output
C
AGC
10
F
C
DEC
47 nF
Note 3
Power Down /
Fast Startup
Control
Note 2
Note 1
Note 4
Optional
Control
for AGC on/hold
Ferrite
Antenna
C
C_EXT
=C
0
Figure 2
Application circuit of external compensation capacitance version MAS9178A5.
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DA9178.000
22 Apr, 2003
TYPICAL APPLICATION (Continued)
AGC Amplifier
Power Supply/Biasing
Demodulator
&
Comparator
RFP
RFM
VDD
VSS
PDN
AGC
DEC
OUT
QOP
QI
QOM
AON
+
1.4 V
Receiver
Output
C
AGC
10
F
C
DEC
47 nF
Note 3
Power Down /
Fast Startup
Control
Note 2
Note 1
Note 4
Optional
Control
for AGC on/hold
Ferrite
Antenna
Figure 3
Dual band application circuit of external compensation capacitance version MAS9178A5.
Note 1: Crystal
The crystal as well as ferrite antenna frequencies are chosen according to the time-signal system (Table 1). The
crystal shunt capacitance C
0
should be matched as well as possible with the internal shunt capacitance
compensation capacitor C
C
=0.875 pF of MAS9178A1. External compensation pad QOM is unconnected in
MAS9178A1. MAS9178A5 does not have internal compensation capacitance C
C
and it requires use of external
compensation capacitor C
C_EXT
. It must be connected between pins QOM and QI (see figure 2). C
C_EXT
should
have equal value with crystal's effective shunt capacitance C
0
. External compensation version MAS9178A5
should be used when fixed 0.875 pF compensation capacitance of MAS9178A1 does not match well with used
crystal's shunt capacitance.
It should be noted that grounded crystal package has reduced shunt capacitance. This value is about 85% of
floating crystal shunt capacitance. PCB traces of crystal and external compensation capacitance should be kept
at minimum to minimize additional parasitic capacitance which can cause capacitance mismatching.
In dual band receiver the crystals can be connected in parallel thus external compensation capacitor value
C
C_EXT
must be sum of two crystals' shunt capacitances. In dual band receiver it is also possible to connect other
crystal from QOP pin and the other crystal from QOM pin to common QI pin (figure 3). In this circuit configuration
no external compensation capacitor is required since the crystals compensate each other.
Time-Signal System
Location
Antenna Frequency
Recommended Crystal Frequency
DCF77
Germany
77.5 kHz
77.503 kHz
MSF
United Kingdom
60 kHz
60.003 kHz
WWVB
USA
60 kHz
60.003 kHz
JJY
Japan
40 kHz and 60 kHz
40.003 kHz and 60.003 kHz
Table 1
Time-Signal System Frequencies
Note 2: AGC Capacitor
The AGC and DEC capacitors must have low leakage currents due to very small 40 nA signal currents through
the capacitors. The insulation resistance of these capacitors should be higher than 70 M
. Also probes with at
least 100 M
==
impedance should be used for voltage probing of AGC and DEC pins. Electrolyte capacitors
cannot be used due to their large leakage current. Instead low leakage tantalum capacitor can be used as AGC
capacitor. DEC capacitor can be low leakage chip capacitor.
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