DA9275.004
23 April 2003
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MAS9275
IC FOR 10.00 36.00 MHz VCXO
Low Power
Wide Supply Voltage Range
Square Wave Output
Very High Level of Integration
Very Low Phase Noise
Low Cost
DESCRIPTION
MAS9275 is an integrated circuit well suited to build
VCXO for telecommunication and other
applications. To build a VCXO only one additional
component a crystal is needed.
FEATURES
APPLICATIONS
Very small size
Minor current draw
Wide operating temperature range
Phase noise <-130 dBc/Hz at 1 kHz offset
Square wave output
VCXO for telecommunications systems
VCXO for set-top boxes
VCXO for MPEG2
BLOCK DIAGRAM
VSS
VC
VDD
X1
OUT
X2
X'Tal
MAS9275
PD
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PIN DESCRIPTION
Pin Description
Symbol
x-coordinate
y-coordinate
Note
Crystal/Varactor Oscillator Input
X1
209
161
Voltage Control Input
VC
425
165
Power Supply Ground
VSS
600
175
Buffer Output
OUT
1029
1030
Power Supply Voltage
VDD
841
1016
Tri State
PD
379
1028
Crystal Oscillator Output
X2
197
1030
Note:
Because the substrate of the die is internally connected to GND, the die has to be connected to GND or
left floating. Please make sure that GND is the first pad to be bonded. Pick-and-place and all component
assembly are recommended to be performed in ESD protected area.
Note:
Pad coordinates are measured from the left bottom corner of the chip to the center of the pads. The
coordinates may vary depending on sawing width and location, however, distances between pads are accurate.
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Min
Max
Unit
Note
Supply Voltage
V
DD
- V
SS
-0.3
6.0
V
Input Pin Voltage
V
SS
-0.3
V
DD
+ 0.3
V
Power Dissipation
P
MAX
100
mW
Storage Temperature
T
ST
-40
120
o
C
RECOMMENDED OPERATION CONDITIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Note
Supply Voltage
V
DD
2.5
2.8
5.5
V
1)
Supply Current
I
DD
VDD = 2.8 V
2.3
mA
Operating Temperature
T
OP
-30
+85
o
C
Storage Temperature
T
S
Relative humidity =
15%...70%
-5
+40
o
C
Crystal Pulling Sensitivity
S
30
ppm/pF
Crystal Load Capacitance
C
L
V
C
= 1.65 V
10
pF
2)
Note 1:
When using the device at VDD
5 V, we recommend connecting a 1 nF capacitor to the VDD pin.
Note 2:
MAS9275A1 has a typical crystal load capacitance of 8.0 pF.
MAS9275B2 has a typical crystal load capacitance of 10 pF.
MAS9275B3 has a typical crystal load capacitance of 12 pF.
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ELECTRICAL CHARACTERISTICS
(recommended operation conditions)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Frequency Range
f
o
10.00
36
MHz
1)
Voltage Control Range
V
C
0
VDD
V
Voltage Control Sensitivity
V
CSENS
100
ppm/V
2)
Output Voltage (10 pF, VDD 2.7 V)
V
out
2.3
Vpp
Output Voltage (10 pF, VDD 5.0 V)
V
out
4.5
Vpp
Rise and Fall Time (10 - 50 pF)
10
ns
Output Symmetry
40-60
%
Startup Time
T
START
2
ms
Tri State Output Buffer
ON State
OFF State
PD
0
1.6
0.55
VDD
V
Note 1:
An
R
S
< 20 crystal provides 36 MHz maximum frequency. With an R
S
= 70
=crystal the maximum
frequency is typically 20 MHz.
Note 2:
VC sensitivity value depends on the crystal used. With a 30 ppm/pF crystal typical values are:
A1 > 100 ppm/V, B2 > 75 ppm/V, B3 > 60 ppm/V.
IC OUTLINES
Note 1
: MAS9275 pads are round with 80 m diameter at opening.
Note 2:
Die map reference is the actual left bottom corner of the sawn chip.
VDD
PD
X2
VSS
X1
VC
MAS9275
OUT
1220 m
1
2
9
0
m
Die map reference
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EXTERNAL COMPONENT SELECTION
MAS9275 requires a minimum number of external components for proper operation.
Quartz Crystal
The MAS9275 VCXO function consists of the
external crystal and the integrated VCXO oscillator
circuit. To assure the best system performance
(frequency pull range) and reliability, a crystal
device with the recommended parameters (shown
below) must be used, and the layout guidelines in
the following section must be followed. The
frequency of oscillation of a quartz crystal is
determined by its "cut" and by the load capacitors
connected to it. MAS9275 incorporates on-chip
variable load capacitors that "pull" (change) the
frequency of the crystal. The crystal specified for
use with the MAS9275B2 is designed to have zero
frequency error when the total of on-chip + stray
capacitance is 10 pF (See Note 1 on page 2 for
other capacitance options).
Recommended Crystal Parameters:
Initial Accuracy at 25C 20 ppm
Temperature Stability 30 ppm
Crystal Load Capacitance 10 pf (See Note1 below)
Crystal Shunt Capacitance, C0 2 pF Typical
C0/C1 Ratio 300 Typical
Equivalent Series Resistance 20 max. Crystals with higher ESR can be used if frequency is < 36 MHz. See
Note 2 under Electrical Characteristics on Page 3.
The external crystal must be connected as close to the chip as possible and should be on the same side of the
PCB as the MAS9275. There should be no vias between the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the crystal.
Note 1.
If the crystal with a load other than 10 pF is used with MAS9275, the crystal has to have frequency offset
in order to have the nominal frequency at VC = 1.65 V. Please see table below for offset frequencies vs. crystal
load. (Values are for a typical crystal with S = 30 ppm/pF.)
Crystal f/MHz
19.68
19.68
27.00
40.00
Crystal Load /pF
8
10
12.5
16
Offset /ppm
+60
+5
-90
-180
Note:
19.68 MHz crystal with 10 pF load capacitance may not require frequency offset because of small
deviation
For example:
For application with nominal frequency of 27.00 MHz a crystal with 12.5 pF load has to have a frequency of
27.00 MHz + ((27.00 MHz/10
6
) x (- 90)) = 26.99757 MHz
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MODULATION RESPONSE
MAS9275 Modulation response
-10
-8
-6
-4
-2
0
2
0.1
1
10
100
Frequency (kHz)
G
a
in
(
d
B
)
MAS9275 Modulation response
0
0.2
0.4
0.6
0.8
1
1.2
0
5
10
15
Frequency (kHz)
M
odul
a
t
i
o
n (
k
H
z
)
Figure 2.
Modulation response (gain).
Figure 3.
Modulation response (modulation).
TYPICAL APPLICATION
M
A
S
9
2
7
5
Y
Y
W
W
X
X
X
X
X
.
X
2
1
20
3
4
5
6
7
8
9
10
19
18
17
16
15
14
13
12
11
VC
X1
GND
X2
OUT
VDD
Top marking:
YYWW = Year, Week
XXXXX.X = Lot number
PD
PD
C6
10n
Vdd
Vcontrol
R2
56p
C2
47n
R1
100k
500k
Modulation In
1n
C3
C1
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