ChipFind - документация

Электронный компонент: MAX1450E

Скачать:  PDF   ZIP
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
General Description
The MAX1450 sensor signal conditioner is optimized for
piezoresistive sensor calibration and temperature com-
pensation. It includes an adjustable current source for
sensor excitation and a 3-bit programmable-gain amplifi-
er (PGA). Achieving a total typical error factor within
1% of the sensor's inherent repeatability errors, the
MAX1450 compensates offset, full-span output (FSO), off-
set tempco, FSO tempco, and FSO nonlinearity of silicon
piezoresistive sensors via external trimmable resistors,
potentiometers, or digital-to-analog converters (DACs).
The MAX1450 is capable of compensating sensors that
display close error distributions with a single tempera-
ture point, making it ideal for low-cost, medium-accuracy
applications. Although optimized for use with popular
piezoresistive sensors, it may also be used with other
resistive sensor types such as strain gauges.
Customization
Maxim can customize the MAX1450 for unique require-
ments including improved power specifications. With a
dedicated cell library consisting of more than 90 sen-
sor-specific functional blocks, Maxim can quickly pro-
vide customized MAX1450 solutions. Contact the
factory for additional information.
Applications
Piezoresistive Pressure and Acceleration
Transducers and Transmitters
Manifold Absolute Pressure (MAP) Sensors
Automotive Systems
Hydraulic Systems
Industrial Pressure Sensors
Features
o
1% Sensor Signal Conditioning
o
Corrects Sensor Errors Using Coefficients Stored
in External Trimmable Resistors, Potentiometers,
or DACs
o
Compensates Offset, Offset TC, FSO, FSO TC,
and FSO Linearity
o
Rail-to-Rail
Analog Output
o
Programmable Current Source for Sensor
Excitation
o
Fast Signal-Path Settling Time (< 1ms)
o
Accepts Sensor Outputs from 10mV/V to 30mV/V
o
Fully Analog Signal Path
MAX1450
Low-Cost, 1%-Accurate Signal Conditioner
for Piezoresistive Sensors
________________________________________________________________
Maxim Integrated Products
1
PGA
A = 1
OUT
ISRC
BDRIVE
INP
INM
SOTC
SOFF
OFFTC
OFFSET
BBUF
A2
FSOTRIM
A1
A0
+
-
V
DD
V
SS
CURRENT
SOURCE
V
DD
MAX1450
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
INM
V
SS
BDRIVE
ISRC
SOTC
I.C.
I.C.
INP
TOP VIEW
I.C.
V
DD
OUT
A2
OFFTC
A0
A1
SOFF
12
11
9
10
I.C.
FSOTRIM
BBUF
OFFSET
MAX1450
SSOP
Pin Configuration
19-1365; Rev 0; 5/98
PART
MAX1450CAP
MAX1450C/D
MAX1450EAP
-40C to +85C
0C to +70C
0C to +70C
TEMP. RANGE
PIN-PACKAGE
20 SSOP
Dice*
20 SSOP
*
Dice are tested at T
A
= +25C, DC parameters only.
Functional Diagram
Ordering Information
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
MAX1450
Low-Cost, 1%-Accurate Signal Conditioner
for Piezoresistive Sensors
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
DD
= +5V, V
SS
= 0, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25C.)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage, V
DD
to V
SS
......................................-0.3V to +6V
All Other Pins ...................................(V
SS
- 0.3V) to (V
DD
+ 0.3V)
Short-Circuit Duration, OUT, BBUF, BDRIVE .............Continuous
Continuous Power Dissipation (T
A
= +70C)
SSOP (derate 8.00mW/C above +70C) ....................640mW
Operating Temperature Range
MAX1450CAP .....................................................0C to +70C
MAX1450EAP ..................................................-40C to +85C
Storage Temperature Range .............................-65C to +165C
Lead Temperature (soldering, 10sec) .............................+300C
T
A
= +25C (Note 1)
DC to 10Hz, gain = 39,
sensor impedance = 5k
V
OUT
= (V
SS
+ 0.25V) to (V
DD
- 0.25V)
,
T
A
= +25C
(Note 5)
(Note 4)
5k
load to V
SS
or V
DD,
T
A
= +25C
From V
SS
to V
DD
63% of final value
(Notes 2, 3)
Eight selectable gains (Table 3)
CONDITIONS
V
RMS
500
Output Noise
mA
-1.0
1.0
(sink)
(source)
Output Current Range
V
V
SS +
V
DD -
0.25
0.25
Output Voltage Swing
V/V
36
39
44
Minimum Differential Signal
Gain
V/V
39 to 221
Differential Signal Range Gain
mA
2.8
3.5
I
DD
Supply Current
mV/V
10 to 30
Input-Referred Adjustable
Full-Span Output Range
mV
100
Input-Referred Adjustable Offset
Range
dB
90
CMRR
Common-Mode Rejection Ratio
ms
1
Output Step-Response Time
M
1.0
R
IN
Input Impedance
V/C
0.5
Input-Referred Offset
Temperature Coefficient
%V
DD
0.01
Amplifier Gain Nonlinearity
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
No load, T
A
= T
MIN
to T
MAX
V
SS +
V
DD -
0.05
0.05
V
4.5
5.0
5.5
V
DD
Supply Voltage
At any gain
ppm/C
50
Differential Signal Path
Temperature Coefficient
V/V
1.15
Offset TC Gain
V/V
1.15
Offset Gain
V
V
OUT
OFFSET
V
V
OUT
OFFTC
GENERAL CHARACTERISTICS
ANALOG OUTPUT (PGA)
ANALOG INPUT (PGA)
SUMMING JUNCTION (Figure 1)
MAX1450
Low-Cost, 1%-Accurate Signal Conditioner
for Piezoresistive Sensors
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +5V, V
SS
= 0, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25C.)
Note 1:
Contact factory for high-volume applications requiring less than 1.5mA.
Note 2:
All electronics temperature errors are compensated together with the sensor errors.
Note 3:
The sensor and the MAX1450 must always be at the same temperature during calibration and use.
Note 4:
This is the maximum allowable sensor offset at minimum gain (39V/V).
Note 5:
This is the sensor's sensitivity normalized to its drive voltage, assuming a desired full-span output (FSO) of 4V and a bridge
voltage of 2.5V. Operating at lower bridge excitation voltages can accommodate higher sensitivities.
V
BDRIVE
= 2.5V
No load
(V
BDRIVE
- V
BBUF
) at V
BDRIVE
= 2.5V, no load
CONDITIONS
A
-100
100
Current Drive
V
V
SS +
V
DD -
1.3
1.3
Voltage Swing
mV
-20
20
V
OFS
Offset Voltage
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
I
BDRIVE/
I
ISRC
(Figure 2)
V
V
SS +
V
DD -
1.3
1.3
V
BDRIVE
Bridge Voltage Swing
mA
0.1
0.5
2.0
I
BDRIVE
Bridge Current Range
A/A
13
AA
Current-Source Gain
V
V
SS +
V
DD-
1.3
1.3
V
ISRC
Current-Source Input Voltage
Range
BUFFER (BBUF)
CURRENT SOURCE
______________ Detailed Description
Analog Signal Path
The MAX1450's signal path is fully differential and com-
bines the following three stages: a 3-bit PGA with
selectable gains of 39, 65, 91, 117, 143, 169, 195, and
221; a summing junction; and a differential to single-
ended output buffer (Figure 1).
Programmable-Gain Amplifier
The analog signal is first fed into a programmable-gain
instrumentation amplifier with a CMRR of 90dB and a
common-mode input range from V
SS
to V
DD
. Pins A0,
A1, and A2 set the PGA gain anywhere from 39V/V to
221V/V (in steps of 26).
MAX1450
Low-Cost, 1%-Accurate Signal Conditioner
for Piezoresistive Sensors
4
_______________________________________________________________________________________
NAME
FUNCTION
1
INP
Positive Sensor Input. Input impedance is typically 1M
. Rail-to-rail input range.
PIN
2, 3,
12, 16
I.C.
Internally connected. Leave unconnected.
4
SOTC
Offset TC Sign Bit Input. A logic low inverts V
OFFTC
with respect to V
SS.
This pin is internally pulled to V
SS
via a 1M
(typical) resistor. Connect to V
DD
to add V
OFFTC
to the PGA output, or leave unconnected (or
connect to V
SS
) to subtract V
OFFTC
from the PGA output.
8
OFFTC
Offset TC Adjust. Analog input summed with PGA output and V
OFFSET
. Input impedance is typically 1M
.
Rail-to-rail input range.
7
A0
PGA Gain-Set LSB Input. Internally pulled to V
SS
via a 1M
(typical) resistor. Connect to V
DD
for a logic
high or V
SS
for a logic low.
6
A1
PGA Gain-Set Input. Internally pulled to V
SS
via a 1M
(typical) resistor. Connect to V
DD
for a logic high or
V
SS
for a logic low.
5
SOFF
Offset Sign Bit Input. A logic low inverts V
OFFSET
with respect to V
SS
. This pin is internally pulled to V
SS
via
a 1M
(typical) resistor. Connect to V
DD
to add V
OFFSET
to the PGA output, or leave unconnected (or con-
nect to V
SS
) to subtract V
OFFSET
from the PGA output.
14
OUT
PGA Output Voltage. Connect a 0.1F capacitor from OUT to V
SS
.
13
A2
PGA Gain-Set MSB Input. Internally pulled to V
SS
via a 11k
(typical) resistor. Connect to V
DD
for a logic
high or V
SS
for a logic low.
11
FSOTRIM
Bridge Drive Current-Set Input. The voltage on this pin sets the nominal I
ISRC
. See the
Bridge Drive section.
10
BBUF
Buffered Bridge-Voltage Output (the voltage at BDRIVE). Use with correction resistor R
STC
to correct for FSO
tempco.
9
OFFSET
Offset Adjust Input. Analog input summed with PGA output and V
OFFTC
. Input impedance is typically
1M
. Rail-to-rail input range.
Pin Description
15
V
DD
Positive Supply Voltage Input. Connect a 0.1F capacitor from V
DD
to V
SS
.
20
INM
Negative Sensor Input. Input impedance is typically 1M
. Rail-to-rail input range.
19
V
SS
Negative Power-Supply Input.
18
BDRIVE
Sensor Excitation Current Output. This pin drives a nominal 0.5mA through the bridge.
17
ISRC
Current-Source Reference. Connect a 50k
(typical) resistor from ISRC to V
SS
.
OFFTC SOTC
OFFSET SOFF
A2
INP
INM
A1 A0
PGA
A = 1
OUT
Figure 1. Signal-Path Functional Diagram
Summing Junction
The second stage in the analog signal path consists of
a summing junction for offset, offset temperature com-
pensation, and the PGA output. The offset voltage
(V
OFFSET
) and offset temperature-compensation volt-
age (V
OFFTC
) add or subtract from the PGA output
depending on their respective sign bits, offset sign
(SOFF), and offset TC sign (SOTC). V
OFFSET
and
V
OFFTC
can range in magnitude from V
SS
to V
DD
.
Output Buffer
The final stage in the analog signal path consists
of a unity-gain buffer. This buffer is capable of swinging
to within 250mV of V
SS
and V
DD
while sourcing/sinking
up to 1.0mA, or within 50mV of the power supplies with
no load.
Bridge Drive
Figure 2 shows the functional diagram of the on-chip
current source. The voltage at FSOTRIM, in conjunction
with R
ISRC
, sets the nominal current, I
ISRC
which sets
the FSO (refer to Figure 3 for sensor terminology.) I
ISRC
is additionally modulated by components from the
external resistor R
STC
and the optional resistor R
LIN
.
R
STC
is used to feed back a portion of the buffered
bridge-excitation voltage (V
BBUF
), which compensates
FSO TC errors by modulating the bridge-excitation cur-
rent over temperature. To correct FSO linearity errors,
feed back a portion of the output voltage to the current-
source reference node via the optional R
LIN
resistor.
Applications Information
Compensation Procedure
The following compensation procedure assumes a pres-
sure transducer with a +5V supply and an output voltage
that is ratiometric to the supply voltage (see
Ratiometric
Output Configuration section). The desired offset voltage
(V
OUT
at P
MIN
) is 0.5V, and the desired FSO voltage
(V
OUT
(P
MAX
) - V
OUT
(P
MIN
)) is 4V; thus the FS output volt-
age (V
OUT
at P
MAX
) will be 4.5V. The procedure requires
a minimum of two test pressures (e.g., zero and full scale)
and two temperatures. A typical compensation procedure
is as follows:
1) Perform Coefficient Initialization
2) Perform FSO Calibration
3) Perform FSO TC Compensation
4) Perform OFFSET TC Compensation
5) Perform OFFSET Calibration
6) Perform Linearity Calibration (Optional)
Coefficient Initialization
Select the resistor values and the PGA gain to prevent
gross overload of the PGA and bridge current source.
These values depend on sensor behavior and require
some sensor characterization data. This data may be
available from the sensor manufacturer. If not, it can be
generated by performing a two-temperature, two-pres-
MAX1450
Low-Cost, 1%-Accurate Signal Conditioner
for Piezoresistive Sensors
_______________________________________________________________________________________
5
V
DD
I
BDRIVE
13 (I
ISRC
)
V
BDRIVE
I
ISRC
I
ISRC
BBUF
INP
INM
SENSOR
R
ISRC
(EXTERNAL)
BDRIVE
FSOTRIM
BBUF
OUT
A = 1
R
STC
(EXTERNAL)
R
LIN
(OPTIONAL)
(EXTERNAL)
MAX1450
Figure 2. Bridge Drive Circuit