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General Description
The MAX1458 highly integrated analog-sensor signal
processor is optimized for piezoresistive sensor calibra-
tion and compensation without any external compo-
nents. It includes a programmable current source for
sensor excitation, a 3-bit programmable-gain amplifier
(PGA), a 128-bit internal EEPROM, and four 12-bit
DACs. Achieving a total error factor within 1% of the
sensor's repeatability errors, the MAX1458 compen-
sates offset, offset temperature coefficient, full-span
output (FSO), FSO temperature coefficient (FSOTC),
and FSO nonlinearity of silicon piezoresistive sensors.
The MAX1458 calibrates and compensates first-order
temperature errors by adjusting the offset and span of
the input signal via digital-to-analog converters (DACs),
thereby eliminating quantization noise. Built-in testabili-
ty features on the MAX1458 result in the integration of
three traditional sensor-manufacturing operations into
one automated process:
Pretest:
Data acquisition of sensor performance
under the control of a host test computer.
Calibration and compensation:
Computation and
storage (in an internal EEPROM) of calibration and
compensation coefficients computed by the test
computer and downloaded to the MAX1458.
Final test operation:
Verification of transducer cali-
bration and compensation without removal from the
pretest socket.
Although optimized for use with piezoresistive sensors,
the MAX1458 may also be used with other resistive
sensors (i.e., accelerometers and strain gauges) with
some additional external components.
______________________Customization
Maxim can customize the MAX1458 for unique require-
ments. With a dedicated cell library consisting of more
than 90 sensor-specific functional blocks, Maxim can
quickly provide customized MAX1458 solutions. Please
contact Maxim for further information.
________________________Applications
Piezoresistive Pressure and Acceleration
Transducers and Transmitters
MAP (Manifold Absolute Pressure) Sensors
Automotive Systems
Hydraulic Systems
Industrial Pressure Sensors
Features
o
Medium Accuracy (1%), Single-Chip Sensor
Signal Conditioning
o
Sensor Errors Trimmed Using Correction
Coefficients Stored in Internal EEPROM--
Eliminates the Need for Laser Trimming and
Potentiometers
o
Compensates Offset, Offset-TC, FSO, FSOTC,
FSO Linearity
o
Programmable Current Source (0.1mA to 2.0mA)
for Sensor Excitation
o
Fast Signal-Path Settling Time (<1ms)
o
Accepts Sensor Outputs from 10mV/V to 40mV/V
o
Fully Analog Signal Path
MAX1458
1%-Accurate, Digitally Trimmed
Sensor Signal Conditioner
________________________________________________________________
Maxim Integrated Products
1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
SCLK
LIMIT
V
DD
INP
BDRIVE
INM
I.C.
OUT
ISRC
TOP VIEW
MAX1458
SSOP
CS
I.C.
DIO
TEMP
FSOTC
WE
V
SS
19-1373; Rev 0; 5/98
PART
MAX1458CAE
MAX1458C/D
MAX1458AAE
-40C to +125C
0C to +70C
0C to +70C
TEMP. RANGE
PIN-PACKAGE
16 SSOP
Dice*
16 SSOP
*
Dice are tested at T
A
= +25C, DC parameters only.
Functional Diagram appears at end of data sheet.
Pin Configuration
Ordering Information
MAX1458
1%-Accurate, Digitally Trimmed
Sensor Signal Conditioner
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
DD
= +5V, V
SS
= 0, T
A
= +25C, unless otherwise noted.)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage, V
DD
to V
SS
......................................-0.3V to +6V
All Other Pins ...................................(V
SS
- 0.3V) to (V
DD
+ 0.3V)
Short-Circuit Duration, FSOTC, OUT, BDRIVE ...........Continuous
Continuous Power Dissipation (T
A
= +70C)
SSOP (derate 8.00mW/C above +70C) .....................640mW
Operating Temperature Ranges
MAX1458CAE ......................................................0C to +70C
MAX1458AAE .................................................-40C to +125C
Storage Temperature Range .............................-65C to +160C
Lead Temperature (soldering, 10sec) .............................+300C
(Note 1)
DC to 10Hz (gain = 41,
source impedance = 5k
)
V
LIMIT
= 4.6V,
V
OUT
= (V
SS
+ 0.25V) to (V
LIMIT
- 0.3V)
At minimum gain (Note 4)
From V
SS
to V
DD
T
A
= T
MIN
to T
MAX
Selectable in eight steps
63% of final value
(Notes 2, 3)
(Note 5)
CONDITIONS
V
RMS
500
Output Noise
mA
-0.45
0.45
(sink)
(source)
Output Current Range
V
SS
+ 0.15
V
DD
- 0.25
ppm/C
50
Differential Signal-Gain Tempco
V/V
36
41
45
Minimum Differential Signal Gain
V/V
41 to 230
Differential Signal-Gain Range
mV/V
10 to 40
Input-Referred Adjustable FSO
Range
mA
3
6
I
DD
Supply Current
V
4.5
5.0
5.5
V
DD
Supply Voltage
mV
150
Input-Referred Adjustable Offset
Range
dB
90
CMRR
Common-Mode Rejection Ratio
ms
1
Output Step Response
M
1
R
IN
Input Impedance
V/C
0.5
Input-Referred Offset Tempco
%V
DD
0.01
Amplifier Gain Nonlinearity
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
10k
load to V
SS
or V
DD
V
LIMIT
= 4.6V
V
Output Voltage Swing
V
SS
+ 0.25
V
LIMIT
0.3
V
SS
+ 0.1
V
LIMIT
0.2
No load
GENERAL CHARACTERISTICS
ANALOG INPUT (PGA)
ANALOG OUTPUT (PGA)
V
LIMIT
= 5.0V, no load
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +5V, V
SS
= 0, T
A
= +25C, unless otherwise noted.)
Note 1:
Excludes the sensor or load current.
Note 2:
All electronics temperature errors are compensated together with sensor errors.
Note 3:
The sensor and the MAX1458 must always be at the same temperature during calibration and use.
Note 4:
This is the maximum allowable sensor offset.
Note 5:
This is the sensor's sensitivity normalized to its drive voltage, assuming a desired full-span output of 4V and a bridge
voltage of 2.5V.
Note 6:
Bit weight is ratiometric to V
DD
.
MAX1458
1%-Accurate, Digitally Trimmed
Sensor Signal Conditioner
_______________________________________________________________________________________
3
Typically 4600ppm/C tempco
V
FSOTC
= 2.5V
No load
Input referred, V
DD
= 5V (Note 6)
CONDITIONS
k
100
R
TEMP
Temperature-Dependent
Resistor
k
75
R
FTC
FSO Trim Resistor
k
75
R
ISRC
Current-Source Reference
Resistor
V
V
SS
+ 1.3
V
DD
- 1.3
V
BDRIVE
Bridge Voltage Swing
mA
0.1
0.5
2.0
I
BDRIVE
Bridge Current Range
A
-20
20
Current Drive
V
V
SS
+ 0.3
V
DD
- 1.3
Output Voltage Swing
Bits
3
DAC Resolution
mV/bit
9
DAC Bit Weight
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
LSB
1.5
DNL
Differential Nonlinearity
Bits
12
DAC Resolution
V
V
SS
+ 1.3
V
DD
- 1.3
V
ISRC
Reference Input Voltage Range
(ISRC)
DAC reference = V
BDRIVE
= 2.5V
DAC reference = V
DD
= 5.0V
mV/bit
1.4
V
OUT
Code
Offset TC DAC Bit Weight
mV/bit
2.8
V
OUT
Code
Offset DAC Bit Weight
DAC reference = V
BDRIVE
= 2.5V
DAC reference = V
DD
= 5.0V
mV/bit
0.6
V
FSOTC
Code
FSO TC DAC Bit Weight
mV/bit
1.22
V
ISRC
Code
FSO DAC Bit Weight
CURRENT SOURCE
DIGITAL-TO-ANALOG CONVERTERS
IRO DAC
FSOTC BUFFER
INTERNAL RESISTORS
_______________Detailed Description
The MAX1458 provides an analog amplification path for
the sensor signal. Calibration and temperature com-
pensation are achieved by varying the offset and gain
of a programmable-gain amplifier (PGA) and by varying
the sensor bridge current. The PGA uses a switched-
capacitor CMOS technology, with an input-referred
coarse offset trimming range of approximately 63mV
(9mV steps). An additional output-referred fine offset
trim is provided by the Offset DAC (approximately
2.8mV steps). The PGA provides eight gain values from
+41V/V to +230V/V. The bridge current source is pro-
grammable from 0.1mA to 2mA.
The MAX1458 uses four 12-bit DACs and one 3-bit
DAC, with calibration coefficients stored by the user in
an internal 128-bit EEPROM. This memory contains the
following information as 12-bit-wide words:
Configuration register
Offset calibration coefficient
Offset temperature error compensation coefficient
FSO (full-span output) calibration coefficient
FSO temperature error compensation coefficient
24 user-defined bits for customer programming of
manufacturing data (e.g., serial number and date)
Figure 1 shows a typical pressure-sensor output and
defines the offset, full-scale, and full-span output values
as a function of voltage.
MAX1458
1%-Accurate, Digitally Trimmed
Sensor Signal Conditioner
4
_______________________________________________________________________________________
NAME
FUNCTION
1
SCLK
Data Clock Input. Used only during programming/testing. Internally pulled to V
SS
with a 1M
(typical) resis-
tor. Data is clocked in on the rising edge of the clock. The maximum SCLK frequency is 10kHz.
2
CS
Chip-Select Input. The MAX1458 is selected when this pin is high. When low, OUT and DIO become high
impedance. Internally pulled to V
DD
with a 1M
(typical) resistor. Leave unconnected for normal operation.
PIN
3, 11
I.C.
Internally Connected. Leave unconnected.
4
TEMP
Temperature Sensor Output. An internal temperature sensor (a 100k
, 4600ppm/C TC resistor) which can
provide a temperature-dependent voltage.
8
V
SS
Negative Power-Supply Input
7
WE
Dual-Function Input Pin. Used to enable EEPROM erase/write operations. Also used to set the DAC refresh-
rate mode. Internally pulled to V
DD
with a 1M
(typical) resistor. Refer to the
Chip-Select (CS) and Write-
Enable (WE) section.
6
DIO
Data Input/Output. Used only during programming/testing. Internally pulled to V
SS
with a 1M
(typical)
resistor. High impedance when CS is low.
5
FSOTC
Buffered FSOTC DAC Output. An internal 75k
resistor (R
FTC
) connects FSOTC to ISRC (see
Functional
Diagram). Optionally, external resistors can be used in place of or in parallel with R
FTC
and R
ISRC
.
14
INP
Positive Sensor Input. Input impedance >1M
. Rail-to-rail input range.
13
BDRIVE
Sensor Excitation Current Output. This current source drives the bridge.
12
INM
Negative Sensor Input. Input impedance >1M
. Rail-to-rail input range.
10
OUT
PGA Output Voltage
9
ISRC
Current-Source Reference. An internal 75k
resistor (R
ISRC
) connects ISRC to V
SS
(see
Functional
Diagram). Optionally, external resistors can be used in place of or in parallel with R
FTC
and R
ISRC
.
Pin Description
16
LIMIT
Voltage Limit Input. This pin sets the maximum voltage at OUT. If left unconnected, the output voltage will be
limited to 4.6V (V
DD
= 5V). Connect to V
DD
for maximum output swing. The acceptable range is 4.5V
V
LIMIT
V
DD
.
15
V
DD
Positive Power-Supply Input. Connect a 0.1F capacitor from V
DD
to V
SS.
FSOTC Compensation
Silicon piezoresistive transducers (PRTs) exhibit a large
positive input resistance tempco (TCR) so that, while
under constant current excitation, the bridge voltage
(V
BDRIVE
) increases with temperature. This depen-
dence of V
BDRIVE
on the sensor temperature can be
used to compensate the sensor temperature errors.
PRTs also have a large negative full-span output sensi-
tivity tempco (TCS) so that, with constant voltage exci-
tation, full-span output (FSO) will decrease with
temperature, causing a full-span output temperature
coefficient (FSOTC) error. However, if the bridge volt-
age can be made to increase with temperature at the
same rate that TCS decreases with temperature, the
FSO will remain constant.
FSOTC compensation is accomplished by resistor
R
FTC
and the FSOTC DAC, which modulate the excita-
tion reference current at ISRC as a function of tempera-
ture (Figure 3). FSO DAC sets V
ISRC
and remains
constant with temperature while the voltage at FSOTC
varies with temperature. FSOTC is the buffered output
of the FSOTC DAC. The reference DAC voltage is
V
BDRIVE
, which is temperature dependent. The FSOTC
DAC alters the tempco of the current source. When the
tempco of the bridge voltage is equal in magnitude and
opposite in polarity to the TCS, the FSOTC errors are
compensated and FSO will be constant with tempera-
ture.
OFFSET TC Compensation
Compensating offset TC errors involves first measuring
the uncompensated offset TC error, then determining
the percentage of the temperature-dependent voltage
V
BDRIVE
that must be added to the output summing
junction to correct the error. Use the Offset TC DAC to
adjust the amount of BDRIVE voltage that is added to
the output summing junction (Figure 2).
Analog Signal Path
The fully differential analog signal path consists of four
stages:
Front-end summing junction for coarse offset correction
3-bit PGA with eight selectable gains ranging from
41 through 230
Three-input-channel summing junction
Differential to single-ended output buffer (Figure 2)
Coarse Offset Correction
The sensor output is first fed into a differential summing
junction (INM (negative input) and INP (positive input))
with a CMRR > 90dB, an input impedance of approxi-
mately 1M
, and a common-mode input voltage range
from V
SS
to V
DD
. At this summing junction, a coarse off-
set-correction voltage is added, and the resultant volt-
age is fed into the PGA. The 3-bit (plus sign)
input-referred Offset DAC (IRO DAC) generates the
coarse offset-correction voltage. The DAC voltage ref-
erence is 1.25% of V
DD
; thus, a V
DD
of 5V results in a
front-end offset-correction voltage ranging from -63mV
to +63mV, in 9mV steps (Table 1). To add an offset to
the input signal, set the IRO sign bit high; to subtract an
offset from the input signal, set the IRO sign bit low.
The IRO DAC bits (C2, C1, C0, and IRO sign bit) are
programmed in the configuration register (see
Internal
EEPROM section).
MAX1458
1%-Accurate, Digitally Trimmed
Sensor Signal Conditioner
_______________________________________________________________________________________
5
VOLTAGE (V)
PRESSURE
P
MIN
P
MAX
FULL-SCALE (FS)
4.5
0.5
FULL-SPAN OUTPUT (FSO)
OFFSET
Figure 1. Typical Pressure-Sensor Output
SOTC
BDRIVE
1.25% V
DD
SOFF
A2
INP
INM
A1 A0
PGA
A = 1
OUT
LIMIT
A = 2.3
A = 2.3
OFFTC
DAC
IRO
DAC
V
DD
Offset
DAC
Figure 2. Signal-Path Block Diagram
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