MAX9420 DS
General Description
The MAX9420MAX9423 are extremely fast, low-skew
quad LVECL-to-LVPECL translators designed for high-
speed signal and clock driver applications. The
devices feature ultra-low propagation delay of 336ps
and channel-to-channel skew of 17ps.
The four channels can be operated synchronously with
an external clock, or in asynchronous mode, deter-
mined by the state of the SEL input. An enable input
provides the ability to force all the outputs to a differen-
tial low state.
These devices operate with a negative supply voltage
of -2.0V to -3.6V, compatible with LVECL input signals.
The positive supply range is 2.375V to 3.6V for differen-
tial LVPECL output signals.
A variety of input and output terminations are offered for
maximum design flexibility. The MAX9420 has open
inputs and open-emitter outputs. The MAX9421 has
open inputs and 50
series outputs. The MAX9422 has
100
differential input impedance and open-emitter
outputs. The MAX9423 has 100
differential input
impedance and 50
series outputs.
The MAX9420MAX9423 are specified for operation
from -40C to +85C, and are offered in space-saving
32-pin 5mm
5mm TQFP and 32-lead 5mm
5mm
QFN packages.
Applications
Data and Clock Driver and Buffer
Central Office Backplane Clock Distribution
DSLAM Backplane
Base Station
ATE
Features
o >500mV Differential Output at 3.0GHz Clock
o 336ps (typ) Propagation Delay in Asynchronous
Mode
o 17ps (typ) Channel-to-Channel Skew
o Integrated 50 Outputs (MAX9421/MAX9423)
o Integrated 100 Inputs (MAX9422/MAX9423)
o Synchronous/Asynchronous Operation
MAX9420MAX9423
Quad Differential LVECL-to-LVPECL Translators
________________________________________________________________ Maxim Integrated Products
1
Ordering Information
TQFP (5mm x 5mm)
TOP VIEW
32
28
29
30
31
25
26
27
IN0
V
CC
OUT0
OUT0
IN0
GND
IN1
IN1
10
13
15
14
16
11
12
9
IN3
V
CC
IN3
OUT3
OUT3
IN2
GND
IN2
17
18
19
20
21
22
23 OUT1
24 V
CC
OUT1
GND
GND
OUT2
OUT2
V
CC
2
3
4
5
6
7
8
V
EE
EN
EN
CLK
CLK
SEL
SEL
1
V
EE
MAX9420
MAX9421
MAX9422
MAX9423
Pin Configurations
19-2285; Rev 0; 1/02
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Functional Diagram appears at end of data sheet.
PART
TEMP
RANGE
PIN-
PACKAGE
DATA
INPUT
OUTPUT
MAX9420EHJ
-40C to +85C 32 TQFP
Open
Open
MAX9420EGJ* -40C to +85C 32 QFN
Open
Open
MAX9421EHJ
-40C to +85C 32 TQFP
Open
50
MAX9421EGJ* -40C to +85C 32 QFN
Open
50
MAX9422EHJ
-40C to +85C 32 TQFP
100
Open
MAX9422EGJ* -40C to +85C 32 QFN
100
Open
MAX9423EHJ
-40C to +85C 32 TQFP
100
50
MAX9423EGJ* -40C to +85C 32 QFN
100
50
Pin Configurations continued at end of data sheet.
*Future product--contact factory for availability.
MAX9420MAX9423
Quad Differential LVECL-to-LVPECL Translators
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(V
EE
= -2.0V to -3.6V, V
CC
= 2.375V to 3.6V, GND = 0, MAX9420/MAX9422 outputs terminated with 50
1% to V
CC
- 2.0V. Typical val-
ues are at V
EE
= -3.3V, V
CC
= 3.3V, T
A
= +25C, V
IHD
= -0.9V, V
ILD
= -1.7V, unless otherwise noted.) (Notes 1, 2, and 3)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
CC
to GND ...........................................................-0.3V to +4.1V
V
EE
to GND............................................................-4.1V to +0.3V
Inputs to GND .............................................(V
EE
- 0.3V) to +0.3V
Differential Input Voltage .......................................................3V
Continuous Output Current .................................................50mA
Surge Output Current........................................................100mA
Continuous Power Dissipation (T
A
= +70C)
Single-Layer PC Board
32-Pin 5mm
5mm TQFP
(derate 9.5mW/C above +70C) ................................761mW
32-Lead 5mm
5mm QFN
(derate 21.3mW/C above +70C) .................................1.7W
Junction-to-Ambient Thermal Resistance in Still Air
32-Pin 5mm
5mm TQFP......................................+105C/W
32-Lead 5mm
5mm QFN ......................................+47C/W
Junction-to-Ambient Thermal Resistance with 500
LFPM Airflow
32-Pin 5mm
5mm TQFP.........................................+73C/W
Junction-to-Case Thermal Resistance
32-Pin 5mm
5mm TQFP.........................................+25C/W
32-Lead 5mm
5mm QFN .........................................+2C/W
Operating Temperature Range ...........................-40C to +85C
Junction Temperature ......................................................+150C
Storage Temperature Range .............................-65C to +150C
ESD Protection
Human Body Model (IN_, IN_) ........................................500V
Others.............................................................................1.2kV
Lead Temperature (soldering, 10s) .................................+300C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LVECL INPUTS (IN_, IN_, CLK, CLK, EN, EN, SEL, SEL)
Differential Input High Voltage
V
IHD
Figure 1
V
EE
+
1.4
0
V
Differential Input Low Voltage
V
ILD
Figure 1
V
EE
-0.2
V
V
EE
-3.0V
0.2
3.0
Differential Input Voltage
V
ID
Figure 1
V
EE
> -3.0V
0.2
V
EE
V
MAX9420/
MAX9421
EN, EN, SEL, SEL , IN_, IN_,
CLK, or CLK = V
IHD
or V
ILD
-10
25
Input Current
I
IH
, I
IL
MAX9422/
MAX9423
EN, EN, SEL, SEL, CLK, or
CLK = V
IHD
or V
ILD
-10
25
A
Differential Input Resistance
(IN, IN)
R
IN
MAX9422/MAX9423
86
100
114
LVPECL OUTPUTS (OUT_, OUT_)
Differential Output Voltage
V
OH
-
V
OL
Figure 1
600
660
mV
Output Common-Mode Voltage
V
OCM
Figure 1
V
CC
-
1.5
V
CC
-
1.25
V
CC
-
1.1
V
Internal Current Source
I
SINK
MAX9421/MAX9423, Figure 2
6.5
8.2
10.0
mA
Output Impedance
R
OUT
MAX9421/MAX9423, Figure 2
40
50
60
MAX9420MAX9423
Quad Differential LVECL-to-LVPECL Translators
_______________________________________________________________________________________
3
DC ELECTRICAL CHARACTERISTICS (continued)
(V
EE
= -2.0V to -3.6V, V
CC
= 2.375V to 3.6V, GND = 0, MAX9420/MAX9422 outputs terminated with 50
1% to V
CC
- 2.0V. Typical val-
ues are at V
EE
= -3.3V, V
CC
= 3.3V, T
A
= +25C, V
IHD
= -0.9V, V
ILD
= -1.7V, unless otherwise noted.) (Notes 1, 2, and 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY
Negative Supply Current
I
EE
OUT_, OUT_
open
MAX9421/MAX9422/
MAX9423
7
10
mA
MAX9421/MAX9423
153
-180
Positive Supply Current
I
CC
OUT_, OUT_
open
MAX9420/MAX9422
87
105
mA
AC ELECTRICAL CHARACTERISTICS
(V
EE
= -2.0V to -3.6V, V
CC
= 2.375V to 3.6V, GND = 0, outputs terminated with 50
1% to V
CC
- 2.0V. For SEL = high, CLK = high
or low, f
IN
= 2.0GHz. For SEL = low, F
IN
= 1.5GHz, CLK = 3.0GHz, input transition time = 125ps (20% to 80%), V
IHD
= V
EE
+ 1.4V to
0, V
ILD
= V
EE
to -0.2V, V
IHD
- V
ILD
= 0.2V to the smaller of 3.0V or |V
EE
|. Typical values are at V
EE
= -3.3V, V
CC
= 3.3V, GND = 0, T
A
= +25C, V
IHD
= -0.9V, V
ILD
= -1.7V, unless otherwise noted.) (Note 4)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IN-to-OUT Differential
t
P LH 1,
t
P H L 1
SEL = high, Figure 3
250
336
450
ps
CLK-to-OUT Differential
t
P LH 2,
t
P H L 2
SEL = low, Figure 4
350
506
575
ps
IN-to-OUT Channel-to-Channel
Skew (Note 5)
t
SKD1
SEL = high
17
60
ps
CLK-to-OUT Channel-to-
Channel Skew (Note 5)
t
SKD2
SEL = low
17
55
ps
Maximum Clock Frequency
f
CLK(MAX)
V
OH
-
V
OL
500mV, SEL = low
3.0
GHz
Maximum Data Frequency
f
IN(MAX)
V
OH
-
V
OL
400mV, SEL = high
2
GHz
SEL = low, f
CLK
= 3.0GHz, f
IN
= 1.5GHz
0.65
1.0
ps
(RMS)
Added Random Jitter (Note 6)
t
RJ
SEL = high, f
IN
= 2GHz
0.53
1.0
ps
(RMS)
SEL = low, f
CLK
= 3.0GHz, IN_ = 3.0Gbps,
2
23
- 1 PRBS pattern
28
45
Added Deterministic Jitter
(Note 6)
t
DJ
SEL = high, IN_ = 3.0Gbps 2
23
- 1 PRBS
pattern
23
45
ps
(P-P)
IN-to-CLK Setup Time
t
S
Figure 4
80
ps
CLK-to-IN Hold Time
t
H
Figure 4
80
ps
Output Rise Time
t
R
Figure 3
90
120
ps
AC ELECTRICAL CHARACTERISTICS (continued)
(V
EE
= -2.0V to -3.6V, V
CC
= 2.375V to 3.6V, GND = 0, outputs terminated with 50
1% to V
CC
- 2.0V. For SEL = high, CLK = high
or low, f
IN
= 2.0GHz. For SEL = low, F
IN
= 1.5GHz, CLK = 3.0GHz, input transition time = 125ps (20% to 80%), V
IHD
= V
EE
+ 1.4V to
0, V
ILD
= V
EE
to -0.2V, V
IHD
- V
ILD
= 0.2V to the smaller of 3.0V or |V
EE
|. Typical values are at V
EE
= -3.3V, V
CC
= 3.3V, GND = 0, T
A
= +25C, V
IHD
= -0.9V, V
ILD
= -1.7V, unless otherwise noted.) (Note 4)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output Fall Time
t
F
Figure 3
90
120
ps
Propagation Delay Temperature
Coefficient
t
PD
/
T
0.2
1
ps/C
MAX9420MAX9423
Quad Differential LVECL-to-LVPECL Translators
4
_______________________________________________________________________________________
70
75
80
90
85
95
100
-40
10
-15
35
60
85
SUPPLY CURRENT (I
CC
)
vs. TEMPERATURE
MAX9420 toc01
TEMPERATURE (
C)
SUPPLY CURRENT (mA)
MAX9420/MAX9422
SEL = HIGH
OUTPUTS NOT TERMINATED
4
5
7
6
8
9
-40
10
-15
35
60
85
SUPPLY CURRENT (I
EE
)
vs. TEMPERATURE
MAX9420 toc02
TEMPERATURE (
C)
OUTPUT AMPLITUDE (mV)
MAX9420/MAX9422
SEL = HIGH
OUTPUTS NOT TERMINATED
1000
800
600
400
200
0
0
1000
500
1500 2000 2500 3000
3500
OUTPUT AMPLITUDE (V
OH
- V
OL
)
vs. FREQUENCY
MAX9420 toc03
IN_ FREQUENCY (MHz)
OUTPUT AMPLITUDE (mV)
MAX9420/MAX9422
SEL = HIGH
MAX9420 toc04
OUTPUT RISE/FALL TIME (ps)
80
85
90
95
100
75
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
t
R
t
F
-40
10
-15
35
60
85
TEMPERATURE (
C)
MAX9420/MAX9422
SEL = HIGH
MAX9420 toc05
PROPAGATION DELAY (ps)
300
310
320
330
340
350
360
370
290
IN-TO-OUT PROPAGATION DELAY
vs. TEMPERATURE
-40
10
-15
35
60
85
TEMPERATURE (
C)
t
PLH1
t
PHL1
MAX9420/MAX9422
SEL = HIGH
MAX9420 toc06
PROPAGATION DELAY (ps)
450
475
500
525
550
575
600
425
CLK-TO-OUT PROPAGATION DELAY
vs. TEMPERATURE
-40
10
-15
35
60
85
TEMPERATURE (
C)
t
PLH2
t
PHL2
MAX9420/MAX9422
SEL = LOW
Typical Operating Characteristics
(V
EE
= -3.3V, V
CC
= 3.3V, GND = 0, MAX9420/MAX9422 outputs terminated with 50
1% to V
CC
- 2.0V, SEL = high, f
CLK
= 3.0GHz,
f
IN
= 1.5GHz, input transition time = 125ps (20% to 80%), V
IHD
= -0.9V, V
ILD
= -1.7V, T
A
= +25C, unless otherwise noted.)
Note 1: Measurements are made with the device in thermal equilibrium.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters are production tested at +25C. DC limits are guaranteed by design and characterization over the full oper-
ating temperature range.
Note 4: Guaranteed by design and characterization. Limits are set to 6 sigma.
Note 5: Measured between outputs of the same part at the signal crossing points for a same-edge transition.
Note 6: Device jitter added to the input signal.
MAX9420MAX9423
Quad Differential LVECL-to-LVPECL Translators
_______________________________________________________________________________________
5
Pin Description
PIN
NAME
FUNCTION
1, 8
V
EE
Negative Supply Voltage. Bypass V
EE
to GND with 0.1F and 0.01F ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
2
SEL
Noninverting Differential Select Input. Setting SEL = high and SEL = low (differential high) enables all four
channels to operate asynchronously. Setting SEL = low and SEL = high (differential low) enables all four
channels to operate in synchronous mode.
3
SEL
Inverting Differential Select Input
4
CLK
Inverting Differential Clock Input. A rising edge on CLK (and falling on CLK) transfers data from the inputs to
the outputs when SEL = differential low.
5
CLK
Noninverting Differential Clock Input
6
EN
Noninverting Differential Output Enable Input. Setting EN = high and EN = low (differential high) enables the
outputs. Setting EN = low and EN = high (differential low) drives the output low.
7
EN
Inverting Differential Output Enable Input
9
IN3
Noninverting Differential Input 3
10
IN3
Inverting Differential Input 3
11, 17,
24, 30
V
CC
Positive Supply Voltage. Bypass V
CC
to GND with 0.1F and 0.01F ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
12
OUT3
Inverting Differential Output 3
13
OUT3
Noninverting Differential Output 3
14, 20,
21, 27
GND
Ground
15
IN2
Noninverting Differential Input 2
16
IN2
Inverting Differential Input 2
18
OUT2
Inverting Differential Output 2
19
OUT2
Noninverting Differential Output 2
22
OUT1
Noninverting Differential Output 1
23
OUT1
Inverting Differential Output 1
25
IN1
Inverting Differential Input 1
26
IN1
Noninverting Differential Input 1
28
OUT0
Noninverting Differential Output 0
29
OUT0
Inverting Differential Output 0
31
IN0
Inverting Differential Input 0
32
IN0
Noninverting Differential Input 0
--
EP
Exposed Paddle (MAX942_EGJ only). Connected to V
EE
internally. See package dimensions.
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