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All data sheets are subject to change without notice
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
512K (64K x 8-Bit) OTP EPROM
27C512T
2003 Maxwell Technologies
All rights reserved.
06.24.03 Rev 4
F
EATURES
:
64K x 8-bit OTP EPROM organization
R
AD
-P
AK
radiation-hardened against natural space
radiation
Total dose hardness:
- > 100 Krad (Si), depending upon space mission
Excellent Single Event Effects:
-SEL
TH
> 80 MeV/mg/cm2
-SEU
TH
> 80 Mev/mg/cm2
Package:
-32 pin R
AD
-P
AK
flat pack
-32 pin R
AD
-P
AK
DIP
Fast access time:
- 120, 150, 200 ns (max)
Low power dissipation:
- Active mode: 100 mW/MHz (typ)
- Standby mode: 10 W (typ)
Programming power supply:
- V
PP
= 12.5 V + 0.3 V
One-time programmable
Pin arrangement
- JEDEC standard byte-wide EPROM
- Flash memory and mask ROM compatible
D
ESCRIPTION
:
Maxwell Technologies' 27C512T high density 512-Kilobit one-
time programmable electrically programmable read only mem-
ory microcircuit features a greater than 100 krad (Si) total
dose tolerance, depending upon space mission. The 27C512T
features fast address times and low power dissipation. The
27C512T offers high speed programming using page pro-
gramming mode.
Maxwell Technologies' patented R
AD
-P
AK
packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, R
AD
-P
AK
provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
x-Decoder
1024 x 1022
Memory Matrix
Input
Data
Control
Y- Gating
Y - Decoder
H
A0-A4
A10-A11
OE
PGM
A5-A9
V
CC
V
PP
V
SS
A12-A16
I/O0
I/O15
H
CE
: High Threshhold Inverter
Logic Diagram
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All data sheets are subject to change without notice
2003 Maxwell Technologies
All rights reserved.
512K (64K x 8-Bit) OTP EPROM
27C512T
06.24.03 REV 4
T
ABLE
1. 27C512T P
INOUT
D
ESCRIPTION
P
IN
S
YMBOL
D
ESCRIPTION
1
V
PP
Programming Voltage
2, 30
NC
Not connected
12-5, 27, 26, 23,
25, 4, 28, 29, 3
A0-A15
Address Enable
22
CE
Chip Enable
24
OE
Output Enable
13-15, 17-21
I/O0 - I/O7
Data Input/Output
16
GND
Ground
31
PGM
Program
32
V
CC
+5V Power Supply
T
ABLE
2. 27C512T A
BSOLUTE
M
AXIMUM
R
ATINGS
P
ARAMETER
S
YMBOL
M
IN
M
AX
U
NIT
Supply Voltage
1
1. Relative to V
SS
.
V
CC
-0.6
+7.0
V
Programming Voltage
1
V
PP
-0.6
+13.5
V
All Input and Output Voltage
1,2
2. V
IN
, V
OUT
, and V
ID
min = -1.0V for pulse width < 20 ns.
V
IN
, V
OUT
-0.6
+7.0
V
A9 and OE Voltage
V
ID
-0.6
13.0
V
Operating Temperature Range
T
OPR
-55
+125
C
Storage Temperature Range
T
STG
-65
+125
C
T
ABLE
3. D
ELTA
L
IMITS
P
ARAMETER
V
ARIATION
I
SB
10%
I
CC1
10%
I
CC2
10%
I
CC3
10%
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All data sheets are subject to change without notice
2003 Maxwell Technologies
All rights reserved.
512K (64K x 8-Bit) OTP EPROM
27C512T
06.24.03 REV 4
T
ABLE
4. 27C512T R
ECOMMENDED
O
PERATING
C
ONDITIONS
P
ARAMETER
S
YMBOL
M
IN
M
AX
U
NITS
Supply Voltage
V
CC
4.5
5.5
V
Input Voltage
V
IL
-0.3
1
1. V
IL
min = -1.0V for pulse width < 50 ns.
0.8
V
V
IH
2.2
V
CC
+1
2
2. V
IH
max = V
CC
+ 1.5V for pulse width < 20 ns.
Thermal Impedance -- DIP Package
JC
--
1.26
C/W
Thermal Impedance -- Flat Package
JC
--
1.27
C/W
Operating Temperature Range
T
OPR
-55
+125
C
T
ABLE
5. 27C512T C
APACITANCE
1
1. Guaranteed by design.
P
ARAMETER
S
YMBOL
M
IN
M
AX
U
NIT
Input Capacitance
C
IN
--
10
pF
Output Capacitance
C
OUT
--
15
pF
T
ABLE
6. 27C512T DC E
LECTRICAL
C
HARACTERISTICS
FOR
R
EAD
O
PERATION
(V
CC
= 5V + 10%, V
PP
= V
SS
TO
V
CC
, T
A
= -55
TO
+125
C,
UNLESS
OTHERWISE
SPECIFIED
)
P
ARAMETER
T
EST
C
ONDITION
S
YMBOL
S
UBGRPOUPS
M
IN
T
YP
M
AX
U
NIT
Input Leakage Current
V
IN
= 5.5 V
I
LI
1, 2, 3
--
--
2
A
Output Leakage Current
V
OUT
= 5.5 V/0.45 V
I
LO
1, 2, 3
--
--
2
A
Standby V
CC
Current
CE = V
IH
I
SB
1, 2, 3
--
--
1
mA
Operating V
CC
Current
I
OUT
= 0 mA, CE = V
IL
I
CC1
1, 2, 3
--
--
30
mA
I
OUT
= 0 mA, f = 5 MHz
I
CC2
1, 2, 3
--
--
30
I
OUT
= 0 mA, f = 10 MHz
I
CC3
1, 2, 3
--
--
50
V
PP
Current
V
PP
= 5.5 V
I
PP1
1, 2, 3
--
1
20
A
Input Voltage
V
IH
1, 2, 3
2.2
--
--
V
V
IL
1, 2, 3
--
0.8
Output Voltage
I
OH
= -400 A
V
OH
1, 2, 3
2.4
--
--
V
I
OL
= 2.1 mA
V
OL
1, 2, 3
--
--
0.45
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All data sheets are subject to change without notice
2003 Maxwell Technologies
All rights reserved.
512K (64K x 8-Bit) OTP EPROM
27C512T
06.24.03 REV 4
T
ABLE
7. 27C512T AC E
LECTRICAL
C
HARACTERISTICS
FOR
R
EAD
O
PERATION
1
,
2
(V
CC
= 5V + 10%, V
PP
= V
SS
TO
V
CC
, T
A
= -55
TO
+125
C,
UNLESS
OTHERWISE
SPECIFIED
)
1. t
DF
is defined as the time at which the output becomes an open circuit and data is no longer driven.
2. AC electrical parameters for programming operations are not tested. These are guaranteed by design.
P
ARAMENTER
T
EST
C
ONDITION
S
YMBOL
S
UBGRPOUPS
M
IN
M
AX
U
NIT
Address Access Time
-120
-150
-200
CE = OE = V
IL
t
ACC
9, 10, 11
--
--
--
120
150
200
ns
Chip Enable Access Time
-120
-150
-200
OE = V
IL
t
CE
9, 10, 11
--
--
--
120
150
200
ns
Output Enable Access Time
-120
-150
-200
CE = V
IL
t
OE
9, 10, 11
--
--
--
60
70
70
ns
Output Hold to Address Change
-120
-150
-200
CE = V
IL
t
OH
9, 10, 11
0
0
0
--
--
--
ns
Output Disable to High-Z
3
-120
-150
-200
3. Test conditions:
- Input pulse levels
0.45V/2.4V
- Input rise and fall times
< 10 ns
- Output load
1TTL Fate + 100 pF (including scope and jig)
- Referenced levels for measuring timing
0.8V/2.0V
CE = OE = V
IL
t
DF
9, 10, 11
0
0
0
50
50
50
ns
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All data sheets are subject to change without notice
2003 Maxwell Technologies
All rights reserved.
512K (64K x 8-Bit) OTP EPROM
27C512T
06.24.03 REV 4
T
ABLE
8. 27C512T AC E
LECTRICAL
C
HARACTERISTICS
FOR
P
ROGRAMMING
O
PERATION
1,2
(V
CC
= 6.0V + 0.25V, V
PP
= 12.5V + 0.3V, T
A
= 25
C)
1. t
DF
is defined as the time at which the output becomes an open circuit and data is no longer driven.
2. AC electrical parameters for programming operations are not tested. These are guaranteed by design.
P
ARAMETER
S
YMBOL
S
UBGROUPS
M
IN
T
YP
M
AX
U
NIT
Address Setup Time
t
AS
9, 10, 11
2
--
--
s
Address Hold Time
t
AH
9, 10, 11
0
--
--
s
Data Setup Time
t
DS
9, 10, 11
2
--
--
s
Data Hold Time
t
DH
9, 10, 11
2
--
--
s
V
PP
Setup Time
t
VPS
9, 10, 11
2
--
--
s
V
CC
Setup Time
t
VCS
9, 10, 11
2
--
--
s
Output Enable Setup Time
t
OES
9, 10, 11
2
--
--
s
Output Disable Time
t
DF
3
3. Test Conditions:
- Input pulse levels
0.45V/2.4V
- Input rise and fall times
< 20 ns
- Referenced levels for measuring timing
0.8V/2.0V
9, 10, 11
0
--
130
ns
CE Initial Programming Pulse Width
t
PW
9, 10, 11
0.19
0.20
0.21
ms
CE Overprogramming Pulse Width
t
OPW
9, 10, 11
0.19
--
5.25
ms
Output Enable Hold Time
t
OEH
9, 10, 11
2
--
--
s
V
PP
Recovery Time
t
VR
9, 10, 11
2
--
--
s
Data Valid from Chip Enable
t
DV
9, 10, 11
1
--
--
s
T
ABLE
9. 27C512T DC E
LECTRICAL
C
HARACTERISTICS
FOR
P
ROGRAMMING
O
PERATIONS1,2,3,4
(V
CC
= 6.0V + 0.25V, V
PP
= 12.5V + 0.3V, T
A
= 25
C)
1. V
CC
must be applied before V
PP
and removed after V
PP
.
2. V
PP
must not exceed 13V, including overshoot.
3. Do not change V
PP
from V
IL
to 12.5V or 12.5V to V
IL
when CE = low.
4. DC electrical parameters for programming operations are not tested. These are guaranteed by design.
P
ARAMETER
T
EST
C
ONDITION
S
YMBOL
S
UBGROUPS
M
IN
M
AX
U
NIT
Input Leakage Current
V
IN
=0V to V
CC
I
LI
1, 2, 3
--
2
A
Operating V
CC
Current
I
CC
1, 2, 3
--
30
mA
Operating V
PP
Current
CE=PGM=V
IL
I
PP
1, 2, 3
--
40
mA
Input Voltage
5
5. Device reliability may be adversely affected if the device is installed or removed while V
PP
= 12.5V.
V
IH
1, 2, 3
2.2
V
CC
+0.5
6
V
V
IL
1, 2, 3
-0.1
7
0.8
Output Voltage
I
OH
=-400 A
V
OH
1, 2, 3
2.4
--
V
I
OH
= 2.1mA
V
OL
1, 2, 3
--
0.45
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