P/N:PM0412

REV. 2.3, JUN. 19, 2003

FEATURES

· Bit organization

- 1M x 8 (byte mode)
- 512K x 16 (word mode)

· Fast access time

- Random access: 100ns (max.)
- Page access: 30ns (max.)

· Current

- Operating: 20mA
- Standby: 20uA

· Supply voltage

- 100ns @3.0V ~ 3.6V
- 120ns @2.7V ~ 3.6V

· Package

- 44 pin SOP (500mil)
- 42 pin PDIP (600mil)
- 48 pin TSOP (type 1)
- 44 pin TSOP (type 2)

PIN CONFIGURATION

44 SOP/44TSOP

ORDER INFORMATION

Part No.

Access

Page

Package

Time

Access Time

MX23L8111MC-10 100ns

30ns

44 pin SOP

MX23L8111MC-12 120ns

60ns

44 pin SOP

MX23L8111PC-10

100ns

30ns

42 pin PDIP

MX23L8111PC-12

120ns

60ns

42 pin PDIP

MX23L8111TC-10

100ns

50ns

48 pin TSOP

MX23L8111TC-12

120ns

60ns

48 pin TSOP

MX23L8111RC-10

100ns

50ns

48 pin RTSOP

MX23L8111RC-12

120ns

60ns

48 pin RTSOP

MX23L8111YC-10

100ns

50ns

44 pin TSOP

MX23L8111YC-12

120ns

60ns

44 pin TSOP

Note: 48-TSOP and 48-RTSOP support word mode only, not
for byte mode.

MX23L8111

8M-BIT MASK ROM(8/16 BIT OUTPUT)

42PDIP

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

A18
A17

A7
A6
A5
A4
A3
A2
A1
A0

VSS

D0
D8
D1
D9
D2

D10

D11

NC
NC
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC

MX23L8111

A18

A17

VSS

D10

D11

A10

A11

A12

A13

A14

A15

A16

BYTE

VSS

D15/A-1

D14

D13

D12

VCC

48 TSOP (for word mode only)

48 Reverse TSOP (for word mode only)

A16
A15
A14
A13
A12
A11
A10

A9
A8

VSS

A18
A17

A7
A6
A5
A4
A3
A2
A1
A0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

VSS
VSS
D15
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25

MX23L8111

(Normal Type)

NC
A16
A15
A14
A13
A12
A11
A10
A9
A8
NC
VSS
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25

VSS
VSS

D15

D14

D13

D12

VCC
VCC

D11

D10

D2
D9
D1
D8
D0

VSS
VSS

1
2
3
4
5
6
7
8
9

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

MX23L8111

(Reverse Type)

P/N:PM0412

REV. 2.3, JUN. 19, 2003

MX23L8111

PIN DESCRIPTION

Symbol

Pin Function

A0~A18

Address Inputs

D0~D14

Data Outputs

D15/A-1

D15(Word Mode)/LSB Address (Byte

Mode)

Chip Enable Input

Output Enable Input

Byte

Word/Byte Mode Selection

VCC

Power Supply Pin

VSS

Ground Pin

No Connection

MODE SELECTION

CE OE Byte D15/A-1 D0~D7 D8~D15 Mode

Power

High Z

Stand-by

High Z

Active

Output D0~D7 D8~D15 Word

Active

Input

D0~D7

High Z

Byte

Active

BLOCK DIAGRAM

Address

Buffer

Memory

Array

Page

Buffer

Page

Decoder

Double

Word

Output

Buffer

D15/(D7)

A18

A0/(A-1)

BYTE

ABSOLUTE MAXIMUM RATINGS

Item

Symbol

Ratings

Voltage on any Pin Relative to VSS

VIN

-1.3V to VCC+2.0V (Note)

Ambient Operating Temperature

Topr

C to 70

Storage Temperature

Tstg

-65

C to 125

Note: Minimum DC voltage on input or I/O pins is -0.5V.
During voltage transitions, inputs may undershoot VSS
to -1.3V for periods of up to 20ns. Maximum DC voltage
on input or I/O pins is VCC+0.5V. During voltage transi-
tions, input may overshoot VCC to VCC+2.0V for peri-
ods of up to 20ns.

P/N:PM0412

REV. 2.3, JUN. 19, 2003

MX23L8111

DC CHARACTERISTICS (Ta = 0

C ~ 70

C, VCC = 3.3V

10%)

Item

Symbol

MIN.

MAX.

Conditions

Output High Voltage

VOH

24V

IOH = -0.4mA

Output Low Voltage

VOL

0.4V

IOL = 1.6mA

Input High Voltage

VIH

2.2V

VCC+0.3V

Input Low Voltage

VIL

-0.3V

0.8V

Input Leakage Current

ILI

5uA

0V, VCC

Output Leakage Current

ILO

5uA

0V, VCC

Operating Current

ICC1

20mA

f=10MHz, all output open

Standby Current (TTL)

ISTB1

1mA

CE=VIH

Standby Current (CMOS)

ISTB2

20uA

CE> VCC - 0.2V

Input Capacitance

CIN

10pF

Ta = 25

C, f = 1MHZ

Output Capacitance

COUT

10pF

Ta = 25

C, f = 1MHZ

AC CHARACTERISTICS (Ta = 0

C ~ 70

C, VCC = 3.3V

10%)

Item

Symbol

23L8111-10

23L8111-12

MIN.

MAX.

MIN.

MAX.

Read Cycle Time

tRC

100ns

120ns

Address Access Time

tAA

100ns

120ns

Chip Enable Access Time

tACE

100ns

120ns

Page Mode Access Time

tPA

30ns*

60ns

Output Enable Time

tOE

30ns*

60ns

Output Hold After Address

tOH

0ns

Output High Z Delay

tHZ

20ns

Note:No output loading is present in tester load board.

Active loading is used and under software programming control.

Output loading capacitance includes load board's and all stray capacitance.

DOUT

C<100pF

IOL (load)=1.6mA

IOH (load)=-0.4mA

AC Test Conditions

Input Pulse Levels

0.4V~2.4V

Input Rise and Fall Times

10ns

Input Timing Level

1.4V

Output Timing Level

1.4V

Output Load

See Figure

Note: Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by
design over the full voltage and temperature operating range - not tested.
* For 100ns speed grade, tPA and tOE spec are 30ns for PDIP and SOP package types, but 50ns for TSOP package
type.

P/N:PM0412

REV. 2.3, JUN. 19, 2003

MX23L8111

REVISION HISTORY

Revision

Description

Page

Date

1.8

Add new 44pin TSOP(type2)

JUL/17/1998

1.9

Output hold after address (tOH) spec is revised as 0ns(min.)

JAN/22/1999

120ns speed grade's voltage range is revised as 2.7V~3.6V

2.0

Add Package Information

P5~9

NOV/23/2001

2.1

Modify page access:50ns(max.)-->30ns(max.)

P1,3

MAY/24/2002

2.2

Modify Package Information

P5~9

NOV/21/2002

2.3

Modify 42-PDIP Package Information

JUN/19/2003

MX23L8111

ACRONIX

NTERNATIONAL

O.,

TD.

Headquarters:

TEL:+886-3-578-6688

FAX:+886-3-563-2888

Europe Office :

TEL:+32-2-456-8020

FAX:+32-2-456-8021

Hong Kong Office :

TEL:+86-755-834-335-79

FAX:+86-755-834-380-78

Japan Office :

Kawasaki Office :

TEL:+81-44-246-9100

FAX:+81-44-246-9105

Osaka Office :

TEL:+81-6-4807-5460

FAX:+81-6-4807-5461

Singapore Office :

TEL:+65-6346-5505

FAX:+65-6348-8096

Taipei Office :

TEL:+886-2-2509-3300

FAX:+886-2-2509-2200

ACRONIX

MERICA,

NC.

TEL:+1-408-262-8887

FAX:+1-408-262-8810

http : //www.macronix.com

MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.

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