August 2002

MIC2590B

Micrel

MIC2590B

Dual-Slot PCI Hot Plug Controller

Final Information

General Description

The MIC2590B is a power controller supporting power distri-
bution requirements for Peripheral Component Interconnect
(PCI) hot plug compliant systems incorporating the Intelligent
Platform Management Interface (IPMI). The MIC2590B pro-
vides complete power control support for two PCI slots
including the 3.3V

AUX

defined by the PCI 2.2 specification.

Support for +5V, +3.3V, +12V and 12V supplies is provided
including programmable constant-current inrush limiting,
voltage supervision, programmable current limit, fault report-
ing and circuit breaker functions which provide fault isolation.
The MIC2590B also incorporates a SMBus interface in which
complete status and control of power within each slot is
provided. Data such as voltage and current from each supply
of each slot can be obtained for IPMI sensor records in
addition to power status of each slot.

Features

· Supports two independent PCI 2.2 slots
· SMBus interface for slot power control and status
· +5V, +3.3V, +12V, 12V, +3.3V

AUX

supplies supported

per PCI specification 2.2

· Programmable inrush current-limiting
· Active current regulation controls inrush current
· Electronic circuit breaker
· Dual level fault detection for quick fault response without

nuisance tripping

· Thermal isolation between circuitry for slot A

and slot B

Applications

· PCI hot-plug power distribution

Micrel, Inc. · 1849 Fortune Drive · San Jose, CA 95131 · USA · tel + 1 (408) 944-0800 · fax + 1 (408) 944-0970 · http://www.micrel.com

Ordering Information

5V & 3V Fast-trip

+12V & 12V Fast-trip

Part Number

Threshold

Operating Temp. Range

Package

MIC2590B-2BTQ

100mV

1.5A/0.4A

°C to +70°C

48-Pin TQFP

MIC2590B-5BTQ

Disabled*

1.5A/0.4A

°C to +70°C

48-Pin TQFP

*Contact factory for availability.

MIC2590B

Micrel

MIC2590B

August 2002

Pin Description

Pin Number

Pin Name

Pin Function

6, 31

5VINA, 5VINB

5V Supply Power and Sense Inputs [A/B]: Two pins are provided for Kelvin
connection (one for each slot). Pin 6 is the Kelvin sense connection to the
supply side of the sense resistor for 5V Slot A. Pin 31 is the Kelvin sense
connection to the supply side of the sense resistor for 5V Slot B. These two
pins must ultimately connect to each other within 10cm. An undervoltage
lockout circuit (UVLO) prevents the switches from turning on while this input is
less than its lockout threshold.

12, 25

3VINA, 3VINB

3.3V Supply Power and Sense Inputs [A/B]: Two pins are provided for
Kelvin connection (one for each slot). Pin 12 is the Kelvin sense connection to
the supply side of the sense resistor for 3V Slot A. Pin 25 is the Kelvin sense
connection to the supply side of the sense resistor for 3V Slot B. These two
pins must ultimately connect to each other within 10cm. An undervoltage
lockout circuit (UVLO) prevents the switches from turning on while this input is
less than its lockout threshold.

5, 32

12VIN 2 pins

+12V Supply Input: An undervoltage lockout circuit prevents the switches from
turning on while this input is less than its lockout threshold. Both pins must be
tied together at the chip.

17,18

12VMIN 2 pins

12V Supply Input: An undervoltage lockout circuit prevents the switches from
turning on while this input is less than its lockout threshold. Both pins must be
tied together at the chip.

10, 27

12VOUTA, 12VOUTB

12V output [A/B]

19, 20

12MVOUTA, 12MVOUTB

12V output [A/B]

3, 34

12VSLEWA, 12VSLEWB

12V Slew Rate Control [A/B]: Connect capacitors between these pins and
ground to set output slew rates of the +12V and -12V supplies.

45, 42

AUXENA, AUXENB

AUX Enable Inputs [A/B]: Rising-edge sensitive enable inputs for VAUXA
and VAUXB outputs. Taking AUXENA/AUXENB low after a fault resets the
respective slot's Aux Output Fault Latch. Tie these pins to ground if using
SMBus-mode power control.

16, 21

3VOUTA, 3VOUTB

3.3V Power-Good Sense Inputs: Connect to 3.3V[A/B] outputs. Used to
monitor the 3.3V output voltages for Power-Good status.

9, 28

5VOUTA, 5VOUTB

5V Power-Good Sense Inputs: Connect to 5V[A/B] outputs. Used to monitor
the 5V output voltages for Power-Good status.

IREF

A resistor connected between this pin and ground sets the ADC current
measurement gain. This resistor must be 20k

±1%.

7, 30

5VSENSEA, 5VSENSEB

5V Circuit Breaker Sense Input [A/B]: The current-limit thresholds are set by
connecting sense resistors between these pins and 5VIN[A/B]. When the
current-limit threshold of IR = 50mV is reached, the 5VGATE[A/B] pin is
modulated to maintain a constant voltage across the sense resistor and
therefore a constant current into the load. If the 50mV threshold is exceeded
for t

FLT

, the circuit breaker is tripped and the GATE pin for the affected slot is

immediately pulled low.

13, 24

3VSENSEA, 3VSENSEB

3V Circuit Breaker Sense Input [A/B]: The current limit thresholds are set by
connecting sense resistors between these pins and 3VIN[A/B]. When the
current limit threshold of IR = 50mV is reached, the 3VGATE[A/B] pin is
modulated to maintain a constant voltage across the sense resistor and
therefore a constant current into the load. If the 50mV threshold is exceeded
for t

FLT

, the circuit breaker is tripped and the GATE pin for the affected slot is

immediately pulled low.

August 2002

MIC2590B

Micrel

Pin Description

Pin Number

Pin Name

Pin Function

8, 29

5VGATEA, 5VGATEB

5V Gate Drive Outputs [A/B]: Each connects to the gate of an external N-
Channel MOSFET. During power-up the C

GATE

and the gate of the

MOSFETs are charged by a 20

µA current source. This controls the value of

dv/dt seen at the source of the MOSFETs, and hence the current flowing into
the load capacitance.

During current limit events, the voltage at this pin is adjusted to maintain
constant current through the switch for a period of t

FLT

. Whenever an

overcurrent, thermal shutdown or input undervoltage fault condition occurs
the GATE pin for the affected slot is immediately brought low.

During power-down these pins are discharged by an internal current source.

14, 23

3VGATEA, 3VGATEB

3V Gate Drive Outputs [A/B]: Each connects to the gate of an external N-
Channel MOSFET. During power-up the C

GATE

and the gate of the

MOSFETs are charged by a 20

µA current source. This controls the value of

dv/dt seen at the source of the MOSFETs, and hence the current flowing into
the load capacitance.

During current limit events, the voltage at this pin is adjusted to maintain
constant current through the switch for a period of t

FLT

. Whenever an

overcurrent, thermal shutdown or input undervoltage fault condition occurs
the GATE pin for the affected slot is immediately brought low.

During power-down these pins are discharged by an internal current source.

11, 26

VSTBY 2 pins

3.3V Standby input voltage required to support PCI 2.2 VAUX input: SMBus,
internal registers and A/D converter run off of VSTBY to ensure chip access
during standby modes. A UVLO circuit prevents turn-on of this supply until
VSTBY rises above its UVLO threshold. Both pins must be tied together at
the chip.

15, 22

VAUXA, VAUXB

AUX

[A/B] output voltages to PCI card slots: These outputs connect the

VAUX pin of the PCI 2.2 Connectors VSTBY via internal 400m

MOSFETs

which are current-limited and protected against short circuit faults.

44, 43

ONA, ONB

Enable input for MAIN outputs: Rising-edge sensitive. Used to enable or
disable MAIN (5V, 3.3V, +12V, 12V) outputs. Taking ONA/ONB low after a
fault resets the respective slot's Main Output Fault Latch. Tie these pins to
ground if using SMBus-mode power control.

1, 36

/FAULTA, /FAULTB

Open Drain, Active-Low: Asserted whenever the circuit breaker trips due to
a fault condition.

/FAULT[A/B] is reset by bringing the faulted slot's ON pin low if /FAULT was
asserted in response to a fault condition on one of the slot's MAIN outputs
(+12V, +5V, +3.3V, or 12V).

/FAULT[A/B] is reset by bringing the faulted slot's AUXEN pin low if /FAULT
was asserted in response to a fault condition on the slot's VAUX output.

If a fault condition occurred on both the MAIN and AUX outputs of the same
slot, then both ON and AUXEN must be brought low to de-assert the /FAULT
output.

2, 35

CFILTERA, CFILTERB

Filter Capacitor [A/B]: Capacitors connected between these pins and ground
set the duration of t

FLT

. t

FLT

is the amount of time for which a slot remains in

current-limit before its circuit breaker is tripped.

/INT

Interrupt Output: Open Drain, Active-low. Asserted whenever a power fault
is detected. Cleared by writing a logic 1 to the respective active bit into the
Status Register.

August 2002

MIC2590B

Micrel

Electrical Characteristics

12V

= 12V; 12MV

= 12V; 5V

= 5V; 3V

= 3.3V; V

STBY

= 3.3V; T

= 0

°C to 70°C; unless noted.

Power Control and Logic Sections

Symbol

Parameter

Condition

Min

Typ

Max

Units

CC12

Supply Current

0.6

2.0

CC5

1.2

2.0

CC33

0.5

0.7

CC12M

1.0

2.0

CCVSBY

2.5

5.0

UVLO

Under Voltage Lockout

12V

increasing

2.2

2.5

2.75

increasing

3.7

4.0

4.3

12MV

decreasing

STBY

increasing

2.8

2.9

3.0

HYSUV

Under Voltage Lockout Hysteresis -

180

12V

, 12MV

, 5V

, 3V

HYSSTBY

Under-voltage Lockout Hysteresis -

STBY

UVTH

Power Good Under-Voltage Thresholds

UVTH(12V)

12V

OUT

[A/B]

12V

OUT

[A/B] decreasing

10.2

10.5

10.8

UVTH(12MV)

12MV

OUT

[A/B]

12MV

OUT

[A/B] increasing

10.8

10.6

10.2

UVTH(3V)

OUT

[A/B]

OUT

[A/B] decreasing

2.7

2.8

2.9

UVTH(5V)

OUT

[A/B]

OUT

[A/B] decreasing

4.4

4.5

4.7

UVTH(VAUX)

AUX

[A/B]

AUX

[A/B] decreasing

2.7

2.8

2.9

HYSPG

Power-Good Detect Hysteresis

GATE

/3V

GATE

Voltage

12V

-1.5

12V

GATE(SOURCE)

GATE

/3V

GATE

Output Source

start cycle

µA

Current

GATE(SINK)

GATE

/3V

GATE

Output Sink

any fault condition, V

GATE

= 5V

Fault Current

FILTER

Threshold Voltage

1.20

1.25

1.30

FILTER

[A/B] Charge Current

[5/3]

SENSE

> V

THILIMIT

1.80

2.5

5.0

µA

SLEW

12V

SLEW

[A/B] Charge Current

During turn-on only

µA

THILIMIT

Current Limit Threshold Voltages
5V[A/B] Supplies

5VIN

5VSENSE

3.3V[A/B] Supplies

3VIN

3VSENSE

THFAST

OUT

[A/B] and 3V

OUT

[A/B]

MIC2590B-2

113

135

Fast-Trip Thresholds

MIC2590B-5

Disabled

Absolute Maximum Ratings

(Note 1)

Supply Voltage

(12V

) ..................................................................... +14V

(12MV

) .................................................................. 14V

(5V

) ......................................................................... +7V

(3V

), (V

STBY

) .......................................................... +7V

Any Logic Output Voltage ............ 0.5 (min.)/+5.5V (max.)

Any Logic Input Voltage ............... 0.5 (min.)/+5.5V (max.)

Output Current (FAULT[A/B]#, /INT, SDA) ................. 10mA

Lead Temperature

IR Reflow, Peak Temperature ..................... 235 +5/0

°C

Storage Temperature (T

) ....................... 65

°C to +150°C

ESD Rating, Note 3 ...................................................... 2kV

Operating Ratings

(Note 2)

Supply Voltage

(12V

) ............................................... +11.65V to +12.6V

(12MV

) .............................................. 11.0V to 13.2V

(5V

) ................................................... +4.85V to +5.25V

(3V

) ....................................................... +3.1V to +3.6V

STBY

) .................................................. +3.15V to +3.6V

Ambient Temperature (T

) ............................. 0

°C to +70°C

Junction Temperature (T

) ........................................ 125

°C

Package Thermal Resistance

TQFP

(

) ....................................................... 56.5

°C/W

MIC2590B

Micrel

MIC2590B

August 2002

Symbol

Parameter

Condition

Min

Typ

Max

Units

LOW-Level Input Voltage

0.8

(SCL, SDA, ON[A/B], A[0-2],GPI[A/B])

Output LOW Voltage

= 3mA

0.4

/FAULT[A/B], /INT, SDA

HIGH-Level Input Voltage

2.1

SCL, SDA, ON[A/B], A[0-2],
AUXEN[A/B], GPI[A/B])

PULL-UP

Internal Pullups from A[0-2] to V

STBY

Input Leakage Current

±5

µA

SCL, ON[A/B], AUXEN[A/B], GP[A/B])

LKG(OFF)

Off-State Leakage Current

±5

µA

SDA, /FAULT[A/B], /INT

Overtemperature Shutdown & Reset

Increasing, each slot, Note 5

140

°C

Thresholds, with overcurrent on slot

Decreasing, each slot, Note 5

130

°C

Overtemperature Shutdown & Reset

Increasing, both slots, Note 5

160

°C

Thresholds, all other conditions

Decreasing, both slots, Note 5

150

°C

(all outputs will latch OFF)

OUT(ON)

Output MOSFET Resistance

DS(12V)

12V MOSFET

= 500mA, T

= 125

°C

500

DS(12VM)

12V MOSFET

= 100mA, T

= 125

°C

DS(AUX)

AUX

MOSFET

= 375mA, T

= 125

°C

400

OFF

Off-State Output Offset Voltage

OFF(+12V)

12V

OUT

[A/B]

12V

OUT

[A/B] = Off, T

= 125

°C

OFF(12V)

12MV

OUT

[A/B]

12MV

OUT

[A/B] = Off, T

= 125

°C

OFF(VAUX)

AUX

[A/B]

AUX

[A/B] = Off, T

= 125

°C

THSLOW

Current Limit Threshold

LIM(12)

12V MOSFET

12V

OUT

[A/B] = 0V

0.52

1.0

1.5

LIM(12M)

12V MOSFET

12MV

OUT

[A/B] = 0V

0.11

0.2

0.3

THFAST

Fast-Trip Thresholds

12V

OUT

[A/B] (MIC2590B-2)

1.0

2.15

3.0

12MV

OUT

[A/B] (MIC2590B-2)

0.20

0.45

0.6

AUX(THRESH)

Auxiliary Output Current Limit Threshold Current which must be drawn from V

AUX

0.84

Figure 4

to register as a fault

SC(TRAN)

Maximum Transient Short Circuit Current

AUX

Enabled, then Grounded I

MAX

= V

STBY

/ R

DS(AUX)

LIM(AUX)

Regulated Current after Transient

From end of I

SC(TRAN)

to C

FILTER

Time Out

0.375

0.7

1.35

DISCH

Output Discharge Resistance

(12V)

12V

OUT

[A/B]

12V

OUT

[A/B] = 6.0V

1600

(12MV)

12MV

OUT

[A/B]

12MV

OUT

[A/B] = 6.0V

600

(3V)

OUT

[A/B]

OUT

[A/B] = 1.65V

150

(5V)

OUT

[A/B]

OUT

[A/B] = 2.5V

150

(3VAUX)

AUX

[A/B]

OUT

[A/B] = 1.65V

430

OFF(3)

Current Limit Response Time

MIC2590B-2 with C

GATE

= 10nF,

µs

OFF(5)

for 3.3V and 5V Outputs, Figure 2

SENSE

= 200mV

SC(TRAN)

AUX

Current Limiter Response Time V

AUX

[A/B] = 0V, Note 5

µs

Figure 5

OFF(12)

12V Current Limit Response

12V

OUT

[A/B] = 0V, Note 5

µs

Figure 3

OFF(12M)

12V Current Limit Response

12MV

OUT

[A/B] = 0V, Note 5

µs

Figure 3

August 2002

MIC2590B

Micrel

Symbol

Parameter

Condition

Min

Typ

Max

Units

PROP(3VFAULT)

Delay from 3V[A/B] overcurrent-limit

MIC2590B-2, V

SENSE

THLIMIT

µs

to FAULT Output

200mV, C

FILTER

= open

PROP(5VFAULT)

Delay from 5V[A/B] overcurrent-limit

MIC2590B-2, V

SENSE

THLIMIT

µs

to FAULT Output

200mV, C

FILTER

= open

ON[A/B], AUXEN[A/B] Pulse Width

Note 5

100

POR

MIC2590B Power-On Reset Time

Note 5

500

µs

after V

STBY

becomes valid

8-Bit Analog to Digital Converter

Symbol

Parameter

Condition

Min

Typ

Max

Units

Total Unadjusted Error
Voltage, All Outputs

Current, 3V

OUT

[A/B]/5V

OUT

[A/B]

Measured as voltage across

Current, V

AUX

[A/B], 12V

OUT

[A/B],

corresponding external R

SENSE

±3

12MV

OUT

[A/B]

CONV

Conversion Time

100

Resolution Specifications:

AUXA

Full Scale Voltage

3.85

AUXB

LSB of Voltage

15.1

Full Scale Current

375

LSB of Current

1.47

OUTA

Full Scale Voltage

3.85

OUTB

LSB of Voltage

15.1

Full Scale Current

External R

SENSE

= 6.00m

11.6

LSB of Current

45.5

OUTA

Full Scale Voltage

5.89

OUTB

LSB of Voltage

23.1

Full Scale Current

External R

SENSE

= 10.0m

6.96

LSB of Current

27.3

12V

OUTA

Full Scale Voltage

13.8

12V

OUTB

LSB of Voltage

54.1

Full Scale Current

500

LSB of Current

1.96

12MV

OUTA

Full Scale Voltage

13.6

12MV

OUTB

LSB of Voltage

53.5

Full Scale Current

100

LSB of Current

0.392

SMBus Timing, Note 5

Symbol

Parameter

Condition

Min

Typ

Max

Units

SCL (Clock) Period

Figure 1

2.5

µs

Data In Set-Up Time to SCL HIGH

Figure 1

100

Data Out Stable after SCL LOW

Figure 1

300

Data LOW Set-Up Time to

Start Condition, Figure 1

100

SCL LOW

Data HIGH Hold Time after

Stop Condition, Figure 1

100

SCL HIGH

Note 1.

Exceeding the absolute maximum rating may damage the device.

Note 2.

The device is not guaranteed to function outside its operating ratings.

Note 3.

Devices are ESD sensitive. Employ proper handling precautions. Human body model, 1.5k

in series with 100pF.

Note 4.

See the Applications Section.

Note 5.

Parameters guaranteed by design. Not 100% production tested.

August 2002

MIC2590B

Micrel

Functional Description

Hot Swap Insertion

When circuit boards are inserted into systems carrying live
supply voltages ("hot plugged"), high inrush currents often
result due to the charging of bulk capacitance that resides
across the circuit board's supply pins. This transient inrush
current can cause the system's supply voltages to tempo-
rarily go out of regulation, causing data loss or system lock-
up. In more extreme cases, the transients occurring during a
hot plug event may cause permanent damage to connectors
or on-board components.

The MIC2590B addresses these issues by limiting the inrush
currents to the load (PCI Board), and thereby controlling the
rate at which the load's circuits turn on. In addition, the
MIC2590B offers input and output voltage supervisory func-
tions and current-limiting to provide robust protection for both
the host system and the PCI board.

System Interfaces

The MIC2590B employs two system interfaces. One is the
hot plug Interface (HPI) which includes ON[A/B], AUXEN[A/
B], and /FAULT[A/B]. The other is the System Management
Interface (SMI) consisting of SDA, SCL and /INT, (whose
signals conform to the specifications and format of Intel's
SMBus standard). The MIC2590B can be operated exclu-
sively from the SMI, or can employ the HPI for power control
while continuing to use the SMI for access to all but the power
control registers.

In addition to the basic power control features of the MIC2590B
accessible by the HPI, the SMI also gives the host access to
the following information from the part:

Output voltage from each supply.

Output current from each supply.

Fault conditions occurring on each supply.

When using the System Management Interface for power
control, do not use the hot plug Interface. Conversely, when
using the HPI for power control, do not execute power control
commands over the SMI bus (all other register accesses via
the SMI bus remain permissible while in the HPI control
mode). Note that if power control is performed via the SMI
bus, the AUXENA, AUXENB, ONA and ONB pins should be
tied to ground.

Power-On Reset and Power Cycling

The MIC2590B utilizes VSTBY as the main supply input
source. It is required for proper operation of the MIC2590B
SMBus, registers and ADC and must be applied at all times.
A Power-On Reset (POR) cycle is initiated after VSTBY rises
above its UVLO threshold and remains valid at that voltage
for 500

µs. All internal registers except RESULT are cleared

after POR. If VSTBY is recycled the MIC2590B enters a new
power-on reset cycle. VSTBY must be the first supply input
applied. Following the POR interval, the MAIN supply inputs
of 12V

, 12MV

, 5V

and 3V

may be applied in any order.

The SMBus is ready for access at the end of the POR interval.
During t

POR

all outputs are off.

Power-Up Cycle (See Typical Application Circuit)

When a slot is off, the 5VGATE and 3VGATE pins are held
low with an internal pull-down current source. When a slot's
main outputs are enabled, and all input voltages are above
their respective undervoltage lockout thresholds, all four
main supplies execute a controlled turn on. At this time, the
GATE voltages of the 5V and 3.3V MOSFETs are ramped at
a controlled rate from 0V to approximately 11.5V. This is
sufficient to fully enhance the external MOSFETs for lowest
possible DC losses. The ramp rate is controlled by 25

µA(typ.)

current sources from the GATE pins charging each C

GATE

The magnitude and slew rate of the output current is propor-
tional to the value of C

GATE

and the load capacitance. The

minimum value of C

GATE

is selected to ensure that during

start-up the load current does not exceed the current-limit
threshold. The following equation is used to determine the
value of C

GATE

(min):

(min)

GATE

LIM

LOAD

Where C

LOAD

is the load capacitance connected to the 3.3V

and 5V outputs and I

LIM

and I

GATE

are respectively the

current-limit and gate charge current specifications as given
in the Electrical Characteristics table. The output slew rate
dv/dt is computed by:

dv / dt (load)

GATE

SLEW

= 25

GATE

dv/dt (load)

0.001

µF

25000V/s

0.01

µF

2500V/s

0.1

µF

250V/s

µF

25V/s

Table 1. 3.3V/5V Output Slew Rate Selection

For the +12V and 12V supplies, the output slew rate is
controlled by capacitors connected to the 12VSLEWA and
12VSLEWB pins. To determine the minimum value of the
slew rate capacitor, (C

SLEW

), connected to 12VSLEW[A/B],

the following equation is used:

(min)

SLEW

LIM

LOAD

where C

LOAD

is the load capacitance connected to the +12V

and 12V outputs, and I

LIM

and I

SLEW

are respectively the

current-limit and slew rate charge current values found in the
Electrical Characteristics table. The equation above com-
putes the minimum value to guarantee the device does not
enter into current limit. The slew rate dv/dt is computed by:

dv / dt at load

SLEW

By appropriate selection of the value of C

SLEW

, it can be

ensured that the magnitude of the inrush current never
exceeds the current limit for a given load capacitance. Since

MIC2590B

Micrel

MIC2590B

August 2002

one capacitor fixes the slew rate for both +12V and 12V, the
capacitor value should be chosen to provide the slower slew
rate of the two. Table 2 depicts the output slew rate for various
values of C

SLEW

SLEW

= 22

GATE

dv/dt (load)

0.001

µF

22000V/s

0.01

µF

2200V/s

0.1

µF

220V/s

µF

22V/s

Table 2.

12V Output Slew Rate Selection

Power Down Cycle

When a slot is turned off, internal switches are connected to
each of the outputs to discharge the PCI board's bypass
capacitors to ground.

Standby Mode

Standby mode is entered when any one (or more) enabled
MAIN supply input(s) (12VIN, 12MVIN, 5VIN and 3VIN) drops
below its respective UVLO threshold. The MIC2590B sup-
plies two 3.3V auxiliary outputs, VAUX[A/B], satisfying PCI
2.2 specifications. These outputs are fed via the VSTBY
input, and controlled by the AUXEN[A/B] inputs or via their
SMI bus Control Registers. These outputs are independent of
the MAIN outputs: should one or more of the MAIN supply
inputs move below its UVLO thresholds, VAUX[A/B] still
function as long as VSTBY is present. Prior to entering
standby mode, ONA and ONB (or the MAINA and MAINB bits
in the Control Registers) inputs should be de-asserted. If this
is not done, the MIC2590B will assert /FAULT, and also /INT
if interrupts are enabled, when the MIC2590B detects an
undervoltage condition on a supply input.

Circuit Breaker Functions

The MIC2590B provides an electronic circuit breaker function
that protects against excessive loads such as short circuits at
each supply. When the current from one or more of a slot's
MAIN outputs exceeds the current limit threshold
(50mV/R

SENSE

for 3.3V and 5V, 1.0A for +12V, and/or 0.2A

for 12V) for a duration greater than t

FLT

, the circuit breaker

is tripped and all MAIN supplies (all outputs except
VAUX[A/B]) are shut off. Should the load current exceed
I

THFAST

(+12V and 12V), or cause a MAIN output's V

SENSE

to exceed V

THFAST

(+3.3V and +5V), the outputs are shut off

with no delay. Undervoltage conditions on the MAIN supply
inputs also trip the circuit breaker, but only when the MAIN
outputs are enabled (to signal a supply input brown-out
condition).

The VAUX[A/B] outputs have their own separate circuit
breaker functions. VAUX[A/B] do not incorporate a fast-trip
threshold, but instead regulate the output current into a fault
to avoid exceeding their operating current limit. The circuit
breaker will trip due to overcurrents on VAUX[A/B] when the
fault timer expires. This use of the t

FLT

timer prevents the

circuit breaker from tripping prematurely due to brief current
transients.

Following a fault condition, the outputs can be turned on
again via the ON inputs (if the fault occurred on one of the
MAIN outputs), via the AUXEN inputs (if the fault occurred on
the AUX outputs), or by cycling both ON and AUXEN (if faults
occurred on both the MAIN and AUX outputs). A fault condi-
tion can alternatively be cleared under SMI control of the
ENABLE bits in the CNTRL[A/B] registers. When the circuit
breaker trips, /FAULT[A/B] will be asserted if the outputs were
enabled through the hot plug Interface (non-SMI mode)
inputs. At the same time, /INT will be asserted (unless
interrupts are masked). Note that /INT is de-asserted by
writing a logic 1 back into the respective fault bit position(s) in
the STAT[A/B] register or the Common Status Register.

FLT

is set by external capacitors, C

FIL[A/B]

, connected to the

CFILTER[A/B] pins. The equation below can be used to
determine the capacitor value for a given duration of t

FLT

2.0 F

1second

FIL

FLT

Thermal Shutdown

The internal +12V, 12V and VAUX MOSFETs are protected
against damage not only by current limiting, but by dual-mode
over-temperature protection as well. Each slot controller on
the MIC2590B is thermally isolated from the other. Should an
overcurrent condition raise the junction temperature of one
slot's controller and internal pass elements to 140

°C, all of the

outputs for that slot (including VAUX) will be shut off, and the
slot's /FAULT output will be asserted. The other slot's opera-
tion will remain unaffected. However, should the MIC2590B's
overall die temperature exceed 160

°C, both slots (all outputs,

including VAUXA and VAUXB) will be shut off, whether or not
a current-limit condition exists. A 160

°C overtemperature

condition additionally sets the overtemperature bit (OT_INT)
in the Common Status Register.

August 2002

MIC2590B

Micrel

A/D Converter

The MIC2590B has a 20-channel, 8-bit A/D converter ca-
pable of monitoring the output voltage and current of each
supply. This information is available via the System Manage-
ment Interface. The information is particularly intended for
use by systems that support the IPMI standard, but may be
used for any desired purpose.

Interrupt Generation

In the MIC2590B, the /INT pin can be asserted (driven low)
whenever a fault condition trips the circuit breaker. The
MIC2590B can thus operate in either polled mode or interrupt
mode. In the polled mode, the Interrupt Mask bit in the
Common Status Register should be set, to prevent the /INT
pin from being asserted. Upon a circuit breaker fault event the
appropriate status bit is also set in the corresponding status
registers. In order to clear the status bit the system must write
a logic 1 back to same bit in the status register. Upon
occurrence of the write the /INT pin will be de-asserted (if
interrupts were enabled), if no other interrupts are pending.
This method of "echo reset" allows data to be retained in the
status registers until such time as the system software is
ready to deal with that data, and then to control the earliest
time at which the next interrupt might occur.

System Management Interface (SMI)

The MIC2590B's System Management Interface uses the
Read_Byte and Write_Byte subset of the SMBus protocols to
communicate with its host via the System Management
Interface bus. Additionally, the /INT output signals the con-
trolling processor that one or more events need attention, if
an interrupt-driven architecture is used. Note that the
MIC2590B does not participate in the SMBus Alert Response
Address (ARA) portion of the SMBus protocol.

AUXEN[x]

ON[x]

AUX OUT[x]

MAIN OUT[x]

FAULT DETECTED

ON AUX OUT[x]

FAULT DETECTED

ON MAIN OUT[x]

/FAULT OUTPUT[x]

/INT OUTPUT

(CLEARED BY SOFTWARE)

Figure 6. Hot Plug Interface Mode Operation

The SMBus Read_Byte operation consists of sending the
device's slave address, followed by the target register's
internal address, and then clocking out the byte to be read
from the target register. Similarly, the Write_Byte operation
consists of sending the device's slave address, followed by
the target register's internal address, and then clocking in the
byte to be written to the target register. The target register
addresses for the MIC2590B are given in Table 4.

MIC2590B SMBus Address Configuration

The MIC2590B responds to its own unique address which is
assigned using A2, A1 and A0. These represent the 3 LSBs
of its 7-bit address, as shown in Table 3. These address bits
are assigned only during power up of the VSTBY supply
input. These three bits allow up to eight MIC2590B devices in
a single system. These pins are either grounded or left
unconnected to specify a logical 0 or 1 respectively. A pin
designated as a logical 1 may also be pulled up to VSTBY.

Inputs

MIC2590B Slave Address

Binary

Hex

1000 000

1000 001

1000 010

1000 011

1000 100

1000 101

1000 100

1000 111

Table 3. MIC2590B SMBus Addressing

MIC2590B

Micrel

MIC2590B

August 2002

S 1

0 A2 A1 A0

1 A

0 X X X A

MIC2590B Slave Address

Master to slave transfer, i.e., DATA driven by master.

Slave to master transfer, i.e., DATA driven by slave.

DATA

CLK

Target Register

Value read from MIC2590B

START

STOP

R/W = READ

ACKNOWLEDGE

NOT ACKNOWLEDGE

Figure 7. READ_BYTE Protocol

S 1 0 0 0 A2 A1 A0

X X X

0 A

0 0 0 0 0 X X X A X X

X X

MIC2590B Slave Address

Master to slave transfer, i.e., DATA driven by master.

Slave to master transfer, i.e., DATA driven by slave.

DATA

CLK

Target Register

Value to be written to MIC2590B

START

STOP

R/W = WRITE

ACKNOWLEDGE

NOT ACKNOWLEDGE

Figure 8. WRITE_BYTE Protocol

Register Set and Programmer's Model

Command

Power-On

Target Register

Byte Value

Default

Label

Description

Read Write

RESULT

ADC Conversion Result Register

n/a

ADCNTRL ADC Control Regster

CNTRLA

Control Register Slot A

CNTRLB

Control Register Slot B

STATA

Slot A Status

STATB

Slot B Status

STAT

Common Status Register

Table 4. MIC2590B Register Addresses

August 2002

MIC2590B

Micrel

Control Register, Slot A (CNTRLA), 8-Bits Read/Write

D[7]

D[6]

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

read-only read-only read-only read-only read-only read-only read-write read-write

AUXAPG MAINAPG Reserved Reserved Reserved Reserved

MAINA

VAUXA

Bit(s)

Function

Operation

AUXAPG

AUX Output Power-Good

1 = Power-Good

Status, Slot A

(VAUXA output is above

its V

UVTH

threshold)

MAINAPG MAIN Output Power-Good 1 = Power-Good

Status, Slot A

(MAINA outputs are
above their V

UVTH

thresholds)

D[5]

Reserved

Always Read As Zero

D[4]

Reserved

Always Read As Zero

D[3]

Reserved

Always Read As Zero

D[2]

Reserved

Always Read As Zero

MAINA

MAIN Enable Control,

0 = OFF, 1 = ON

Slot A

VAUXA

VAUX Enable Control,

0 = OFF, 1 = ON

Slot A

Power-Up Default Value:

0000 0000

= 00

Command Byte (R/W):

0000 0010

= 02

The power-up default value is 00h. Slot A is disabled upon
power-up, i.e., all supply outputs are off.

Control Register, Slot B (CNTRLB), 8-Bits Read/Write

D[7]

D[6]

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

read-only read-only read-only read-only read-only read-only read-write read-write

AUXBPG MAINBPG Reserved Reserved Reserved Reserved

MAINB

VAUXB

Bit(s)

Function

Operation

AUXBPG

AUX Output Power-Good

1 = Power-Good

Status, Slot B

(VAUXB output is above
its V

UVTH

threshold)

MAINBPG MAIN Output Power-Good 1 = Power-Good

Status, Slot B

(MAINB outputs are
above their V

UVTH

thresholds)

D[5]

Reserved

Always Read As Zero

D[4]

Reserved

Always Read As Zero

D[3]

Reserved

Always Read As Zero

D[2]

Reserved

Always Read As Zero

MAINB

MAIN Enable Control,

0 = OFF, 1 = ON

Slot B

VAUXB

VAUX Enable Control,

0 = OFF, 1 = ON

Slot B

Power-Up Default Value:

0000 0000

= 00

Command Byte (R/W):

0000 0011

= 03

The power-up default value is 00h. Slot B is disabled upon
power-up, i.e., all supply outputs are off.

Detailed Register Descriptions below:

Conversion Result Register (RESULT), 8-Bits Read Only

D[7]

D[6]

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

read-only read-only read-only read-only read-only read-only read-only read-only

Voltage or Current Data from ADC

Bit

Function

Operation

D[7:0]

Measured data from ADC

Read Only

Power-Up Default Value:

Undefined following POR

Read Command Byte:

0000 0000

= 00

(ADC Control Register (ADCNTRL), 8-Bits Read/Write

D[7]

D[6]

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

read-only read-only read-only read-write read-write read-write read-write read-write

BUSY

Reserved Reserved

SEL

PAR

Supply Select

SUP[2:0]

Bit(s)

Function

Operation

BUSY

ADC Status

0 = ADC Quiescent
1 = ADC Busy

D[6]

Reserved

Always Read As Zero

D[5]

Reserved

Always Read As Zero

SEL

A/D Slot Select

Specifies Channel for
A/D Conversion
0 = Slot A, 1 = Slot B

PAR

Parameter Control Bit for

1 = Voltage

ADC Conversion

0 = Current

SUP[2:0]

Supply Select for

000 = No Conversion

ADC Conversion

001 = 3.3V Suppy
010 = 5.0V Supply
011 = +12V Supply
100 = 12V Supply
101 = VAUX Supply

Power-Up Default Value:

0000 0000

= 00

Command Byte (R/W):

0000 0001

= 01

To operate the ADC the ADCNTRL register must first be
initialized by selecting a slot, specifying whether voltage or
current is to be measured and then specifying the specific
supply that is to be monitored. The software must then
wait 100ms, or poll the BUSY bit until it is zero. The
RESULT register will then contain the valid result of the
conversion.

MIC2590B

Micrel

MIC2590B

August 2002

Status Register, Slot A (STATA), 8-Bits Read Only

D[7]

D[6]

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

read-only read-only read-only read-write read-write read-write read-write read-write

FAULTA MAINA

VAUXA VAUXAF 12MVAF 12VAF

5VAF

3VAF

Bit(s)

Function

Operation

FAULTA

FAULT Pin Status,

Notes 1 & 2

Slot A

MAINA

MAIN Enable Status,

Represents actual state

Slot A

(on/off) of the four main
power outputs for Slot A.
(+12V, +5V, +3.3V and 12V)
1 = MAIN Power On
0 = MAIN Power Off

VAUXA

VAUX Enable Status

Represents actual state

Slot A

(on/off) of the auxiliary
power outputs for Slot A.
1 = AUX Power On
0 = AUX Power Off

VAUXFA

Overcurrent Fault

1 = Fault; 0 = No Fault

VAUX Supply

12MVFA

Overcurrent Fault

1 = Fault; 0 = No Fault

12V Supply

12VFA

Overcurrent Fault

1 = Fault; 0 = No Fault

+12V Supply

5VFA

Overcurrent Fault

1 = Fault; 0 = No Fault

5V Supply

3VFA

Overcurrent Fault

1 = Fault; 0 = No Fault

3.3V Supply

Power-Up Default Value:

0000 0000

= 00

Read Command Byte (R/W):

0000 0100

= 04

The power-up default value is 00

. The slot is disabled

upon power-up, i.e., all supply outputs are off. In response
to an overcurrent fault condition, writing a logical 1 back
into the active (or set) bit position will clear the bit and de-
assert /INT. The status of the /FAULTA pin is not affected
by reading the Status Register.

Status Register, Slot B (STATB), 8-Bits Read Only

D[7]

D[6]

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

read-only read-only read-only read-write read-write read-write read-write read-write

FAULTA MAINA

VAUXA VAUXAF 12MVAF 12VAF

5VAF

3VAF

Bit(s)

Function

Operation

FAULTB

FAULT Pin Status,

Notes 1 & 2

Slot B

MAINB

MAIN Enable Status,

Represents actual state

Slot B

(on/off) of the four main
power outputs for Slot B.
(+12V, +5V, +3.3V and 12V)
1 = MAIN Power On
0 = MAIN Power Off

VAUXB

VAUX Enable Status

Represents actual state

Slot B

(on/off) of the auxiliary
power outputs for Slot B.
1 = AUX Power On
0 = AUX Power Off

VAUXFB

Overcurrent Fault

1 = Fault; 0 = No Fault

VAUX Supply

12MVFB

Overcurrent Fault

1 = Fault; 0 = No Fault

12V Supply

12VFB

Overcurrent Fault

1 = Fault; 0 = No Fault

+12V Supply

5VFB

Overcurrent Fault

1 = Fault; 0 = No Fault

5V Supply

3VFB

Overcurrent Fault

1 = Fault; 0 = No Fault

3.3V Supply

Power-Up Default Value:

0000 0000

= 00

Read Command Byte (R/W):

0000 0101

= 05

The power-up default value is 00

. The slot is disabled

upon power-up, i.e., all supply outputs are off. In response
to an overcurrent fault condition, writing a logical 1 back
into the active (or set) bit position will clear the bit and de-
assert /INT. The status of the /FAULTB pin is not affected
by reading the Status Register.

Note 1.

1 = /FAULT[A/B] pin asserted, indicating a fault condition (/FAULT is LOW).

0 = /FAULT[A/B] pin is de-asserted (/FAULT is HIGH).

If FAULT[A/B] has been set by an overcurrent condition on one (or more) of the main outputs, the corresponding ON[A/B] must go LOW to
reset FAULT. If FAULT[A/B] has been set by an overcurrent on a VAUX output, the corresponding AUXEN[A/B] must go LOW to reset FAULT.
If an overcurrent has occurred on both a main output and VAUX output of a slot, both ON[A/B] and AUXEN[A/B] of the corresponding slot
must go LOW to reset FAULT.

Note 2.

The FAULT bits, and the /FAULT pins, are not active when the MIC2590B power paths are controlled by the System Management Interface
(SMBus). When using SMI power path control for a slot, the AUXEN and ON pins for that slot must be tied to ground.

August 2002

MIC2590B

Micrel

Common Status Register, (STAT), 8-Bits Read/Write

D[7]

D[6]

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

read-only read-only read-only read-only read-write read-write read-write read-only

Reserved Reserved

GPIB

GPIA

INTMSK

UV_INT

OT_INT Reserved

Bit(s)

Function

Operation

D[7]

Reserved

Always read as zero

D[6]

Reserved

Always read as zero

GPIB

General Purpose Input, State of GPIB pin
Slot B

GPIA

General Purpose Input, State of GPIA pin
Slot A

INTMSK

Interrupt Mask

0 = /INT generation is
enabled; 1 = /INT
generation is disabled.
The MIC2590B does not
participate in the SMBus
Alert Response Address
(ARA) Protocol.

UV_INT

Undervoltage

Set whenever a circuit

Interrupt

breaker fault condition
occurs as a result of an
undervoltage lockout
condition on one of the
main supply inputs. This
bit is only set if a UVLO
condition occurs while one
or both of the ON[A/B] pins
are asserted or the
MAIN[A/B] enable control
bits are set.

OT_INT

Overtemperature

Set whenever a circuit

Interrupt

breaker fault occurs as a
result of an over-
temperature condition
exceeding 160

°C shutting

both channels off.

D[0]

Reserved

Read Undefined

Power-Up Default Value:

0000 0000

= 00

Command Byte (R/W):

0000 0110

= 06

To reset the OT_INT and UV_INT fault bits a logical 1
must be written back to these bits.

MIC2590B

Micrel

MIC2590B

August 2002

Application Information

Current Sensing

For the three power supplies switched with internal MOSFETs
(+12V, 12V, and V

AUX

), the MIC2590B provides all neces-

sary current sensing functions to protect the IC, the load, and
the power supply. For the remaining four supplies which the
part is designed to control, the high currents at which these
supplies typically operate makes sensing the current inside
the MIC2590B impractical. Therefore, each of these supplies
(3VA, 5VA, 3VB, and 5VB) requires an external current
sensing resistor. The V

connection to the IC from each

supply (e.g., 5VINA) is connected to the positive terminal of
the slot's current sense amplifier, and the corresponding
SENSE input (in this case, 5VSENSEA) is connected to the
negative terminal of the current sense amplifier.

Sense Resistor Selection

The MIC2590B uses low-value sense resistors to measure
the current flowing through the MOSFET switches to the
loads. These sense resistors are nominally valued at
50m

LOAD(CONT)

. To accommodate worst-case tolerances

for both the sense resistor, (allow

±3% over time and tem-

perature for a resistor with

±1% initial tolerance) and still

supply the maximum required steady-state load current, a
slightly more detailed calculation must be used.

The current limit threshold voltage (the "trip point") for the
MIC2590B may be as low as 35mV, which would equate to a
sense resistor value of 35m

LOAD(CONT)

. Carrying the

numbers through for the case where the value of the sense
resistor is 3% high, this yields:

35m

1.03 I

34m

SENSE

LOAD(CONT)

(

)

(

)

Once the value of R

SENSE

has been chosen in this manner,

it is good practice to check the maximum I

LOAD(CONT)

which

the circuit may let through in the case of tolerance build-up in
the opposite direction. Here, the worst-case maximum is
found using a 65mV trip voltage and a sense resistor which
is 3% low in value. The resulting current is:

65mV

(0.97)(R

)

67mV

LOAD(CONT, MAX)

SENSE(NOM)

As an example, if an output must carry a continuous 4.4A
without nuisance trips occurring, R

SENSE

for that output

should be 34m

/4.4A = 7.73m. The nearest standard value

is 7.5m

, so a 7.5m ±1% resistor would be a good choice.

At the other set of tolerance extremes,
I

LOAD(CONT, MAX)

for the output in question is then simply

67mV/7.5m

= 8.93A. Knowing this final datum, we can

determine the necessary wattage of the sense resistor, using
P = I

R. Here I will be I

LOAD(CONT, MAX)

, and R will be

(0.97)(R

SENSE(NOM)

). These numbers yield the following:

MAX

= (8.93A)

(7.28m

) = 0.581W

A 1.0W sense resistor would work well in this application.

Kelvin Sensing

Because of the low values of the sense resistors, special care
must be used to accurately measure the voltage drop across
them. Specifically, the voltage across each R

SENSE

must

employ Kelvin sensing. This is simply a means of making sure
that any voltage drops in the power traces connecting to the
resistors are not picked up in addition to the voltages across
the sense resistors themselves. If accuracy must be paid for,
it's worth keeping.

Figure 9 illustrates how Kelvin sensing is performed. As can
be seen, all the high current in the circuit (let us say, from
+5VINA through R

SENSE

and then to the drain of the +5VA

output MOSFET) flows directly through the power PCB
traces and R

SENSE

. The voltage drop resulting across R

SENSE

is sampled in such a way that the high currents through the
power traces will not introduce any extraneous IR drops.

SENSE

Power Trace
From V

Power Trace

To MOSFET Drain

Signal Trace

to MIC2590B V

Signal Trace
to MIC2590B V

SENSE

Figure 9. Kelvin Sensing Connections for R

SENSE

MOSFET Selection

Selecting the proper MOSFET for use as current pass and
switching element for each of the 3V and 5V slots of the
MIC2590B involves four straightforward tasks:

Choice of a MOSFET which meets the minimum
voltage requirements.

Determination of maximum permissible on-state
resistance [R

D-S(ON)

Selection of a device to handle the maximum continu-
ous current (steady-state thermal issues).

Verification of the selected part's ability to withstand
current peaks (transient thermal issues).

MOSFET Voltage Requirements

The first voltage requirement for each MOSFET is easily
stated: the drain-source breakdown voltage of the MOSFET
must be greater than V

IN(MAX)

for the slot in question. For

instance, the 5V input may reasonably be expected to see
high-frequency transients as high as 5.5V. Therefore, the
drain-source breakdown voltage of the MOSFET must be at
least 6V.

The second breakdown voltage criteria which must be met is
a bit subtler than simple drain-source breakdown voltage, but
is not hard to meet. Low-voltage MOSFETs generally have
low breakdown voltage ratings from gate to source as well. In
MIC2590B applications, the gates of the external MOSFETs
are driven from the +12V input to the IC. That supply may well
be at 12V + (5% x 12V) = 12.6V. At the same time, if the output
of the MOSFET (its source) is suddenly shorted to ground,
the gate-source voltage will go to (12.6V 0V) = 12.6V. This

August 2002

MIC2590B

Micrel

means that the external MOSFETs must be chosen to have
a gate-source breakdown voltage in excess of 13V; after 12V
absolute maximum the next commonly available voltage
class has a permissible gate-source voltage of 20V maxi-
mum. This is a very suitable class of device. At the present
time, most power MOSFETs with a 20V gate-source voltage
rating have a 30V drain-source breakdown rating or higher.
As a general tip, look to surface mount devices with a drain-
source rating of 30V as a starting point.

MOSFET Maximum On-State Resistance

The MOSFETs in the +3.3V and +5V MAIN power paths will
have a finite voltage drop, which must be taken into account
during component selection. A suitable MOSFET's data
sheet will almost always give a value of on resistance for the
MOSFET at a gate-source voltage of 4.5V, and another value
at a gate-source voltage of 10V. As a first approximation, add
the two values together and divide by two to get the on
resistance of the device with 7 Volts of enhancement (keep
this in mind; we'll use it in the following Thermal Issues
sections). The resulting value is conservative, but close
enough. Call this value R

. Since a heavily enhanced

MOSFET acts as an ohmic (resistive) device, almost all that
is required to calculate the voltage drop across the MOSFET
is to multiply the maximum current times the MOSFET's R

The one addendum to this is that MOSFETs have a slight
increase in R

with increasing die temperature. A good

approximation for this value is 0.5% increase in R

per

°C

rise in junction temperature above the point at which R

was

initially specified by the manufacturer. For instance, the
Vishay (Siliconix) Si4430DY, which is a commonly used part
in this type of application, has a specified R

DS(ON)

of 8.0m

max. at V

G-S

= 4.5V, and R

DS(ON)

of 4.7m

max. at V

G-S

10V. Then R

is calculated as:

4.7m

8.0m

6.35m

(

)

at 25

°C T

. If the actual junction temperature is estimated to

be 110

°C, a reasonable approximation of R

for the

Si4430DY at temperature is:

6.35m

110 25

0.5%

6.35m

0.5%

9.05m

(

)

( )

Note that this is not a closed-form equation; if more precision
were required, several iterations of the calculation might be
necessary. This is demonstrated in the section "MOSFET
Transient Thermal Issues."

For the given case, if Si4430DY is operated at an I

DRAIN

7.6A, the voltage drop across the part will be approximately
(7.6A)(9.05m

) = 69mV.

MOSFET Steady-State Thermal Issues

The selection of a MOSFET to meet the maximum continuous
current is a fairly straightforward exercise. First, arm yourself
with the following data:

· The value of I

LOAD(CONT, MAX)

for the output in

question (see Sense Resistor Selection).

· The manufacturer's data sheet for the candidate

MOSFET.

· The maximum ambient temperature in which the

device will be required to operate.

· Any knowledge you can get about the heat

sinking available to the device (e.g., Can heat be
dissipated into the ground plane or power plane,
if using a surface mount part? Is any airflow
available?).

Now it gets easy: steady-state power dissipation is found by
calculating I

R. As noted in "MOSFET Maximum On-State

Resistance," above, the one further concern is the MOSFET's
increase in R

with increasing die temperature. Again, use

the Si4430DY MOSFET as an example, and assume that the
actual junction temperature ends up at 110

°C. Then R

temperature is again approximately 9.05m

. Again, allow a

maximum I

DRAIN

of 7.6A:

Power dissipation I

7.6A

9.05m

0.523W

DRAIN

(

)

The next step is to make sure that the heat sinking available
to the MOSFET is capable of dissipating at least as much
power (rated in

°C/W) as that with which the MOSFET's

performance was specified by the manufacturer. Formally
put, the steady-state electrical model of power dissipated at
the MOSFET junction is analogous to a current source, and
anything in the path of that power being dissipated as heat
into the environment is analogous to a resistor. It's therefore
necessary to verify that the thermal resistance from the
junction to the ambient is equal to or lower than that value of
thermal resistance (often referred to as R

(JA)

) for which the

operation of the part is guaranteed. As an applications issue,
surface mount MOSFETs are often less than ideally specified
in this regard--it's become common practice simply to state
that the thermal data for the part is specified under the
conditions "Surface mounted on FR-4 board, t

10seconds,"

or something equally mystifying. So here are a few practical
tips:

1. The heat from a surface mount device such as

an SO-8 MOSFET flows almost entirely out of
the drain leads. If the drain leads can be sol-
dered down to one square inch or more of
copper the copper will act as the heat sink for
the part. This copper must be on the same layer
of the board as the MOSFET drain.

2. Since the rating for the part is given as "for 10

seconds," derate the maximum junction tem-
perature by 35

°C. This is the standard good

practice derating of 25

°C, plus another 10°C to

allow for the time element of the specification.

3. Airflow, if available, works wonders. This is not

the place for a dissertation on how to perform
airflow calculations, but even a few LFM (linear
feet per minute) of air will cool a MOSFET down

MIC2590B

Micrel

MIC2590B

August 2002

In terms related directly to the specification and use of power
MOSFETs, this is known as "transient thermal impedance."
Almost all power MOSFET data sheets give a Transient
Thermal Impedance Curve, which is a handy tool for making
sure that you can safely get by with a less expensive MOSFET
than you thought you might need. For example, take the case
where t

FLT

for the 5V supply has been set to 50ms, I

LOAD(CONT,

MAX)

is 5.0A, the slow-trip threshold is 50mV nominal, and the

fast-trip threshold is 100mV. If the output is connected to a
0.60

load, the output current from the MOSFET for the slot

in question will be regulated to 5.0A for 50ms before the part's
circuit breaker trips. During that time, the dissipation in the
MOSFET is given by:

P = E

× I E

MOSFET

= [5V5A(0.6

)] = 2V

MOSFET

= (2V

× 5A) = 10W for 50ms

Wow! Looks like we need a really hefty MOSFET to withstand
just this unlikely--but plausible enough to protect against--
fault condition. Or do we? This is where the transient thermal
impedance curves become very useful. Figure 10 shows
those curves for the Vishay (Siliconix) Si4430DY, a com-
monly used SO-8 power MOSFET.

600

100

0.1

0.01

0.2

0.1

0.05

0.02

Single Pulse

Duty Cycle = 0.5

Normalized Thermal Transient Impedance, Junction-to-Ambient

Square Wave Pulse Duration (sec)

Nor

maliz

ed Ef

f
ectiv

r
ansient

Ther

mal Impedance

1. Duty Cycle, D =

2. Per Unit Base = R

thJA

= 67

°C/W

3. T

= P

thJA

(t)

Notes:

4. Surface Mounted

Figure 10. Si4430DY MOSFET Transient Thermal Impedance Curve

dramatically. If you can position the MOSFET(s)
in question near the inlet of a power supply's
fan, or the outlet of a processor's cooling fan,
that's always a good free ride.

4. Although it seems a rather unsatisfactory

statement, the best test of a surface-mount
MOSFET for an application (assuming the
above tips show it to be a likely fit) is an empiri-
cal one. The ideal evaluation is in the actual
layout of the expected final circuit, at full operat-
ing current. The use of a thermocouple on the
drain leads, or in infrared pyrometer on the
package, will then give a reasonable idea of the
device's junction temperature.

MOSFET Transient Thermal Issues

Having chosen a MOSFET that will withstand the imposed
voltage stresses, and be able to handle the worst-case continu-
ous I

R power dissipation which it will see, it remains only to

verify the MOSFET's ability to handle short-term overload
power dissipation without overheating. Here, nature and phys-
ics work in our favor: a MOSFET can handle a much higher
pulsed power without damage than its continuous dissipation
ratings would imply. The reason for this is that, like everything
else, semiconductor devices (silicon die, lead frames, etc.)
have thermal inertia. This is easily understood by all of us who
have stood waiting for a pot of water to boil.

Using this graph is not nearly as daunting as it may at first
appear. Taking the simplest case first, we'll assume that once
a fault event such as the one in question occurs, it will be a
long time, 10 minutes or more, before the fault is isolated and
the slot is reset. In such a case, we can approximate this as
a "single pulse" event, that is to say, there's no significant duty
cycle. Then, reading up from the X-axis at the point where
"Square Wave Pulse Duration" is equal to 0.1sec (=100ms),
we see that the effective thermal impedance of this MOSFET

to a single pulse event of this duration is only 6% of its
continuous R

(JA)

This particular part is specified as having an R

(JA)

°C/W for intervals of 10 seconds or less. So, some further

math, just to get things ready for the finale:

Assume T

= 55

°C maximum, 1 square inch of copper at the

drain leads, no airflow.

August 2002

MIC2590B

Micrel

Assume the MOSFET has been carrying just about 5A for
some time.

Then the starting (steady-state)T

is:

55°C + (7.3m)(5A)

(30

°C/W)

60.5°C

Iterate the calculation once to see if this value is within a few
percent of the expected final value. For this iteration we will
start with T

equal to the already calculated value of 67

°C:

at T

= 60.5

°C = [1+(60.5°C25°)(0.5%/°C)]×6.35m

at T

= 60.5

°C 7.48m

55°C + (7.3m)(5A)

(30

°C/W)

60.6°C

At this point, the simplest thing to do is to approximate T

°C, which will be close enough for all practical purposes.

Finally, add (10W)(67

°C/W)(0.03) = 21°C to the steady-state T

to get T

J(TRANSIENT MAX)

= 82

°C. The Si4430DY can easily

handle this value of T

J(MAX)

A second illustration of the use of the transient thermal imped-
ance curves: assume that the system will attempt multiple
retries on a slot showing a fault, with a one second interval
between retry attempts. This frequency of restarts will signifi-
cantly increase the dissipation in the Si4430DY MOSFET. Will

the MOSFET be able to handle the increased dissipation? We
get the following:

The same part is operating into a persistent fault, so it is cycling
in a square-wave fashion (no steady-state load) with a duty
cycle of (50msec/second = 0.05).

On the Transient Thermal Impedance Curves, read up from the
X-axis to the line showing Duty Cycle equaling 0.05. The
effective R

(JA)

= (0.7 x 67

°C/W) = 4.7°C/W.

Calculating the peak junction temperature:

J(PEAK MAX)

= [(10W)(4.7

°C/W) + 55°C] = 102°C

And finally, checking the RMS power dissipation just to be
complete:

7.47m

0.05

0.042W

RMS

( ) (

)

which will result in a negligible temperature rise.

The Si4430DY is electrically and thermally suitable for this
application.

MOSFET and Sense Resistor Selection Guide

Listed below, by Manufacturer and Type Number, are some
of the more popular MOSFET and resistor types used in PCI
hot plug applications. Although far from comprehensive, this
information will constitute a good starting point for most
designs.

Power Supply Decoupling

In general, prudent system design requires that power sup-
plies used for logic functions should have less than 100mV of
noise at frequencies of 100kHz and above. This is especially
true given the speeds of moden logic families, such as the 1.2
micron CMOS used in the MIC2590B. In particular, the 12V
supply should have less than 100mV of peak-to-peak noise
at frequencies of 1MHz or higher. This is because the 12V
supply is the most negative potential applied to the IC, and is
therefore connected to the device's substrate. All of the
subcircuits integrated onto the silicon chip are hence sub-
jected by capacitives coupling to any HF noise on the 12V
supply. While individual capacitances are quite low, the
amount of injected energy required to cause a "glitch" can

also be quite low at the internal nodes of high speed logic
circuits.

Less obviously, but equally important, is the fact that the
internal charge pump for the 3.3VAUX supplies is somewhat
susceptible to noise on the +12V input when that input is at or
near zero volts. The +12V supply should not carry HF noise
in excess of 200mV peak-to-peak with respect to chip gound
when it is in the "off" state.

If either the 12V input, the +12V input, of both supplies do
carry significant HF noise (as can happen when they are
locally derived by a switching converter), the solution is both
small and inexpensive. An LC filter made of a ferrite bead
between the noisy power supply input and the MIC2590B,

MOSFET Vendors

Key MOSFET Type(s)

Web Address

Vishay (Siliconix)

Si4430DY ("LittleFoot" Series)

www.siliconix.com

Si4420DY ("LittleFoot" Series)

International Rectifier

IRF7413A (SO-8 package part)

www.irf.com

Si4420DY (second source to Vishay)

Fairchild Semiconductor

FDS6644 (SO-8 package part)

www.fairchildsemi.com

FDS6670A (SO-8 package part)
FDS6688 (SO-8 package part)

Resistor Vendors

Sense Resistors

Web Address

Vishay (Dale)

"WSL" Series

www.vishay.com/docs/wsl_30100.pdf

IRC

"OARS" Series

irctt.com/pdf_files/OARS.pdf

"LR" Series

irctt.com/pdf_files/LRC.pdf

(second source to "WSL")

MIC2590B

Micrel

MIC2590B

August 2002

followed by a "composite capacitor" from the affected
MIC2590B input pin to ground will suffice for almost any
situation. A good composite capacitor for this purpose is the
parallel combination of a 47

µF tantalum bulk decoupling

capacitor, and one each 1

µF and 0.01µF ceramic capacitors

for high-frequency bypass. A suggested ferrite bead for such
use is Fair-Rite Products Corporation part number
2743019447 (this is a surface-mountable part). Similar parts
from other vendors will also work well, or a 0.27

µH, air-core

coil can be used.

Noisy V

To MIC2590

SMT Ferrite Bead

Fair-Rite Products
Type 2743019447

µF

Tanalum

µF

Ceramic

10nF
Ceramic

Figure 11. Filter Circuit for Noisy Supplies

(+3.3V and/or 12V)

It is theoretically possible that high-amplitude, HF noise
reflected back into one or both of the MIC2590B's 12V
outputs could interfere with proper device operation, al-
though such noisy loads are unlikely to occur in the real world.
If this becomes an application-specific concern, a pair of
filters similar to that in Figure 11 will provide the required HF
bypassing. The capacitors would be connected to the
MIC2590B's 12V output pins, and the ferrite beads would be
placed between the 12V output pins and the loads.

12V Input Clamp Diode

The 12V input to the MIC2590B is the most negative
potential on the part, and is therefore connected to the chip's
substrate (as described in "Power Supply Decoupling," above).
Although no particular sequencing of the 12V supply rela-
tive to the other MIC2590B supplies is required for normal
operation, this substrate connection does mean that the
12V input must never exceed the voltage on the GROUND
pin of the IC by more than 0.3 volts. In some systems, even
though the 12V supply will discharge towards ground poten-
tial when it is turned OFF, the possibility exists that power
supply output ringing or L(di/dt) effects in the wiring and on the
PCB itself will cause brief transient voltages in excess of
+0.3V to appear at the 12V input. The simplest way to deal

with such a transient is to clamp it with a Schottky diode. The
diode's anode should be physically placed directly at the
12V input to the MIC2590B, and its cathode should have as
short a path as possible back to the part's ground. A good
SMT part for this application is ON Semiconductor's type
MBRS140T3 (1A, 40V). Although the 40V rating of this part
is a bit gratuitous, it is an inexpensive industry-standard part
with many second sources. Unless it is absolutely known in
advance that the voltage on the "12V" inputs will never
exceed 0.0V at the IC's 12V input pins, it's wise to at least
leave a position for this diode in the board layout and then
remove it later. This final determination should be made by
observations of the voltage at the 12V input with a fast
storage oscilloscope, under turn-on and turn-off conditions.

Gate Resistor Guidelines

The MIC2590B controls four external power MOSFETs,
which handle the high currents for each of the two 3.3V and
5V outputs. A capacitor (C

GATE

) is connected in the applica-

tion circuit from each GATE pin of the MIC2590B to ground.
Each C

GATE

controls the ramp-up rate of its respective power

output (e.g., 5VOUTB). These capacitors, which are typically
in the 10nF range, cause the GATE outputs of the MIC2590B
to have very low AC impedances to ground at any significant
frequency. It is therefore necessary to place a modest value
of gate damping resistance (R

GATE

) between each C

GATE

and the gate of its associated MOSFET. These resistances
prevent high-frequency MOSFET source-follower oscilla-
tions from occurring. The exact value of the resistors used is
not critical; 47

is usually a good choice. Each R

GATE

should

be physically located directly adjacent to the MOSFET gate
lead to which it connects.

MIC2590B

GATE

External
MOSFET

Figure 12. Proper Connection

of C

GATE

and R

GATE

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