SY100S304
QUINT
AND/NAND GATE
s
Max. propagation delay of 1050ps
s
I
EE
min. of 60mA
s
Extended supply voltage option:
V
EE
= 4.2V to 5.5V
s
Voltage and temperature compensation for improved
noise immunity
s
Internal 75K
input pull-down resistors
s
40% faster than Fairchild 300K at lower power
s
Function and pinout compatible with Fairchild F100K
s
Available in 24-pin CERPACK and 28-pin PLCC
packages
FEATURES
DESCRIPTION
The SY100S304 is an ultra-fast quint AND/NAND gate
designed for use in high-performance ECL systems. This
device also features a Function (F) output which is the wire-
NOR of the AND gate outputs. The inputs on the device
have 75K
pull-down resistors.
PIN CONFIGURATIONS
BLOCK DIAGRAM
O
a
O
a
D
1a
D
2a
O
b
O
b
D
1b
D
2b
O
c
O
c
D
1c
D
2c
O
d
O
d
D
1d
D
2d
O
e
O
e
D
1e
D
2e
F
O
c
O
c
V
CCA
V
CC
F
V
CC
D
1b
V
EE
D
1c
D
2b
D
2c
V
EES
4
3
2
1
28
27
12
13
14
15
16
17
19
11
20
10
21
9
22
8
23
7
24
6
Top View
PLCC
J28-1
O
d
D
2d
26
18
25
5
D
2a
D
1a
O
a
V
EES
O
a
O
b
O
b
D
2e
V
EES
D
1e
O
e
D
1d
O
e
O
d
D
2d
D
2c
D
1c
V
EE
D
2b
D
1b
D
2a
D
1a
O
a
O
a
O
b
O
b
D
1d
D
2e
O
e
D
1e
O
d
O
e
18
17
16
15
14
13
1
2
3
4
5
6
7
24
8
23
9
22
10
21
11
20
12
19
Top View
Flatpack
F24-1
V
CC
V
CCA
F
O
c
O
d
O
c
Rev.: G
Amendment: /0
Issue Date:
July, 1999
Pin
Function
D
na
D
ne
Data Inputs (n-1...5)
E
Enable Input
O
a
O
e
Data Outputs
O
a
O
e
Complementary Data Outputs
V
EES
V
EE
Substrate
V
CCA
V
CCO
for ECL Outputs
PIN NAMES
1
2
SY100S304
Micrel
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Condition
t
PLH
Propagation Delay
300
1150
300
1150
300
1150
ps
t
PHL
D
na
-- D
ne
to O, O
t
PLH
Propagation Delay
600
1650
600
1650
600
1650
ps
t
PHL
Data to F
t
TLH
Transition Time
300
900
300
900
300
900
ps
t
THL
20% to 80%, 80% to 20%
DC ELECTRICAL CHARACTERISTICS
V
EE
= 4.2V to 5.5V unless otherwise specified, V
CC
= V
CCA
= GND
AC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Min.
Typ.
Max.
Unit
Condition
I
IH
Input HIGH Current
A
V
IN
= V
IH
(Max.)
D
2a
-- D
2e
--
--
250
D
1a
-- D
1e
--
--
250
I
EE
Power Supply Current
60
40
30
mA
Inputs Open
CERPACK
V
EE
= 4.2V to 5.5V unless otherwise specified, V
CC
= V
CCA
= GND
PLCC
V
EE
= 4.2V to 5.5V unless otherwise specified, V
CC
= V
CCA
= GND
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Condition
t
PLH
Propagation Delay
300
1050
300
1050
300
1050
ps
t
PHL
D
na
-- D
ne
to O, O
t
PLH
Propagation Delay
600
1550
600
1550
600
1550
ps
t
PHL
Data to F
t
TLH
Transition Time
300
900
300
900
300
900
ps
t
THL
20% to 80%, 80% to 20%
3
SY100S304
Micrel
Ordering
Package
Operating
Code
Type
Range
SY100S304FC
F24-1
Commercial
SY100S304JC
J28-1
Commercial
SY100S304JCTR
J28-1
Commercial
TIMING DIAGRAM
Propagation Delay and Transition Times
PRODUCT ORDERING CODE
20%
80%
OUTPUT
INPUT
50%
t
PLH
t
PHL
50%
20%
80%
50%
t
PHL
t
PLH
t
TLH
t
THL
TRUE
COMPLEMENT
0.7
0.1 ns
0.7
0.1 ns
0.95V
1.69V
NOTE:
V
EE
= 4.2V to 5.5V unless otherwise specified, V
CC
= V
CCA
= GND
5
SY100S304
Micrel
28 LEAD PLCC (J28-1)
Rev. 03
MICREL-SYNERGY
3250 SCOTT BOULEVARD
SANTA CLARA
CA 95054
USA
TEL
+ 1 (408) 980-9191
FAX
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
2000 Micrel Incorporated
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