s
Max. propagation delay of 700ps
s
I
EE
min. of 55mA
s
Extended supply voltage option:
V
EE
= 4.2V to 5.5V
s
Voltage and temperature compensation for
improved noise immunity
s
Internal 75K
input pull-down resistors
s
70% faster than Fairchild 300K at lower power
s
Function and pinout compatible with Fairchild F100K
s
Available in 24-pin CERPACK and 28-pin PLCC
packages
FEATURES
DESCRIPTION
The SY100S322 is an ultra-fast buffer designed for use
in high-performance ECL systems. The device provides
nine non-inverting buffers with single-ended outputs. The
inputs on the device have 75K
pull-down resistors.
SY100S322
9-BIT BUFFER
BLOCK DIAGRAM
PIN CONFIGURATIONS
D
1
O
2
O
1
D
2
D
3
O
4
O
3
D
4
D
5
O
6
O
5
D
6
D
7
O
8
O
7
D
8
D
9
O
9
D
9
D
8
V
CC
A
V
EE
D
7
D
6
D
5
D
4
V
CCA
O
4
O
6
O
5
D
1
D
3
O
3
D
2
O
2
V
CCA
18
17
16
15
14
13
1
2
3
4
5
6
7
24
8
23
9
22
10
21
11
20
12
19
Top View
Flatpack
F24-1
V
CC
V
CCA
O
9
O
8
O
1
O
7
O
7
O
8
V
CCA
V
CC
O
9
V
CC
D
6
V
EE
V
CCA
D
7
D
8
V
EES
4
3
2
1
28
27
12
13
14
15
16
17
19
11
20
10
21
9
22
8
23
7
24
6
Top View
PLCC
J28-1
O
1
D
9
26
18
25
5
D
5
D
4
V
CC
A
V
EES
O
4
O
5
O
6
D
3
V
EES
D
2
V
CCA
D
1
O
3
O
2
Rev.: G
Amendment: /0
Issue Date:
July, 1999
Pin
Function
D
1
D
9
Data Inputs
O
1
O
9
Data Outputs
V
EES
V
EE
Substrate
V
CCA
V
CCO
for ECL Outputs
PIN NAMES
1
2
SY100S322
Micrel
LOGIC EQUATION
O
n
= D
n
, n = 1 to 9
DC ELECTRICAL CHARACTERISTICS
V
EE
= 4.2V to 5.5V unless otherwise specified, V
CC
= V
CCA
= GND
Symbol
Parameter
Min.
Typ.
Max.
Unit
Condition
I
IH
Input HIGH Current
--
--
200
A
V
IN
= V
IH
(Max.)
I
EE
Power Supply Current
55
41
25
mA
Inputs Open
AC ELECTRICAL CHARACTERISTICS
CERPACK
V
EE
= 4.2V to 5.5V unless otherwise specified, V
CC
= V
CCA
= GND
PLCC
V
EE
= 4.2V to 5.5V unless otherwise specified, V
CC
= V
CCA
= GND
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Condition
t
PLH
Propagation Delay
300
700
300
700
300
700
ps
t
PHL
Data to Output
t
TLH
Transition Time
300
900
300
900
300
900
ps
t
THL
20% to 80%, 80% to 20%
T
A
= 0
C
T
A
= +25
C
T
A
= +85
C
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Condition
t
PLH
Propagation Delay
300
800
300
800
300
800
ps
t
PHL
Data to Output
t
TLH
Transition Time
300
900
300
900
300
900
ps
t
THL
20% to 80%, 80% to 20%
3
SY100S322
Micrel
Ordering
Package
Operating
Code
Type
Range
SY100S322FC
F24-1
Commercial
SY100S322JC
J28-1
Commercial
SY100S322JCTR
J28-1
Commercial
TIMING DIAGRAM
Propagation Delay and Transition Times
PRODUCT ORDERING CODE
OUTPUT
INPUT
20%
80%
50%
t
PHL
t
PLH
t
TLH
t
THL
0.7
0.1 ns
0.7
0.1 ns
0.95V
1.69V
20%
80%
50%
NOTE:
V
EE
= 4.2V to 5.5V unless otherwise specified, V
CC
= V
CCA
= GND
5
SY100S322
Micrel
28 LEAD PLCC (J28-1)
Rev. 03
MICREL-SYNERGY
3250 SCOTT BOULEVARD
SANTA CLARA
CA 95054
USA
TEL
+ 1 (408) 980-9191
FAX
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
2000 Micrel Incorporated
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