1
SuperLiteTM
SY55859L
Micrel
DESCRIPTION
s
Pin-for-pin, plug-in compatible to the MAX3840
s
Supply voltage operation: +3.3V
10%
s
Low jitter:
2ps rms random jitter
5ps pk-pk deterministic jitter
s
Power saving output disable feature
s
15ps channel-to-channel skew
s
Fast CML outputs: <100ps t
r
/t
f
s
Available in a small (5mm x 5mm) 32-pin EPAD-MLF
package
FEATURES
3.3V, 2.7Gbps
DUAL 2X2 CROSSPOINT SWITCH
SuperLiteTM
SY55859L
FINAL
APPLICATIONS
s
SONET/SDH optical transport
s
High-speed backplane redundancy
s
Add-drop multiplexers
Rev.: B
Amendment: /0
Issue Date:
March 2003
The SY55859L is a dual CML 2x2 crosspoint switch
optimized for high-speed data and/or clock applications (up
to 2.7Gbps or 2.7GHz) where low jitter and skew are critical.
This device is pin-for-pin, plug-in compatible to the MAX3840.
Each 2x2 of the SY55859L routes any input to any output,
and thus can distribute or multiplex a clock or data stream.
The I/O architecture is fully differential and CML compatible.
Both inputs and outputs are optimized for 50
transmission
lines. The inputs (DA 0-1 and DB 0-1) are internally
terminated with 50
, thus eliminating external termination,
and the outputs (QA0-1 and QB0-1) include 50
source
termination. Furthermore, a power-saving output enable
feature is provided which powers-down unused outputs.
The SY5859L operates from a +3.3V
10% supply, and
is guaranteed over the industrial (40
C to +85
C)
temperature range. It is available in a 32-pin (5mm x 5mm)
MLF package.
For applications that require either lower voltage operation
or a more flexible input interface (for applications such as
ACcoupled LVPECL inputs), consider the SY55858U.
TYPICAL APPLICATIONS CIRCUIT
TYPICAL PERFORMANCE
Laser
Driver
Data
Clock
Limiting
Amplifier
CDR
Limiting
Amplifier
CDR
Data
Clock
SY55859L
Laser
Driver
Micrel Semiconductor
Maxim
SY55859LMI
MAX3840EGJ
CROSS REFERENCE TABLE
TIME (50ps/div.)
Output Swing
(60mV/div
.
)
SuperLite is a trademarks of Micrel, Inc.
Micro
LeadFrame and MLF are trademarks of Amkor Technology, Inc.
2.7Gbps, 2
23
1 PRBS
SuperLiteTM
2
SuperLiteTM
SY55859L
Micrel
PACKAGE/ORDERING INFORMATION
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9 10 11 12 13 14 15 16
32 3130 29 28 27 26 25
32-pin
MLF
ENB1
DB1
/DB1
ENB0
SELB0
DB0
/DB0
SELB1
GND
VCC
QA0
/QA0
VCC
QA1
/QA1
VCC
SELA0
ENA0
DA1
/DA1
ENA1
/DA0
DA0
SELA1
VCC
QB0
/QB0
VCC
GND
/QB1
QB1
VCC
Ordering Information
Package
Operating
Package
Part Number
Type
Range
Marking
SY55859LMI
H32-1
Industrial
SY55859LMI
SY55859LMITR*
H32-1
Industrial
SY55859LMI
*Tape and Reel
Pin Number
Pin Name
Pin Function
1
ENB1
TTL Input. Channel B1 Output Enable. Setting this pin inactive low powers down QB1 and /QB1.
Do not leave floating.
2
DB1
CML Input. Channel B1 true input.
3
/DB1
CML Input. Channel B1 complement input.
4
ENB0
TTL Input. Channel B0 Output Enable. Setting this pin inactive low powers down QB0 and /QB.
Do not leave floating.
5
SELB0
TTL Input. Channel B0 output select. Please refer to Table 2. Do not leave floating.
6
DB0
CML Input. Channel B0 true input.
7
/DB0
CML Input. Channel B0 complement input.
8
SELB1
TTL Input. Channel B1 output select. Please refer to Table 2. Do not leave floating.
9, 24
GND
Supply ground. Most negative supply voltage.
10, 13, 16, 17, 20, 23
VCC
Positive supply.
11
/QB0
CML Output. Channel B0 complement output.
12
QB0
CML Output. Channel B0 true output.
14
/QB1
CML Output. Channel B1 complement output.
15
QB1
CML Output. Channel B1 true output.
18
/QA1
CML Output. Channel A1 complement output.
19
QA1
CML Output. Channel A1 true output.
21
/QA0
CML Output. Channel A0 complement output.
22
QA0
CML Output. Channel A0 true output.
25
SELA1
TTL Input. Channel A1 output select. Please refer to Table 1. Do not leave floating.
26
DA0
CML Input. Channel A0 true input.
27
/DA0
CML Input. Channel A0 complement input.
28
SELA0
TTL Input. Channel A0 output select. Please refer to Table 1. Do not leave floating.
29
ENA0
TTL Input. Channel A0 output enable. Setting this pin inactive low powers down QA0 and /QA0.
Do not leave floating.
30
DA1
CML Input. Channel A1 true input.
31
/DA1
CML Input. Channel A1 complement input.
32
ENA1
TTL Input. Channel A1 output enable. Setting this pin inactive low powers down QA1 and /QA1.
Do not leave floating.
EP
Exposed Pad
Ground. This must be soldered to circuit board ground for proper electrical and thermal
operation.
PIN DESCRIPTION
3
SuperLiteTM
SY55859L
Micrel
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
) .................................. 0.5V to +6.0V
CML Input Voltage (V
IN
) .............................. 0.5V to +6.0V
TTL Control Input Voltage (V
IN
) ........... 0.5V to V
CC
+0.5V
CML Output Voltage (V
OUT
) ......... V
CC
1.0V to V
CC
+0.5V
CML Output Current (I
OUT
) ........................................ 22mA
Lead Temperature (soldering, 10sec.) .................... +300
C
Storage Temperature (T
S
) ....................... 65
C to +150
C
Operating Ratings
(Note 2)
Supply Voltage (V
CC
) .................................. +3.0V to +3.6V
Ambient Temperature (T
A
) ......................... 40
C to +85
C
Junction Temperature (T
J
) ........................................ 160
C
Package Thermal Resistance
MLF
(
JA
)
still-air .............................................................. 28
C/W
500lfpm ............................................................ 20
C/W
MLF
(
JC
) .............................................................. 4
C/W
T
A
= 40
C to +85
C
Symbol
Parameter
Condition
Min
Typ
Max
Units
V
CC
Power Supply Voltage
3.0
3.3
3.6
V
I
CC
Power Supply Current
No Load, Over Supply Voltage;
160
190
mA
All Outputs Enabled
Note 1.
Specification for packaged product only.
DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 3.0V to 3.6V; GND = 0V; T
A
= 40
C to +85
C
(Note 2)
Symbol
Parameter
Condition
Min
Typ
Max
Units
V
OUT
CML Differential Output Swing
R
L
= 50
to V
CC
, Figure 3
640
800
1000
mVp-p
R
OUT
Differential Output Impedance
Figure 2
85
100
115
V
OCM
CML Output Common Mode Voltage
R
L
= 50
to V
CC
, Figure 3
V
CC
0.2
V
V
IS
CML Input Voltage Range
Figure 4
V
CC
0.8
V
CC
+0.4
V
V
DIFF
CML Differential Input Voltage Swing
Figure 5
300
1600
mVp-p
CML Single-ended Input Impedance
Figure 1
42.5
50
57.5
Note 1.
Specification for packaged product only.
Note 2.
The device is guaranteed to meet the DC specifications, shown in the table above, after thermal equilibrium has been established. The device
is tested in a socket such that transverse airflow of
500lfpm is maintained.
V
CC
= 3.0V to 3.6V; GND = 0V; T
A
= 40
C to +85
C
(Note 2)
Symbol
Parameter
Condition
Min
Typ
Max
Units
V
IH
TTL Input HIGH Voltage
2.0
V
V
IL
TTL Input LOW Voltage
0.8
V
I
IH
TTL Input HIGH Current
10
+10
A
I
IL
TTL Input LOW Current
10
+10
A
Note 1.
Specification for packaged product only.
Note 2.
The device is guaranteed to meet the DC specifications, shown in the table above, after thermal equilibrium has been established. The device
is tested in a socket such that transverse airflow of
500lfpm is maintained.
TTL CONTROL ELECTRICAL CHARACTERISTICS
(1)
CML DC ELECTRICAL CHARACTERISTICS
(1)
Note 1.
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is
not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG
conditions for extended periods may affect device reliability.
Note 2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
4
SuperLiteTM
SY55859L
Micrel
V
CC
= 3.0V to 3.6V; GND = 0V; T
A
= 40
C to +85
C
(Note 2)
Symbol
Parameter
Condition
Min
Typ
Max
Units
f
MAX
Maximum NRZ Data Rate
2.7
Gbps
f
MAX
Maximum Clock Rate
2.7
GHz
t
PD
Propagation Delay from
275
ps
Input-to-Output
R
J
Random Jitter
Note 3
2
ps(rms)
D
J
Deterministic Jitter
Note 4
5
20
ps(pk-pk)
t
SKDIFF
CML Output Differential Skew
Any Differential Pair Duty Cycle Distortion
7
25
ps
t
SKEW
CML Output Channel-to-Channel
Note 5, Any Two Outputs
15
40
ps
t
r
,t
f
CML Output Rise/Fall Times
(20% to 80%)
80
135
ps
Note 1.
Specification for packaged product only.
Note 2.
AC characteristics are guaranteed by design and characterization. Tested using environment of Figure 6, 50
equivalent load.
Note 3.
Measured with 100mVp-p noise (f
2MHz) on the power supply.
Note 4.
Deterministic jitter (D
J
) is the arithmetic sum of pattern-dependent jitter and pulse width distortion.
Note 5.
This represents the skew on a QA and QB output with their inputs receiving the same signal.
AC ELECTRICAL CHARACTERISTICS
(1)
5
SuperLiteTM
SY55859L
Micrel
TYPICAL OPERATING CHARACTERISTICS
50
SY55859L
V
CC
1.2mA
50
D
/D
1.2mA
Figure 1. Input Structure
50
50
SY55859L
v
cc
Q
16mA
/Q
Figure 2. Output Structure
V
OUT
Q
/Q
2
0V
V
OCM
Figure 3a. Output Levels
V
OUT
|Q -- /Q|
Figure 3b. Output Levels
D, /D Inputs
Invalid
Valid
Invalid
V
IS
(max)
V
IS
(min)
Figure 4. Input Range
V
DIFF
D
/D
2
Figure 5a. Input Levels
V
DIFF
|D /D|
Figure 5b. Input Levels
SY55859L
100
50
50
Q
/Q
Figure 6. Output Interface
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