1
SY58040U
Micrel
M9999-072904
hbwhelp@micrel.com or (408) 955-1690
Rev.: A
Amendment: /0
Issue Date:
July 2004
DESCRIPTION
s
Provides crosspoint switching between any input
pair to any output pair
s
Guaranteed AC performance over temperature and
voltage:
DC to >5Gbps throughput
<350ps propagation delay
<60ps t
r
/ t
f
times
<25ps skew (output-to-output)
s
Unique, patent-pending, channel-to-channel
isolation design provides superior crosstalk
performance
s
Ultra-low jitter design:
<1ps
rms
random jitter
<10ps
pp
deterministic jitter
<10ps
pp
total jitter (clock)
<0.7ps
rms
crosstalk-induced jitter
s
Unique, patent-pending, 50
input termination
extended CMVR, and VT pin accepts DC- and AC-
coupled differential inputs
s
400mV CML output swing
s
50
source terminated outputs minimize round-trip
reflections
s
Power supply 2.5V
5% or 3.3V
10%
s
40
C to +85
C temperature range
s
Available in 44-pin (7mm
7mm) MLFTM package
FEATURES
ULTRA PRECISION 4
4 CML
SWITCH WITH INTERNAL
I/O TERMINATION
Precision EdgeTM
SY58040U
APPLICATIONS
s Data communication systems
s
All SONET/SDH data/clock applications
s
All Fibre Channel applications
s
All Gigabit Ethernet applications
The SY58040U is a low jitter, low skew, high-speed 4
4
crosspoint switch optimized for precision telecom and
enterprise server/storage distribution applications. The
SY58040U distributes clock frequencies from DC to 4GHz,
and data rates to 5Gbps guaranteed over temperature and
voltage.
The SY58040U differential input includes Micrel's unique,
3-pin input termination architecture that directly interfaces
to any differential signal (AC or DC-coupled) as small as
100mV (200mV
pp
) without any level shifting or termination
resistor networks in the signal path. The outputs are 50
source-terminated CML with extremely fast rise/fall times
guaranteed to be less than 60ps.
The SY58040U features a patent-pending isolation design
that significantly improves on channel-to-channel crosstalk
performance.
The SY58040U operates from a 2.5V
5% or 3.3V
10%
supply and is guaranteed over the full industrial temperature
range of 40
C to +85
C. The SY58040U is part of Micrel's
high-speed, Precision EdgeTM product line.
Data sheets and support documentation can be found on
Micrel's web site at www.micrel.com.
Precision Edge is a trademark of Micrel, Inc.
MLF and
Micro
LeadFrame are trademarks of Amkor Technology, Inc.
Precision EdgeTM
2
SY58040U
Micrel
M9999-072904
hbwhelp@micrel.com or (408) 955-1690
FUNCTIONAL BLOCK DIAGRAM
Q0
/Q0
Q1
/Q1
SIN0 (CMOS/TTL)
SIN1 (CMOS/TTL)
SOUT0 (CMOS/TTL)
IN0
/IN0
VT0
50
50
VREF-AC0
0
1
2
3
IN1
/IN1
VT1
50
50
VREF-AC1
0
1
2
3
Q2
/Q2
IN2
/IN2
VT2
50
50
VREF-AC2
0
1
2
3
Q3
/Q3
IN3
/IN3
VT3
50
50
VREF-AC3
0
1
2
3
Control
Logic
SOUT1 (CMOS/TTL)
CONF (CMOS/TTL)
LOAD (CMOS/TTL)
TRUTH TABLES
Input Select Address Table
SIN1
SIN0
INPUT
0
0
IN0
0
1
IN1
1
0
IN2
1
1
IN3
Output Select Address Table
SOUT1
SOUT0
OUTPUT
0
0
Q0
0
1
Q1
1
0
Q2
1
1
Q3
3
SY58040U
Micrel
M9999-072904
hbwhelp@micrel.com or (408) 955-1690
PACKAGE/ORDERING INFORMATION
Ordering Information
(1)
Package
Operating
Package
Lead
SY58040U
Type
Range
Marking
Finish
SY58040UMI
MLF-44
Industrial
SY58040U
Sn-Pb
SY58040UMITR
(2)
MLF-44
Industrial
SY58040U
Sn-Pb
SY58040UMY
MLF-44
Industrial
SY58040U
Pb-free
with "Y"
designator
SY58040UMYTR
(2)
MLF-44
Industrial
SY58040U
Pb-free
with "Y"
designator
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25
C, DC
electricals only.
2. Tape and Reel.
Pin Number
Pin Name
Pin Function
17, 15,
IN0, /IN0
Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept
10, 8,
IN1, /IN1
AC or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a VT pin
4, 2,
IN2, /IN2
through 50
. Note that these inputs will default to an indeterminate state if left open. Please refer to
41, 39
IN3, /IN3
the "Input Interface Applications" section for more details.
16, 9,
VT0, VT1
Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT
3, 40
VT2, VT3
pins provide a center-tap to a termination network for maximum interface flexibility. See "Input
Interface Applications" section for more details.
14,
VRef_AC0
Reference Voltage: This output biases to V
CC
1.2V. It is used when AC coupling the inputs.
11,
VRef_AC1
Connect VRef-AC output pin to the VT input pin. Bypass each VRef-AC pin with a 0.01
F low ESR
1,
VRef_AC2
capacitor to V
CC
. See "Input Interface Applications" section for more details.
42
VRef_AC3
18
SIN0
These single-ended TTL/CMOS-compatible inputs address the data inputs. Note that these inputs
19
SIN1
are internally connected to a 25k
pull-up resistor and will default to a logic HIGH state if left open.
38
SOUT0
These single-ended TTL/CMOS-compatible inputs address the data outputs. Note that these inputs
37
SOUT1
are internally connected to a 25k
pullup resistor and will default to a logic HIGH state if left open.
5
CONF,
These single-ended TTL/CMOS compatible inputs control the transfer of the addresses to the
7
LOAD
internal multiplexers. See "Address Tables" and "Timing Diagram" sections for more details. Note
that these inputs are internally connected to a 25k
pull-up resistor and will default to a logic HIGH
state if left open.
Configuration Sequence
1. Load: Loads configuration into buffer, while Configuration Buffer holds existing switch configuration.
2. Configuration: Loads new configuration into the Configuration Buffer and updates switch configuration.
Buffer Mode
The SY58040U defaults to buffer mode (IN-to-Q) if the load and configuration control signals are
floating.
23, 24,
Q0, /Q0,
Differential Outputs: These CML output pairs are the outputs of the device. Please refer to the truth
26, 27,
Q1, /Q1,
table below for details. Unused output pairs may be left open. Each output is designed to drive
29, 30
Q2, /Q2,
400mV into 100
across the pair, or 50
to V
CC
.
32, 33
Q3, /Q3,
6, 22, 25,
VCC
Positive power supply. Bypass with 0.1
F//0.01
F low ESR capacitors and place as close to each
28, 31, 34
V
CC
pin.
12, 13, 20, 21,
GND,
Ground. GND and EPad must both be connected to most negative potential of chip ground.
35, 36, 43, 44 Exposed pad
PIN DESCRIPTION
1
2
3
4
5
6
7
8
33
32
31
30
29
28
27
26
12 13 14 15 16 17 18 19
44 43 42 41 40 39 38 37
VREF_AC2
/IN2
VT2
IN2
CONFIG
VCC
LOAD
/IN1
/Q3
Q3
VCC
/Q2
Q2
VCC
/Q1
Q1
VT3
IN3
VREF_AC3
GND
GND
/IN3
SOUT0
SOUT1
VT0
/IN0
VREF-AC0
GND
GND
IN0
SIN0
SIN1
9
10
11
25
24
23
20 21 22
35
VT1
IN1
VREF_AC1
VCC
GND
GND
VCC
/Q0
Q0
36
34
VCC
GND
GND
44-Pin MLFTM (MLF-44)
4
SY58040U
Micrel
M9999-072904
hbwhelp@micrel.com or (408) 955-1690
Absolute Maximum Ratings
(1)
Power Supply Voltage (V
CC
) ...................... 0.5V to +4.0V
Input Voltage (V
IN
) ......................................... 0.5V to V
CC
CML Output Voltage (V
OUT
) ......... V
CC
0.5V to V
CC
+5.0V
Termination Current
(3)
Source or sink current on VT pin ........................
100mA
Input Current
(3)
Source or sink current on IN, /IN ..........................
50mA
V
REF-AC
Current
(3)
Source or sink current on IN, /IN ............................
2mA
Lead Temperature (soldering, 10 sec.) ..................... 265
C
Storage Temperature Range (T
S
) ........... 65
C to +150
C
Operating Ratings
(2)
Power Supply Voltage (V
CC
) ................. +2.375V to +3.60V
Ambient Temperature Range (T
A
) ............. 40
C to +85
C
Package Thermal Resistance
(4)
MLFTM (
JA
)
Still-Air ............................................................. 23
C/W
MLFTM (
JB
)
Junction-to-board ............................................ 12
C/W
Symbol
Parameter
Condition
Min
Typ
Max
Units
V
CC
Power Supply Voltage
V
CC
= 2.5V.
2.375
2.5
2.625
V
V
CC
= 3.3V.
3.0
3.3
3.6
V
I
CC
Power Supply Current
No load, max. V
CC
.
225
300
mA
Includes current from internal 50
pull-up
on each output.
R
IN
Input Resistance (IN-to-V
T,
/IN-to-V
T
)
40
50
60
R
DIFF_IN
Differential Input Resistance
80
100
120
(IN-to-/IN)
V
IH
Input HIGH Voltage
Note 6
V
CC
1.6
V
CC
V
(IN-to-/IN)
V
IL
Input LOW Voltage
0
V
IH
0.1
V
(IN-to-/IN)
V
IN
Input Voltage Swing
See Figure 1a.
0.1
1.7
V
(IN-to-/IN)
V
DIFF_IN
Differential Input Voltage Swing
See Figure 1b.
0.2
V
|IN /IN|
V
T_IN
IN to V
T
(IN-to-/IN)
1.28
V
V
REF-AC
Output Reference Voltage
V
CC
1.3 V
CC
1.2 V
CC
1.1
V
Notes:
1. Permanent device damage may occur if ratings in the "Absolute Maximum Ratings" section are exceeded. This is a stress rating only and functional
operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Due to the limited drive capability, use for input of the same package only.
4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB.
JA
uses 4-layer
in still-air number, unless otherwise stated.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. V
IH
(min), not lower than 1.2V.
DC ELECTRICAL CHARACTERISTICS
(5)
T
A
= 40
C to +85
C, unless otherwise stated.
5
SY58040U
Micrel
M9999-072904
hbwhelp@micrel.com or (408) 955-1690
V
CC
= 2.5V
5% or 3.3V
10%; T
A
= 40
C to +85
C; R
L
= 100
across each output pair, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
V
OH
Output HIGH Voltage
V
CC
0.040 V
CC
0.010
V
CC
V
Q, /Q
V
OUT
Output Differential Swing
See Figure 1a.
325
400
mV
Q, /Q
V
DIFF_OUT
Differential Output Voltage Swing
See Figure 1b.
650
800
mV
Q, /Q
R
OUT
Output Source Impedance
40
50
60
CML OUTPUT DC ELECTRICAL CHARACTERISTICS
(7)
V
CC
= 2.5V
5% or 3.3V
10%; T
A
= 40
C to +85
C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
V
IH
Input HIGH Voltage
2.0
V
CC
V
V
IL
Input LOW Voltage
0.8
V
I
IH
Input HIGH Current
125
30
A
I
IL
Input LOW Current
V
IL
= 0V.
300
A
Note:
7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS
(7)
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