ChipFind - документация

Электронный компонент: SY89858UMG

Скачать:  PDF   ZIP
November 2004
M9999-110804
hbwhelp@micrel.com
or (408) 955-1690
Precision Edge is a trademark of Micrel, Inc
Micro
LeadFrame and MLF are trademarks of Amkor Technology, Inc.
SY89858U
Precision Low Power 1:8 LVPECL Fanout
Buffer with Internal Termination
General Description
The SY89858U is a 2.5V/3.3V precision, high-
speed, fully differential LVPECL 1:8 fanout buffer
optimized to provide eight identical output copies
with less than 30ps of skew and less than 10ps
pp
total jitter. It can process clock signals as fast as
2.0GHz.
The differential input includes Micrel's unique, 3-pin
input termination architecture that allows the
SY89858U to directly interface to LVPECL, CML,
and LVDS differential signals (AC- or DC-coupled)
as small as 100mV without any level shifting or
termination resistor networks in the signal path. The
result is a clean, stub-free, low-jitter interface
solution. The LVPECL (100k temperature
compensated) outputs feature 800mV typical swing
into 50 loads, and provide fast rise/fall times
guaranteed to be less than 200ps.
The SY89858U operates from a 2.5V 5% supply or
3.3V 10% supply and is guaranteed over the full
industrial temperature range of 40C to +85C. For
applications that require a higher speed fanout
buffer, consider the SY58032U. The SY89858U is
part of Micrel's high-speed, Precision EdgeTM
product line. All support documentation can be found
on Micrel's web site at: www.micrel.com.
Precision EdgeTM
Features
Precision 1:8, LVPECL fanout buffer
Low power: 238mW (2.5V)
Guaranteed AC performance over temperature
and supply voltage:
Wide operating frequency: DC to 2.0GHz
<380ps In-to-Out t
pd
<200ps t
r
/t
f
<30ps skew
Ultra-low jitter design:
<1ps
rms
random jitter
<1ps
rms
cycle-to-cycle jitter
<10ps
pk-pk
total jitter
100k LVPECL compatible outputs
Fully differential inputs/outputs
Accepts an input signal as low as 100mV
(200mV
pp
)
Unique patent pending input termination and VT
pin accepts DC-coupled and AC-coupled
differential inputs (LVPECL, LVDS, and CML)
Power supply 2.5V +5% or 3.3V +10%
40C to +85C industrial temperature range
Available in 32-pin (5mm x 5mm) MLFTM package
Applications
All SONET and GigE clock distribution
All Fibre Channel clock and data distribution
Network routing engine timing distribution
High-end, low-skew multiprocessor synchronous
clock distribution
Markets
LAN/WAN
Enterprise servers
ATE
Test and measurement
Micrel
SY89858U
November 2004
M9999-110504
hbwhelp@micrel.com
or (408) 955-1690
2
Typical Application
V
T
IN
/IN
50
50
V
REF-AC
Q0
1:8 LVPECL FOB
/Q0
Q1
/Q1
Q2
/Q2
Q3
/Q3
Q4
/Q4
Q5
/Q5
Q6
/Q6
Q7
/Q7
Micrel
SY89858U
November 2004
M9999-110504
hbwhelp@micrel.com
or (408) 955-1690
3
Ordering Information
(1)
Part Number
Package
Type
Operating
Range
Package Marking
Lead
Finish
SY89858UMG
MLF-32
Industrial
SY89858 with Pb-Free bar-line indicator
NiPdAu
Pb-Free
SY89858UMGTR
(2)
MLF-32
Industrial
SY89858 with Pb-Free bar-line indicator
NiPdAu
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25C, DC Electricals Only.
2. Tape and Reel.
Pin Configuration
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9 10 11 12 13 14 15 16
32 3130 29 28 27 26 25
VCC
GND
IN
VT
VREF-AC
/IN
GND
VCC
GND
VCC
Q3
/Q3
Q4
/Q4
VCC
GND
/Q1
Q1
/Q0
Q0
VCC
Q2
/Q2
VCC
Q6
/Q6
Q7
/Q7
VCC
/Q5
Q5
VCC
32-Pin MLFTM (MLF-32)
Pin Description
Pin Number
Pin Name
Pin Function
3, 6
IN, /IN
Differential Input: This differential input accepts AC- or DC-coupled signals as
small as 100mV (200mV
pp
). Each pin of this pair internally terminates to a VT
pin
through 50 . Note that these inputs will default to an indeterminate state if left
open. Please refer to the "Input Interface Applications" section for more details.
4
VT
Input Termination Center-Tap: Each side of the differential input pair terminates
to this VT
pin. The VT pin provides a center-tap to a termination network for
maximum interface flexibility. See the "Input Interface Applications" section for
more details.
5
VREF-AC
Reference Voltage: This output biases to V
CC
1.2V (typical). It is used for AC-
coupling inputs IN and /IN. Connect VREF-AC directly to the corresponding VT
pin. Bypass with 0.01uF low ESR capacitor to V
CC
. Maximum sink/source
capability is 1.5mA.
1, 8, 9, 16, 18,
23, 25, 32
VCC
Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close
to the VCC pins as possible.
31, 30, 29, 28,
27, 26, 22, 21,
20, 19, 15, 14,
13, 12, 11, 10
Q0, /Q0, Q1,
/Q1, Q2, /Q2,
Q3, /Q3, Q4,
/Q4, Q5, /Q5,
Q6, /Q6, Q7,
/Q7
100k LVPECL Differential Outputs: Differential buffered output copy of the input
signal. The LVPECL output swing is typically 800mV into 50 to V
CC
2V.
Unused output pairs may be left floating with no impact on jitter. See "LVPECL
Output" section.
2, 7, 17, 24
GND
Exposed Pad
Ground: Ground pins and exposed pad must be connected to the same ground
plane.
Micrel
SY89858U
November 2004
M9999-110504
hbwhelp@micrel.com
or (408) 955-1690
4
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
)............................. 0.5V to +4.0V
Input Voltage (V
IN
)..................................... 0.5V to V
CC
Termination Current
Source or sink current on V
T
..................... 100mA
Reference Current
(3)
Source or sink current on V
REF-AC
.............. 1.5mA
LVPECL Output Current (I
OUT
)
Continuous .................................................... 50mA
Surge ........................................................... 100mA
Lead Temperature (soldering, 20 sec.)............ +260C
Storage Temperature (T
s
) ...................65C to 150C
Operating Ratings
(2)
Supply Voltage (V
CC
) ....................+2.375V to +2.625V
........................................................ +3.0V to +3.6V
Ambient Temperature (T
A
) .................. 40C to +85C
Package Thermal Resistance
(4)
MLFTM (
JA
)
Still-Air ........................................................ 35C/W
MLFTM (
JB
)
Junction-to-Board ...................................... 20C/W
DC Electrical Characteristics
(5)
T
A
= 40C to +85C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
2.375
2.5
2.625
V
V
CC
Power Supply
3.0
3.3
3.6
V
I
CC
Power Supply Current
No load, max. V
CC
95
150
mA
R
IN
Input Resistance
(IN-to-V
T
)
45
50
55
R
DIFF_IN
Differential Input Resistance
(IN-to-/IN)
90
100
110
V
IH
Input High Voltage
(IN, /IN)
Note 6
V
CC
1.6
V
CC
V
V
IL
Input Low Voltage
(IN, /IN)
0
V
IH
0.1
V
V
IN
Input Voltage Swing
(IN, /IN)
See Figure 1a.
0.1
1.7
V
V
DIFF_IN
Differential Input Voltage Swing
|IN-/IN|
See Figure 1b.
0.2
V
V
T_IN
IN-to-V
T
(IN, /IN)
1.28
V
V
REF-AC
Output Reference Voltage
V
CC
1.3V
V
CC
1.2V
V
CC
1.1V
V
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is
not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Due to the limited drive capability use for input of the same package only.
4. Package Thermal Resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
JA
and
JB
values are determined for a 4-layer board in still air, unless otherwise stated.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. V
IH
(min) not lower than 1.2V.
Micrel
SY89858U
November 2004
M9999-110504
hbwhelp@micrel.com
or (408) 955-1690
5
LVPECL Outputs DC Electrical Characteristics
(7)
V
CC
= 2.5V 5% or 3.3V 10%; T
A
= 40C to + 85C; R
L
= 50 to V
CC
2V, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
V
OH
Output HIGH Voltage
Q, /Q
V
CC
1.145
V
CC
0.895
V
V
OL
Output LOW Voltage
Q, /Q
V
CC
1.945
V
CC
1.695
V
V
OUT
Output Voltage Swing
Q, /Q
See Figure 1a.
500
800
mV
V
DIFF-OUT
Differential Output Voltage Swing
Q, /Q
See Figure 1b.
1000
1600
mV
Note:
7.
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
AC Electrical Characteristics
(8)
V
CC
= 2.5V 5% or 3.3V 10%; T
A
= 40C to + 85C, R
L
= 50 to V
CC
2V, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
f
MAX
Maximum Operating Frequency
V
OUT
400mV
2.0
3.0
GHz
t
PD
Propagation Delay (IN-to-Q)
180
260
380
ps
T
pd
Tempco
Differential Propagation Delay
Temperature Coefficient
115
fs/
o
C
Output-to-Output Skew
Note 9
30
T
skew
Part-to-Part Skew
Note 10
150
ps
Random Jitter (RJ)
Note 11
1
ps
(rms)
Deterministic Jitter (DJ)
Note 12
10
ps
(pp)
Cycle-to-Cycle Jitter
Note 13
1
ps
(pp)
t
Jitter
Total Jitter
Note 14
10
ps
(pp)
t
R,
t
F
Output Rise/Fall Time (20% to 80%)
At full output swing.
75
130
200
ps
Notes:
8.
High-frequency AC-parameters are guaranteed by design and characterization.
9.
Output-to-output skew is measured between outputs under identical conditions.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at
the respective inputs. Part-to-part skew includes variation in t
pd
.
11. Random jitter is measured with a K28.7 character pattern, measured at 2.5Gbps.
12. Deterministic Jitter is measured at 2.5Gbps, with both K28.5 and 2
23
1 PRBS pattern.
13. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, T
n
T
n-1
where T is the time between rising edges of the
output signal.
14. Total jitter definition: With an ideal clock input of frequency <f
MAX
, no more than one output edge in 10
12
output edges will deviate by more
than the specified peak-to-peak jitter value.