October 1998
ML2037
*
500kHz, Serial Input, Programmable
Sine Wave Generator with Digital Gain Control
1
GENERAL DESCRIPTION
The ML2037 is a precision programmable sine wave
generator with a frequency range of DC to 500kHz. The
device is capable of generating a wide frequency range
of low distortion sine waves with no external passive
components. The frequency of the sine wave output is
programmed by a 16-bit word that is loaded through a
serial input. The sine wave output frequency is determined
by the programmed value and the clock frequency. The
clock frequency is derived from either an external crystal
connected to the device or an external clock input to
provide a stable and accurate frequency reference.
The sine wave output of the ML2037 is filtered and has a
programmable amplitude that is digitally programmed in
0.5V steps. The maximum amplitude is 2.0V
P-P
centered
at a 2.5V level. The device functions from a single 5V
power supply and has a shutdown pin to put the device
into a low power mode that disables the output. A sync
input is provided to allow the synchronization of more
than one device in a system.
BLOCK DIAGRAM
FEATURES
s
Programmable output frequency:
DC to 400kHz--using a crystal
DC to 500kHz--using an external digital clock
s
3-wire SPI compatible serial interface with double
buffered latch for programming the frequency
s
Digital gain control for programming output amplitude
s
SYNC input for synchronization of multiple sine waves
s
Shutdown pin for sleep mode
s
Single 5V power supply operation
AVCC
12
D GND
D GND
OUT
S ENABLE
S CLK
S DATA IN
7
4
6
10
8-BIT
DAC
GAIN
CONTROL &
SMOOTHING
FILTER
G0
14
G1
15
REFERENCE
PHASE
ACCUMULATOR
512 POINT
SINE LOOK-UP
TABLE
8
16
16
16-BIT DATA LATCH
16-BIT SHIFT REGISTER
CRYSTAL
OSCILLATOR
2
CLK IN
13
CLK OUT
3
AVCC
11
DVCC
16
SYNC
2
AGND
9
SHDN
8
1
5
* This Part Is End Of Life As Of August 1, 2000
ML2037
2
PIN CONFIGURATION
PIN DESCRIPTION
PIN
NAME
FUNCTION
1, 5
D GND
Ground connection for the digital
sections of the IC.
2
SYNC
Synchronization input. Holding this
pin low stops the sine wave output,
and resets the phase to zero.
3
CLK OUT
Output of the internal high frequency
clock generator. f
CLK OUT
= f
CLK IN
.
4
S CLK
Serial data clock input. Serial data is
clocked into the shift register on
falling edges of S CLK.
6
S DATA IN
Serial data input for programming the
output frequency.
7
S ENABLE
Serial interface enable control. A
logic high on this pin allows data to be
entered into the latch.
8
SHDN
A logic high on this pin causes the
output of the generator to shut off and
places the IC in a low power standby
mode.
PIN
NAME
FUNCTION
9
A GND
Ground reference for analog sections
of the IC and reference for OUT.
10
OUT
Sine wave output. The amplitude of
the sine wave will vary around a 2.5V
DC level.
11,12 AV
CC
Power supply for the analog sections of
the IC.
13
CLK IN
Input of the internal high frequency
clock generator. This pin is either
driven from an external clock input or
connected to a crystal for use with the
internal oscillator.
14
G0
Output gain control. Works with G1 to
set the output amplitude to one of four
different full scale ranges.
15
G1
Output gain control. Works with G0 to
set the output amplitude to one of four
different full scale ranges.
16
DV
CC
Power supply for the digital sections of
the IC.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D GND
SYNC
CLK OUT
S CLK
D GND
S DATA IN
S ENABLE
SHDN
DVCC
G1
G0
CLK IN
AVCC
AVCC
OUT
A GND
TOP VIEW
ML2037
16-Pin PDIP (P16)
16-Pin Wide SOIC (S16W)
ML2037
3
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, AV
CC =
DV
CC
= 4.75V to 5.25V, SHDN = 0V, CLK IN = 25.6MHz (crystal)
or 32MHz (external clock), C
L
= 50pF, R
L
= 1k
W, T
A
= Operating Temperature Range (Note 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
OUTPUT
HD
Harmonic Distortion
20Hz to 31.25kHz
-45
dB
(2nd and 3rd Harmonic)
31.25kHz to 500kHz
-40
dB
SND
Signal to Noise + Distortion
1kHz to 31.25kHz,
-45
dB
f
OUT
BW < 31.25kHz
31.35kHz to 500kHz,
-40
dB
f
OUT
BW < 500kHz
Gain Error
f
OUT
<125kHz,
C Suffix
0.15
dB
AV
CC
= 5V, G1=1, G0=1
f
OUT
<125kHz,
I Suffix
0.25
dB
AV
CC
= 5V, G1=1, G0=1
125kHz<f
OUT
<500kHz,
Both
0.5
dB
AV
CC
= 5V, G1=1, G0=1
Idle Noise
SHDN = 5V
500
V
rms
PSRR
Power Supply Rejection Ratio
200mV
P-P
, f
OUT
= 0 - 100kHz
-40
dB
DC Output Voltage
2.4
2.6
V
Peak-to-Peak Output Voltage
G1 = 0, G0 = 0
0.5
V
P-P
G1 = 0, G0 = 1
1.0
V
P-P
G1 = 1, G0 = 0
1.5
V
P-P
G1 = 1, G0 = 1
1.88
2.0
2.12
V
P-P
OSCILLATOR
CLK IN Input Low Voltage
1.5
V
CLK IN Input High Voltage
3.5
V
CLK IN Input Low Current
External Clock
-250
A
CLK IN Input High Current
External Clock
250
A
CLK IN Input Capacitance
12
pF
CLK IN Maximum Frequency
External Clock
32
MHz
CLK OUT to CLK IN Frequency Ratio
0.49
0.5
0.51
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
AV
CC
, DV
CC .................................................................................
7V
Voltage on any other pin .... AGND - 0.3V to AV
CC
+ 0.3V
Input Current ........................................................ 25mA
Junction Temperature .............................................. 150C
Storage Temperature Range ...................... 65C to 150C
Lead Temperature (Soldering, 10 sec) ..................... 260C
Thermal Resistance (
q
JA
)
Plastic DIP ....................................................... 80C/W
SOIC .............................................................. 105C/W
OPERATING CONDITIONS
Temperature Range
ML2037CX ................................................. 0C to 70C
ML2037IX ............................................... -40C to 85C
AV
CC
, DV
CC
Range .................................. 4.75V to 5.25V
ML2037
4
Note 1:
Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
ELECTRICAL CHARACTERISTICS
(Continued)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
OSCILLATOR (Continued)
t
R
CLK OUT Rise Time
C
L
= 25pF, See Timing Diagram 2
8
ns
t
F
CLK OUT Fall Time
C
L
= 25pF, See Timing Diagram 2
8
ns
LOGIC
V
IL
Input Low Voltage
1.0
V
V
IH
Input High Voltage
DV
CC
- 1
V
I
IL
Input Low Current
-1
A
I
IH
Input High Current
1
A
V
OL
Output Low Voltage
I
OL
= -2mA
0.4
V
V
OH
Output High Voltage
I
OH
= 2mA
4.0
V
f
S CLK
Serial Clock Frequency
0.01
10
MHz
t
PW
Serial CLock Pulse Width
40
ns
t
SSD
S DATA IN Setup Time
10
ns
t
HSD
S DATA IN Hold Time
10
ns
t
SSENS
S ENABLE Setup Time
30
ns
t
SSENH
S ENABLE Hold Time
50
ns
t
DSEN
Delay from S ENABLE to Stable Output
f
CLK IN
= 32MHz
500
ns
t
DSYNC
Delay from SYNC to Output Start
f
CLK IN
= 32MHz
500
ns
SUPPLY
AI
CC
AV
CC
Current
f
CLK IN
= 16MHz
35
45
mA
f
CLK IN
= 32MHz
40
50
mA
SHDN = 5V
10
A
DI
CC
DV
CC
Current
f
CLK IN
= 16MHz
10
14
mA
f
CLK IN
= 32MHz
16
20
mA
SHDN = 5V
30
A
f
CLK OUT
f
CLK IN
t
R
t
F
CLK IN
CLK OUT
Timing Diagram 1.
Timing Diagram 2.
t
SSENS
t
SSENH
S CLK
S DATA IN
S ENABLE
t
SSD
t
HSD
t
PW
t
PW
D0
D1
D2
D14
D15
ML2037
5
FUNCTIONAL DESCRIPTION
The ML2037 is composed of a programmable frequency
generator, a sine wave generator, a crystal oscillator, and
a digital interface. The functional block diagram is shown
in Figure 1.
PROGRAMMABLE FREQUENCY GENERATOR
The programmable frequency generator produces a digital
output whose frequency is determined by a 16-bit digital
word.
The frequency generator is composed of a phase
accumulator which is clocked at f
CLK IN
. The value
stored in the data latch is added to the phase accumulator
every two cycles of CLK IN. The frequency of the analog
output is equal to the rate at which the accumulator
overflows and is given by the following equation:
f
f
D
D
OUT
CLKIN
DEC
=
15
0
2
22
0
5
(1)
Where (D15D0) is the decimal value of the
programming word.
The frequency resolution and the minimum frequency are
the same and can be calculated using:
Df
f
MIN
CLKIN
=
2
22
(2)
When f
CLK IN
= 25MHz,
Df
MIN
= 5.96Hz (2.98Hz).
Lower output frequencies are obtained by using a lower
clock frequency.
The maximum frequency output can be easily calculated
with the following equation:
f
f
OUT MAX
CLKIN
(
)
=
2
6
(3)
When f
CLK IN
= 25MHz, f
OUT(MAX)
= 391kHz. Higher
frequencies, up to 500kHz, are obtained by using an
external clock, where 25MHz < f
CLK IN
< 32MHz.
Due to the phase quantization nature of the frequency
generator, spurious tones can be present in the output in
the range of 50dB relative to fundamental. The energy
from these tones is included in the signal to noise +
distortion specification (SND) given in the electrical
table. The frequency of these tones can be very close to
the fundamental, and it is not practical to filter them out.
SINEWAVE GENERATOR
The sinewave generator is composed of a sine lookup
table, an 8-bit DAC, an output smoothing filter, and an
amplifier. The sine lookup table is addressed by the phase
accumulator. The DAC is driven by the output of the table
and generates a staircase representation of a sine wave.
The output filter smooths the analog output by removing
the high frequency sampling components. The resultant
voltage on V
OUT
is a sinusoid with the second and third
harmonic distortion components at least 40dB below the
fundamental.
The ML2037 has a 2-bit (G1, G0) digital gain control.
With the gain input equal to logic 00, the sine wave
amplitude is equal to 0.5V
P-P
. Incrementing the gain
control input increases the output amplitude in 0.5V steps
to a maximum of 2.0V
P-P
. The output amplitude is
accurate to within 0.5dB over the frequency range.
G1
G0
PP OUTPUT AMPLITUDE
0
0
.5V
0
1
1.0V
1
0
1.5V
1
1
2.0V
The analog section is designed to operate over a
frequency range of DC to 500kHz and is capable of
driving 1k
W, 50pF loads at the maximum amplitude of
2.0V
P-P
. The sine wave output is typically centered about
a 2.5V DC level, so for a 2V
P-P
sine wave, the output will
swing from 1.5V to 3.5V.
CRYSTAL OSCILLATOR
The crystal oscillator generates an accurate reference
clock for the programmable frequency generator. The
internal clock can be generated with a crystal or external
clock.
If a crystal is used, it must be placed between CLK IN and
DGND. An on-chip oscillator will then generate the
internal clock. No other external components are
required. The crystal should be a parallel resonant type
with a frequency between 5MHz to 25.6MHz. It should
be placed physically as close as possible to CLK IN and
DGND, to minimize trace lengths.
The crystal must have the following characteristics:
Parallel resonant type
Frequency: 5MHz to 25.6MHz
Maximum ESR: 120
W @ 5 to 10MHz, 80W @10 to
15MHz, and 50
W @ 15 to 25.6MHz
Drive level: 500W
Typical load capacitance: 18 - 20pF
Maximum case capacitance: 7pF
The frequency of oscillation will be a function of the
crystal parameters and board capacitance. In general,
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