July 2000
ML2652/ML2653
10Base-T Physical Interface Chip
GENERAL DESCRIPTION
The ML2652, 10BASE-T Physical Interface Chip, is a
complete physical interface for twisted pair and AUI
Ethernet applications. It combines a 10BASE-T MAU,
Manchester Encoder/Decoder, and Twisted Pair Interface
filters in one monolithic IC. A complete DTE interface for
twisted pair Ethernet can be implemented by combining
the ML2652, an Ethernet controller, and transformers.
The ML2652 can automatically select between an AUI and
twisted pair interface based on Link Pulses. Six LED
outputs provide complete status at the physical link. Link
pulse testing can be enabled or disabled through the
LTP LED Pin.
The unique transmitter design uses a waveform generator
and low pass filter to meet the 10BASE-T transmitter
requirements without the need for an external filter. The
differential current driven output reduces common mode
which in turn results in very low EMI and RFI noise.
The ML2652 and ML2653 (28 pin version) are implemented
in a low power double polysilicon CMOS technology. The
ML2653 does not include the AUI interface.
FEATURES
s
Complete physical interface solution
s
Conforms to IEEE 802.3i1990 (10Base-T)
s
On-chip transmit and receive filters
s
Automatic AUI/Twisted Pair selection (ML2652 only)
s
Power down mode
s
Pin selectable controller interface-(CS0 CS2)
Intel 82586, 82596
NSC DP8390
Seeq 8003, 8005
AMD 7990
s
Automatic polarity correction
s
Pin selectable receive squelch levels
s
Status pins for: link detect, receive &
transmit activity, collision, jabber, AUI selection
s
Single supply 5V 5%
ML2652 BLOCK DIAGRAM
1
TxE
TxD
LPBK
RxC
RxE
RxD
CLK
CONTROLLER
INTERFACE
MANCHESTER
ENCODER
MANCHESTER
DECODER
LEDS
JABBER
DETECT
LINK
PULSE
XMT
WAVEFORM
GEN & LPF
COLLISION
DETECT
RECEIVER
CURRENT
DRIVEN XMT
OUTPUT
DRIVER
RECEIVE
LPF
AUI
OSC
XMT
AUISEL
RCV
CLS
RPOL
LTP
JAB
CS0 CS1 CS2 FD V
CC
V
CC
GND
GND
JABDIS
RTX
Tx+
Tx
Rx+
Rx
RSL
DO+
DO
CI+
CI
DI+
DI
AUI/
TP
DATA
ENABLE
COLLISION
DATA
ENABLE
COL
TxC
2
ML2652/ML2653
PIN CONNECTIONS
ML2653
28-Pin PLCC (Q28)
ML2652
44-Pin PLCC (Q44)
ML2653
44-Pin TQFP (H44-10)
RSL
JAB
XMT
CLS
RCV
RXD
RxC
RxE
CS2
CS1
NC
NC
NC
CLK
LPBK
NC
Rx+
Rx
NC
NC
NC
NC
12 13 14 15 16
NC
NC
Tx
GND
Tx+
GND
TxC
TxD
TxE
RTX
JABDIS
NC
NC
V
CC
V
CC
FD
LTP
AUI/
TP
NC
RPOL
COL
CS0
17 18
1
2
3
4
5
6
7
8
9
10
11
44 43 42 41 40
33
32
31
30
29
28
27
26
25
24
23
39 38
19
37
20
36
21
35
22
34
5
6
7
8
9
10
11
25
24
23
22
21
20
19
12 13 14 15 16 17 18
4
3
2
1
28 27 26
Tx
NC
CLK
LPBK
Rx+
Rx
NC
RSL
XMT/RCV
RxD
RxC
RxE
CS2
CS1
GND
Tx+
GND
TxC
TxD
TxE
RT
X
V
CC
V
CC
FD
LT
P
RPOL
COL
CS0
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
18 19 20 21 22 23 24 25 26 27 28
6
5
4
3
2
1
44 43 42 41 40
DO+
DO
CLK
LPBK
GND
Rx+
Rx
NC
NC
DI+
DI
RSL
JAB
XMT
CLS
RCV
RXD
RxC
RxE
CS2
CS1
GND
NC
NC
Tx
GND
Tx+
GND
TxC
TxD
TxE
RT
X
J
ABDIS
CI+
CI
V
CC
V
CC
FD
LT
P
A
UI/TP
A
UISEL
RPOL
COL
CS0
3
ML2652/ML2653
PIN DESCRIPTION
NAME
FUNCTION
V
CC
Positive supply. +5V
GND
Ground. 0 volts. All inputs and outputs referenced
to this point.
CLK
Clock input. There must be either a 20 MHz
crystal or a 20 MHz clock between this pin
and GND.
Tx+
Transmit positive twisted pair output. This output
is a current source that drives the twisted pair
cable through a pulse transformer.
Tx
Transmit negative twisted pair output. This output
is a current source that drives the twisted pair
cable through a pulse transformer.
Rx+
Receive positive twisted pair input. This input
receives data from the twisted pair cable through
a pulse transformer.
Rx
Receive negative twisted pair input. This input
receives data from the twisted pair cable through
a pulse transformer.
DO+
AUI positive transmit output. AUI transmit data
output to optional external transceiver.
DO
AUI negative transmit output. AUI transmit data
output to optional external transceiver.
DI+
AUI positive receive data input from optional
external transceiver.
NAME
FUNCTION
DI
AUI negative receive data input from optional
external transceiver.
CI+
AUI positive collision input from optional external
transceiver.
CI
AUI negative collision input from optional
external transceiver.
RTX
Transmit current set. An external resistor between
this pin and GND programs the absolute value of
output current on Tx.
TxC
Transmit clock output. Digital output which clocks
the transmit data (TxD) into the device from the
controller.
TxD
Transmit data input. Digital input which contains
transmit data from the controller.
TxE
Transmit enable input. Digital input from the
controller that indicates when the transmit data
(TxD) is valid.
COL
Collision output Digital output to the controller
which indicates when a collision condition is
present.
RxC
Receive clock output. Digital output which clocks
receive data (RxD) from the device into the
controller.
ML2653 BLOCK DIAGRAM
TxE
TxD
LPBK
RxC
RxE
RxD
CLK
CONTROLLER
INTERFACE
MANCHESTER
ENCODER
MANCHESTER
DECODER
LEDS
JABBER
DETECT
LINK
PULSE
XMT
WAVEFORM
GEN & LPF
COLLISION
DETECT
RECEIVER
CURRENT
DRIVEN XMT
OUTPUT
DRIVER
RECEIVE
LPF
OSC
XMT/RCV
RPOL
LTP
CS0 CS1 CS2 FD
V
CC
V
CC
GND GND
RTX
Tx+
Tx
Rx+
Rx
RSL
DATA
ENABLE
COLLISION
DATA
ENABLE
TxC
COL
4
ML2652/ML2653
NAME
FUNCTION
RxD
Receive data output. Digital output which
contains receive data sent to the controller.
RxE
Receive data valid. Digital output to the controller
that indicates when the receive data (RxD) is
valid.
LPBK
Local loopback. Digital input from the controller
which forces the device to loopback transmit data
without sending it on the media.
FD
Full Duplex Enable. When enabled the 10BASE-T
MAU loopback and collision detect are disabled.
LPBK must be disabled when using this function.
CS0
Controller selection input. Digital input which
selects one of four standard controller timing
interfaces. This pin has an internal pulldown
resistor to GND.
CS1
Controller select input. Digital input which selects
one of four standard controller timing interfaces.
This pin has an internal pulldown resistor to GND.
CS2
Controller select input. Digital input which selects
one of four standard controller timing interfaces.
This pin has an internal pulldown resistor to GND.
RSL
Receive squelch level select input. Pin has
internal pullup resistor to VCC.
RSL = High Receive squelch level = 10Base-T
RSL = Low Receive squelch level = extended
distance
XMT
Transmit status output. Digital output which
indicates data transmission on Tx+ and Tx.
Pin is open drain output with resistor pullup and is
capable of driving an LED. XMT pin and RCV pin
are the same pin for the ML2653.
RCV
Receive status output. Digital output which
indicates unsquelched data reception on Rx+
and Rx. Pin is an open drain output with resistor
pullup and is capable of driving an LED.
NAME
FUNCTION
CLS
Collision status output. Digital output which
indicates that collision condition has been
detected. Pin is an open drain output with resistor
pullup and is capable of driving an LED.
LTP
Link test pass output/input. This pin consists of an
open drain output transistor with a resistor pullup
that serves both as a link test pass output and a
link test disable input. When used as an output,
this pin is capable of driving an LED.
LTP = High, link test failed
LTP = Low, link test pass
LTP = GND, link test disabled
AUI/TP AUI/twisted pair interface select input.
AUI/TP = High, AUI selected
AUI/TP = Low, TP selected
RPOL This pin must be grounded at all times.
JAB
Jabber detect output. Digital output which
indicates that the jabber condition has been
detected. Pin is an open drain output with resister
pullup and is capable of driving a LED.
JAB = High, normal
JAB = Low, jabber detected
AUISEL AUI/TP port output status
AUISEL = High, TP port selected
AUISEL = Low, AUI port selected
JABDIS Jabber disable input
JABDIS = High, jabber disabled
JABDIS = Low, normal operation
NC
No connect. Leave this pin open circuit.
PIN DESCRIPTION
(Continued)
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are limits beyond which the
life of the integrated circuit may be impaired. All voltages
unless otherwise specified are measured with respect to
GND. (Note 1)
V
CC
supply voltage .................................................. +6.5V
All inputs and outputs ....................... 0.3V to V
CC
+ 0.3V
Input current per pin ............................................. 25 mA
Power dissipation .............................................. 0.75 Watt
Storage temperature range ........................ 65C to 150C
Junction Temperature .............................................. 150C
Lead temperature (soldering, 10 sec) ....................... 260C
Thermal Resistance (
q
JA
)
28-Lead PLCC ................................................... 60C/W
44-Lead PLCC ................................................... 54C/W
44-Lead TQFP ................................................... 67C/W
5
ML2652/ML2653
ELECTRICAL CHARACTERISTICS
(Continued)
Unless otherwise specified T
A
= 0C to 70C, V
CC
= 5V +5%. Note 2 & 3.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIL
Digital input low voltage
All except CLK
.8
V
CLK
1.5
V
VIH
Digital input high voltage
All except CLK
2.0
V
CLK
3.5
V
IIL
Digital input low current
VIN=GND TxD, TxE, AUI/TP
5
A
VIN=GND LPBK, CS20, LBDIS,JABDIS
5
A
VIN=GND RSL
10
25
50
A
VIN=GND LTP, RPOL,
15
250
500
A
VIN=GND CLK
300
A
IIH
Digital input high current
VIN=VCC TxD, TxE, AUI/TP
1
A
VIN=VCC LPBK, CS20, LBDIS, JABDIS
10
25
50
A
VIN=VCC RSL
1
A
VIN=VCC LTP, RPOL
1
A
VIN=VCC CLK
250
A
CIN
Digital input capacitance
All except CLK
5
pF
CLK
10
pF
VOL
Digital output low voltage
IOL=2mA TxC, COL,
RxC, RxD, RxE
.4
V
IOL=10mA XMT, RCV,
CLS, LTP, RPOL, JAB
.6
V
VOH
Digital output high voltage
IOH=2mA TxC, COL,
RxC, RxD, RxE
4.0
V
IOL=10uA XMT, RCV, CLS,
LTP, RPOL, JAB
2.4
V
ICC
VCC supply current
TX transmission
140
mA
No transmission
105
mA
Powerdown mode
2
mA
TOV
Tx differential
output voltage
RTX = 10K
2.2
2.5
2.8
Vp
THD
Tx harmonic distortion
TxD=all ones
27
dB
TCM
Tx common mode
output voltage
50
mVp
TCMR
Tx common mode rejection
VCM=15vp, 10.1 MHz sine
100
mVp
TOVI
Tx differential output
voltage during idle
50
mVp
TOIA
Tx output current accuracy
RTX=10K
50
mA
TRO
Tx output resistance
1
Mohm
TCO
Tx output capacitance
10
pF
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