2002 Microchip Technology Inc.

Preliminary

DS21203J-page 1

24AA256/24LC256/24FC256

Features

· Low power CMOS technology

- Maximum write current 3 mA at 5.5 V
- Maximum read current 400 µA at 5.5 V
- Standby current 100 nA typical at 5.5 V

· 2-wire serial interface bus, I

C compatible

· Cascadable for up to eight devices
· Self-timed ERASE/WRITE cycle
· 64-byte page-write mode available
· 5 ms max write-cycle time
· Hardware write protect for entire array
· Output slope control to eliminate ground bounce
· Schmitt trigger inputs for noise suppression
· 1,000,000 erase/write cycles
· Electrostatic discharge protection > 4000 V
· Data retention > 200 years
· 8-pin PDIP, SOIC, TSSOP, MSOP, and DFN

packages

· 14-lead TSSOP package
· Temperature ranges:

Device Selection Table

Description

The Microchip Technology Inc. 24AA256/24LC256/
24FC256 (24XX256*) is a 32K x 8 (256 Kbit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.8 V to 5.5 V). It has
been developed for advanced, low power applications
such as personal communications or data acquisition.
This device also has a page-write capability of up to 64
bytes of data. This device is capable of both random
and sequential reads up to the 256K boundary. Func-
tional address lines allow up to eight devices on the
same bus, for up to 2 Mbit address space. This device
is available in the standard 8-pin plastic DIP, SOIC,
TSSOP, MSOP, DFN and 14-lead TSSOP packages.

Block Diagram

Package Types

- Industrial (I):

-40

C to +85

- Automotive (E):

-40

C to +125

Part

Number

Range

Max. Clock

Frequency

Temp.

Ranges

24AA256

1.8-5.5 V

400 kHz

(1)

24LC256

2.5-5.5 V

400 kHz

I, E

24FC256

2.5-5.5 V

1 MHz

Note 1: 100 kHz for V

< 2.5 V.

HV GENERATOR

EEPROM

ARRAY

PAGE LATCHES

YDEC

XDEC

SENSE AMP

R/W CONTROL

MEMORY

CONTROL

LOGIC

I/O

CONTROL

LOGIC

I/O

A0 A1 A2

SDA

SCL

SDA

24X

256

PDIP/SOIC

TSSOP/MSOP *

SCL

SDA

TSSOP

24X

256

DFN

SCL

SDA

4
X

256

A0
A1

SCL
SDA

24X

256

1
2
3
4

14
13
12

* Pins A0 and A1 are no connects for the MSOP package only.

256K I

CMOS Serial EEPROM

*24XX256 is used in this document as a generic part number for the 24AA256/24LC256/24FC256 devices.

24AA256/24LC256/24FC256

DS21203J-page 2

Preliminary

2002 Microchip Technology Inc.

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

............................................................................................................................................................................6.5 V

All inputs and outputs w.r.t. V

....................................................................................................... -0.6 V to V

+1.0 V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temp. with power applied ..........................................................................................................-65°C to +125°C

ESD protection on all pins

......................................................................................................................................................

4 kV

1.1

24AA256/24LC256/24FC256 DC Electrical Specifications

NOTICE: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.

DC Specifications

Electrical Characteristics:
Industrial (I):

= +1.8 V to 5.5 V

AMB

= -40°C to +85°C

Automotive (E):

= +2.5 V to 5.5 V

AMB

= -40°C to +125°C

Param.

No.

Sym

Characteristic

Min

Max

Units

Conditions

A0, A1, A2, SCL, SDA
and WP pins:

High level input voltage

0.7 V

Low level input voltage

0.3 V

0.2 V

V
V

2.5 V

< 2.5 V

HYS

Hysteresis of Schmitt
Trigger inputs
(SDA, SCL pins)

0.05 V

2.5 V (Note)

Low level output voltage

0.40

= 3.0 ma @ V

= 4.5 V

= 2.1 ma @ V

= 2.5 V

Input leakage current

±10

µA

= V

or V

, WP = V

= V

or V

, WP = V

Output leakage current

±10

µA

OUT

= V

or V

OUT

Pin capacitance
(all inputs/outputs)

= 5.0 V (Note)

AMB

= 25°C, f

= 1 MHz

Read Operating current

400

µA

= 5.5 V, SCL = 400 kHz

Write

= 5.5 V

D10

CCS

Standby current

µA

AMB

= -40°C to +85°C

SCL = SDA = V

= 5.5 V

A0, A1, A2, WP = V

µA

AMB

= -40°C to +125°C

SCL = SDA = V

= 5.5 V

A0, A1, A2, WP = V

Note:

This parameter is periodically sampled and not 100% tested.

2002 Microchip Technology Inc.

Preliminary

DS21203J-page 3

24AA256/24LC256/24FC256

1.2

24AA256/24LC256/24FC256 AC Electrical Specifications

AC Specifications

Electrical Characteristics:
Industrial (I):

= +1.8 V to 5.5 V

AMB

= -40°C to +85°C

Automotive (E):

= +2.5 V to 5.5 V

AMB

= -40°C to +125°C

Param.

No.

Sym

Characteristic

Min

Max

Units

Conditions

CLK

Clock frequency

--
--
--

100
400

1000

kHz

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

HIGH

Clock high time

4000

600
500

--
--
--

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

LOW

Clock low time

4700
1300

500

--
--
--

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

SDA and SCL rise time (Note 1)

--
--
--

1000

300
300

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

SDA and SCL fall time (Note 1)

--
--

300
100

All except, 24FC256
2.5 V

5.5 V 24FC256

STA

START condition hold time

4000

600
250

--
--
--

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

STA

START condition setup time

4700

600
250

--
--
--

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

DAT

Data input hold time

(Note 2)

DAT

Data input setup time

250
100
100

--
--
--

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

STO

STOP condition setup time

4000

600
250

--
--
--

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

WP setup time

4000

600
600

--
--
--

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

WP hold time

4700
1300
1300

--
--
--

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

Output valid from clock (Note 2)

--
--
--

3500

900
400

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

BUF

Bus free time: Time the bus must
be free before a new transmis-
sion can start

4700
1300

500

--
--
--

1.8 V

2.5 V

5.5 V

2.5 V

5.5 V 24FC256

Output fall time from V

minimum to V

maximum

100 pF

10 + 0.1CB

250
250

All except, 24FC256 (Note 1)
24FC256 (Note 1)

Input filter spike suppression
(SDA and SCL pins)

All except, 24FC256 (Notes 1 and 3)

Write cycle time (byte or page)

Endurance

1,000,000

cycles 25°C (Note 4)

Note

1: Not 100% tested. C

= total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling

edge of SCL to avoid unintended generation of START or STOP conditions.

3: The combined T

and V

HYS

specifications are due to new Schmitt trigger inputs, which provide improved noise spike suppression. This

eliminates the need for a T

specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total

Endurance Model, which can be obtained on Microchip's website: www.microchip.com.

2002 Microchip Technology Inc.

Preliminary

DS21203J-page 5

24AA256/24LC256/24FC256

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

2.1

A0, A1, A2 Chip Address Inputs

The A0, A1 and A2 inputs are used by the 24XX256 for
multiple device operations. The levels on these inputs
are compared with the corresponding bits in the slave
address. The chip is selected if the compare is true.

For the MSOP package only, pins A0 and A1 are not
connected.

Up to eight devices (two for the MSOP package) may
be connected to the same bus by using different chip
select bit combinations. If these pins are left uncon-
nected, the inputs will be pulled down internally to V

If they are tied to V

or driven high, the internal pull-

down circuitry is disabled.

In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic `

' or logic `

'. For appli-

cations in which these pins are controlled by a micro-
controller or other programmable device, the chip
address pins must be driven to logic `

' or logic `

before normal device operation can proceed.

2.2

Serial Data (SDA)

This is a bi-directional pin used to transfer addresses
and data into and out of the device. It is an open drain
terminal. Therefore, the SDA bus requires a pull-up
resistor to V

(typical 10 k

for 100 kHz, 2 k

for

400 kHz and 1 MHz).

For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.

2.3

Serial Clock (SCL)

This input is used to synchronize the data transfer to
and from the device.

2.4

Write Protect (WP)

This pin can be connected to either V

, V

or left

floating. Internal pull-down circuitry on this pin will keep
the device in the unprotected state if left floating. If tied
to V

or left floating, normal memory operation is

enabled (read/write the entire memory 0000-7FFF).

If tied to V

, WRITE operations are inhibited. Read

operations are not affected.

3.0

FUNCTIONAL DESCRIPTION

The 24XX256 supports a bi-directional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter and a device
receiving data as a receiver. The bus must be con-
trolled by a master device which generates the serial
clock (SCL), controls the bus access, and generates
the START and STOP conditions while the 24XX256
works as a slave. Both master and slave can operate
as a transmitter or receiver, but the master device
determines which mode is activated.

Name

8-pin
PDIP

8-pin
SOIC

8-pin

TSSOP

14-pin

TSSOP

8-pin

MSOP

8-pin

DFN

Function

User Configurable Chip Select

(NC)

3, 4, 5

1,2

Not Connected

User Configurable Chip Select

Ground

SDA

Serial Data

SCL

Serial Clock

(NC)

10, 11, 12

Not Connected

Write Protect Input

+1.8 V to 5.5 V (24AA256)
+2.5 V to 5.5 V (24LC256)
+2.5 V to 5.5 V (24FC256)

24AA256/24LC256/24FC256

DS21203J-page 6

Preliminary

2002 Microchip Technology Inc.

4.0

BUS CHARACTERISTICS

The following bus protocol has been defined:

· Data transfer may be initiated only when the bus

is not busy.

· During data transfer, the data line must remain

stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.

Accordingly, the following bus conditions have been
defined (Figure 4-1).

4.1

Bus not Busy (A)

Both data and clock lines remain HIGH.

4.2

Start Data Transfer (B)

A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition.
All commands must be preceded by a START condi-
tion.

4.3

Stop Data Transfer (C)

A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must end with a STOP condition.

4.4

Data Valid (D)

The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.

The data on the line must be changed during the LOW
period of the clock signal. There is one bit of data per
clock pulse.

Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device.

4.5

Acknowledge

Each receiving device, when addressed, is obliged to
generate an acknowledge signal after the reception of
each byte. The master device must generate an extra
clock pulse which is associated with this acknowledge
bit.

A device that acknowledges must pull down the SDA
line during the acknowledge clock pulse in such a way
that the SDA line is stable LOW during the HIGH period
of the acknowledge related clock pulse. Of course,
setup and hold times must be taken into account. Dur-
ing reads, a master must signal an end of data to the
slave by NOT generating an acknowledge bit on the
last byte that has been clocked out of the slave. In this
case, the slave (24XX256) will leave the data line HIGH
to enable the master to generate the STOP condition.

FIGURE 4-1:

DATA TRANSFER SEQUENCE ON THE SERIAL BUS

FIGURE 4-2:

ACKNOWLEDGE TIMING

Note:

The 24XX256 does not generate any
acknowledge bits if an internal
programming cycle is in progress.

ADDRESS OR

ACKNOWLEDGE

VALID

DATA

ALLOWED

TO CHANGE

STOP

CONDITION

START

CONDITION

SCL

SDA

(A)

(B)

(D)

(C)

(A)

SCL

Transmitter must release the SDA line at this point,
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.

Receiver must release the SDA line
at this point so the Transmitter can
continue sending data.

Data from transmitter

SDA

Acknowledge

Bit

Data from transmitter

2002 Microchip Technology Inc.

Preliminary

DS21203J-page 7

24AA256/24LC256/24FC256

5.0

DEVICE ADDRESSING

A control byte is the first byte received following the
start condition from the master device (Figure 5-1). The
control byte consists of a 4-bit control code. For the
24XX256, this is set as

1010

binary for read and write

operations. The next three bits of the control byte are
the chip select bits (A2, A1, A0). The chip select bits
allow the use of up to eight 24XX256 devices on the
same bus and are used to select which device is
accessed. The chip select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are, in effect, the three most significant bits of the word
address.

For the MSOP package, the A0 and A1 pins are not
connected. During device addressing, the A0 and A1
chip select bits (Figures 5-1 and 5-2) should be set to
`

'. Only two 24XX256 MSOP packages can be con-

nected to the same bus.

The last bit of the control byte defines the operation to
be performed. When set to a one, a read operation is
selected. When set to a zero, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because
only A14...A0 are used, the upper address bits are a
don't care. The upper address bits are transferred first,
followed by the less significant bits.

Following the start condition, the 24XX256 monitors the
SDA bus checking the device type identifier being
transmitted. Upon receiving a

1010

code and appro-

priate device select bits, the slave device outputs an
acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX256 will select a read or
write operation.

FIGURE 5-1:

CONTROL BYTE
FORMAT

5.1

Contiguous Addressing Across
Multiple Devices

The chip select bits A2, A1, A0 can be used to expand
the contiguous address space for up to 2 Mbit by add-
ing up to eight 24XX256s on the same bus. In this case,
software can use A0 of the control byte as address bit
A15; A1 as address bit A16; and A2 as address bit A17.
It is not possible to sequentially read across device
boundaries.

For the MSOP package, up to two 24XX256 devices
can be added for up to 512 Kbit of address space. In
this case, software can use A2 of the control byte as
address bit A17. Bits A0 (A15) and A1 (A16) of the
control byte must always be set to a logic `

' for the

MSOP.

FIGURE 5-2:

ADDRESS SEQUENCE BIT ASSIGNMENTS

ACK

R/W

Control Code

Chip Select

Bits

Slave Address

Acknowledge Bit

Start Bit

Read/Write Bit

0 R/W

CONTROL BYTE

ADDRESS HIGH BYTE

ADDRESS LOW BYTE

CONTROL

CODE

CHIP

SELECT

BITS

X = Don't Care Bit

24AA256/24LC256/24FC256

DS21203J-page 8

Preliminary

2002 Microchip Technology Inc.

6.0

WRITE OPERATIONS

6.1

Byte Write

Following the start condition from the master, the
control code (four bits), the chip select (three bits) and
the R/W bit (which is a logic low) are clocked onto the
bus by the master transmitter. This indicates to the
addressed slave receiver that the address high byte will
follow after it has generated an acknowledge bit during
the ninth clock cycle. Therefore, the next byte
transmitted by the master is the high-order byte of the
word address and will be written into the address
pointer of the 24XX256. The next byte is the least sig-
nificant address byte. After receiving another acknowl-
edge signal from the 24XX256, the master device will
transmit the data word to be written into the addressed
memory location. The 24XX256 acknowledges again
and the master generates a stop condition. This ini-
tiates the internal write cycle and during this time, the
24XX256 will not generate acknowledge signals
(Figure 6-1). If an attempt is made to write to the array
with the WP pin held high, the device will acknowledge
the command but no write cycle will occur, no data will
be written, and the device will immediately accept a
new command. After a byte write command, the inter-
nal address counter will point to the address location
following the one that was just written.

6.2

Page Write

The write control byte, word address and the first data
byte are transmitted to the 24XX256 in much the same
way as in a byte write. The exception is that instead of
generating a stop condition, the master transmits up to
63 additional bytes, which are temporarily stored in the
on-chip page buffer and will be written into memory
once the master has transmitted a stop condition. Upon
receipt of each word, the six lower address pointer bits
are internally incremented by one. If the master should

transmit more than 64 bytes prior to generating the stop
condition, the address counter will roll over and the pre-
viously received data will be overwritten. As with the
byte write operation, once the stop condition is
received, an internal write cycle will begin (Figure 6-2).
If an attempt is made to write to the array with the WP
pin held high, the device will acknowledge the com-
mand but no write cycle will occur, no data will be writ-
ten and the device will immediately accept a new
command.

6.3

Write Protection

The WP pin allows the user to write-protect the entire
array (0000-7FFF) when the pin is tied to V

. If tied to

or left floating, the write protection is disabled. The

WP pin is sampled at the STOP bit for every write
command (Figure 1-1). Toggling the WP pin after the
STOP bit will have no effect on the execution of the
write cycle.

FIGURE 6-1:

BYTE WRITE

FIGURE 6-2:

PAGE WRITE

Note:

Page write operations are limited to
writing bytes within a single physical
page, regardless of the number of
bytes actually being written. Physical
page boundaries start at addresses
that are integer multiples of the page
buffer size (or `page size') and end at
addresses that are integer multiples of
[page size - 1]. If a page write com-
mand attempts to write across a physi-
cal page boundary, the result is that the
data wraps around to the beginning of
the current page (overwriting data pre-
viously stored there), instead of being
written to the next page, as might be
expected. It is, therefore, necessary for
the application software to prevent
page write operations that would
attempt to cross a page boundary.

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

ADDRESS

HIGH BYTE

ADDRESS
LOW BYTE

DATA

X = don't care bit

S 1 0 1 0

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

ADDRESS

HIGH BYTE

ADDRESS
LOW BYTE

DATA BYTE 0

DATA BYTE 63

X = don't care bit

S 1 0 1 0

2002 Microchip Technology Inc.

Preliminary

DS21203J-page 9

24AA256/24LC256/24FC256

7.0

ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (This feature can be used to maximize bus
throughput.) Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master
sending a start condition, followed by the control byte
for a write command (R/W = 0). If the device is still busy
with the write cycle, then no ACK will be returned. If no
ACK is returned, the start bit and control byte must be
resent. If the cycle is complete, then the device will
return the ACK and the master can then proceed with
the next read or write command. See Figure 7-1 for
flow diagram.

FIGURE 7-1:

ACKNOWLEDGE
POLLING FLOW

Send

Write Command

Send Stop

Condition to

Initiate Write Cycle

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

Operation

YES

24AA256/24LC256/24FC256

DS21203J-page 10

Preliminary

2002 Microchip Technology Inc.

8.0

READ OPERATION

Read operations are initiated in much the same way as
write operations, with the exception that the R/W bit of
the control byte is set to `

'. There are three basic types

of read operations: current address read, random read
and sequential read.

8.1

Current Address Read

The 24XX256 contains an address counter that main-
tains the address of the last word accessed, internally
incremented by `

'. Therefore, if the previous read

access was to address n (n is any legal address), the
next current address read operation would access data
from address n + 1.

Upon receipt of the control byte with R/W bit set to `

the 24XX256 issues an acknowledge and transmits the
8-bit data word. The master will not acknowledge the
transfer but does generate a stop condition and the
24XX256 discontinues transmission (Figure 8-1).

FIGURE 8-1:

CURRENT ADDRESS
READ

8.2

Random Read

Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is done by sending the word address to the
24XX256 as part of a write operation (R/W bit set to
`

'). Once the word address is sent, the master gener-

ates a start condition following the acknowledge. This
terminates the write operation, but not before the inter-
nal address pointer is set. The master then issues the
control byte again but with the R/W bit set to a one. The
24XX256 will then issue an acknowledge and transmit
the 8-bit data word. The master will not acknowledge
the transfer, though it does generate a stop condition,
which causes the 24XX256 to discontinue transmission
(Figure 8-2). After a random read command, the inter-
nal address counter will point to the address location
following the one that was just read.

8.3

Sequential Read

Sequential reads are initiated in the same way as a ran-
dom read except that after the 24XX256 transmits the
first data byte, the master issues an acknowledge as
opposed to the stop condition used in a random read.
This acknowledge directs the 24XX256 to transmit the
next sequentially addressed 8-bit word (Figure 8-3).
Following the final byte transmitted to the master, the
master will NOT generate an acknowledge but will gen-
erate a stop condition. To provide sequential reads, the
24XX256 contains an internal address pointer which is
incremented by one at the completion of each opera-
tion. This address pointer allows the entire memory
contents to be serially read during one operation. The
internal address pointer will automatically roll over from
address 7FFF to address 0000 if the master acknowl-
edges the byte received from the array address 7FFF.

FIGURE 8-2:

RANDOM READ

FIGURE 8-3:

SEQUENTIAL READ

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

DATA

0 A A A 1

BYTE

2 1 0

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

O
A

CONTROL

BYTE

ADDRESS

HIGH BYTE

ADDRESS

LOW BYTE

CONTROL

BYTE

DATA

BYTE

X = Don't Care Bit

S 1 0 1 0 A A A 0

2 1 0

S 1 0 1 0 A A A 1

2 1 0

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

DATA (n)

DATA (n + 1)

DATA (n + 2)

DATA (n + X)

O
A

2002 Microchip Technology Inc.

Preliminary

DS21203J-page 11

24AA256/24LC256/24FC256

9.0

PACKAGING INFORMATION

9.1

Package Marking Information

XXXXXXXX
XXXXXNNN

YYWW

8-Lead PDIP (300 mil)

Example:

8-Lead TSSOP

Example:

8-Lead SOIC (150 mil)

Example:

XXXXXXXX
XXXXYYWW

NNN

XXXX
XYWW

NNN

8-Lead SOIC (208 mil)

Example:

24LC256

0110017

I/SM

24AA256
I/P017

0110

Legend: XX...X Customer specific information*

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week `01')

NNN

Alphanumeric traceability code

Note:

In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.

Standard device marking consists of Microchip part number, year code, week code, and traceability
code. For device marking beyond this, certain price adders apply. Please check with your Microchip
Sales Office.

XXXXXXXX

YYWWNNN

XXXXXXXX

24LC256
I/SN0110

017

4LD

I101

017

24AA256/24LC256/24FC256

DS21203J-page 12

Preliminary

2002 Microchip Technology Inc.

Package Marking Information (Continued)

14-Lead TSSOP

Example

XXXXXXXX

YYWW

NNN

Legend: XX...X Customer specific information*

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week `01')

NNN

Alphanumeric traceability code

Note:

In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.

8-Lead DFN

Example

XXXXXXXX
XXXXXXXX

YYWWNNN

24LC256

XXXXXXXX

0110017

8-Lead MSOP

Example:

XXXXXX

YWWNNN

4L256I

101017

24LC256I

0110

017

2002 Microchip Technology Inc.

Preliminary

DS21203J-page 13

24AA256/24LC256/24FC256

8-Lead Plastic Dual In-line (P) 300 mil (PDIP)

Units

INCHES*

MILLIMETERS

Dimension Limits

MIN

NOM

MAX

MIN

NOM

MAX

Number of Pins

Pitch

.100

2.54

Top to Seating Plane

.140

.155

.170

3.56

3.94

4.32

Molded Package Thickness

.115

.130

.145

2.92

3.30

3.68

Base to Seating Plane

.015

0.38

Shoulder to Shoulder Width

.300

.313

.325

7.62

7.94

8.26

Molded Package Width

.240

.250

.260

6.10

6.35

6.60

Overall Length

.360

.373

.385

9.14

9.46

9.78

Tip to Seating Plane

.125

.130

.135

3.18

3.30

3.43

Lead Thickness

.008

.012

.015

0.20

0.29

0.38

Upper Lead Width

.045

.058

.070

1.14

1.46

1.78

Lower Lead Width

.014

.018

.022

0.36

0.46

0.56

Overall Row Spacing

.310

.370

.430

7.87

9.40

10.92

Mold Draft Angle Top

Mold Draft Angle Bottom

* Controlling Parameter

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

JEDEC Equivalent: MS-001
Drawing No. C04-018

.010" (0.254mm) per side.

§ Significant Characteristic

24AA256/24LC256/24FC256

DS21203J-page 14

Preliminary

2002 Microchip Technology Inc.

8-Lead Plastic Small Outline (SN) Narrow, 150 mil (SOIC)

Foot Angle

Mold Draft Angle Bottom

Mold Draft Angle Top

0.51

0.42

0.33

.020

.017

.013

Lead Width

0.25

0.23

0.20

.010

.009

.008

Lead Thickness

0.76

0.62

0.48

.030

.025

.019

Foot Length

0.51

0.38

0.25

.020

.015

.010

Chamfer Distance

5.00

4.90

4.80

.197

.193

.189

Overall Length

3.99

3.91

3.71

.157

.154

.146

Molded Package Width

6.20

6.02

5.79

.244

.237

.228

Overall Width

0.25

0.18

0.10

.010

.007

.004

Standoff §

1.55

1.42

1.32

.061

.056

.052

Molded Package Thickness

1.75

1.55

1.35

.069

.061

.053

Overall Height

1.27

.050

Pitch

Number of Pins

MAX

NOM

MIN

MAX

NOM

MIN

Dimension Limits

MILLIMETERS

INCHES*

Units

45×

* Controlling Parameter

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010" (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057

§ Significant Characteristic

2002 Microchip Technology Inc.

Preliminary

DS21203J-page 15

24AA256/24LC256/24FC256

8-Lead Plastic Small Outline (SM) Medium, 208 mil (SOIC)

Foot Angle

Mold Draft Angle Bottom

Mold Draft Angle Top

0.51

0.43

0.36

.020

.017

.014

Lead Width

0.25

0.23

0.20

.010

.009

.008

Lead Thickness

0.76

0.64

0.51

.030

.025

.020

Foot Length

5.33

5.21

5.13

.210

.205

.202

Overall Length

5.38

5.28

5.11

.212

.208

.201

Molded Package Width

8.26

7.95

7.62

.325

.313

.300

Overall Width

0.25

0.13

0.05

.010

.005

.002

Standoff §

1.98

.078

Molded Package Thickness

2.03

.080

Overall Height

1.27

.050

Pitch

Number of Pins

MAX

NOM

MIN

MAX

NOM

MIN

Dimension Limits

MILLIMETERS

INCHES*

Units

.070

.075

.069

.074

1.78
1.75

1.97
1.88

* Controlling Parameter

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010" (0.254mm) per side.
Drawing No. C04-056

§ Significant Characteristic

24AA256/24LC256/24FC256

DS21203J-page 16

Preliminary

2002 Microchip Technology Inc.

8-Lead Plastic Thin Shrink Small Outline (ST) 4.4 mm (TSSOP)

Mold Draft Angle Bottom

Mold Draft Angle Top

0.30

0.25

0.19

.012

.010

.007

Lead Width

0.20

0.15

0.09

.008

.006

.004

Lead Thickness

0.70

0.60

0.50

.028

.024

.020

Foot Length

3.10

3.00

2.90

.122

.118

.114

Molded Package Length

4.50

4.40

4.30

.177

.173

.169

Molded Package Width

6.50

6.38

6.25

.256

.251

.246

Overall Width

0.15

0.10

0.05

.006

.004

.002

Standoff §

0.95

0.90

0.85

.037

.035

.033

Molded Package Thickness

1.10

.043

Overall Height

0.65

.026

Pitch

Number of Pins

MAX

NOM

MIN

MAX

NOM

MIN

Dimension Limits

MILLIMETERS*

INCHES

Units

Foot Angle

* Controlling Parameter

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005" (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086

§ Significant Characteristic

2002 Microchip Technology Inc.

Preliminary

DS21203J-page 17

24AA256/24LC256/24FC256

8-Lead Plastic Micro Small Outline Package (MS) (MSOP)

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

.037

.035

Footprint (Reference)

exceed .010" (0.254mm) per side.

Notes:

Drawing No. C04-111

*Controlling Parameter

Mold Draft Angle Top
Mold Draft Angle Bottom

Foot Angle

Lead Width

Lead Thickness

7
7

.004
.010

.006
.012

(F)

Dimension Limits

Overall Height
Molded Package Thickness

Molded Package Width
Overall Length
Foot Length

Standoff §
Overall Width

Number of Pins
Pitch

.016

.114
.114

.022

.118
.118

.002

.030

.193

.034

MIN

Units

.026

NOM

INCHES

1.00

0.95

0.90

.039

0.15
0.30

.008
.016

0.10
0.25

7
7

0.20
0.40

MILLIMETERS*

0.65

0.86

3.00
3.00
0.55

4.90

.044

.122

.028

.122

.038
.006

0.40

2.90
2.90

0.05

0.76

MIN

MAX

NOM

1.18

0.70

3.10
3.10

0.15

0.97

MAX

§ Significant Characteristic

.184

.200

4.67

.5.08

24AA256/24LC256/24FC256

DS21203J-page 18

Preliminary

2002 Microchip Technology Inc.

8-Lead Micro Leadframe Package (MF) 6x5 mm Body (DFN-S) (Formerly MLF-S)

NOM

.050 BSC

INCHES

.194 BSC
.184 BSC

.226 BSC

.236 BSC

.008 REF.

Overall Width

JEDEC equivalent: pending

Notes:

Drawing No. C04-113

Molded Package Width

Lead Width

*Controlling Parameter

Mold Draft Angle Top

Tie Bar Width

Lead Length

.014
.020

Dimension Limits

Molded Package Thickness

Pitch
Overall Height

Overall Length
Molded Package Length

Base Thickness

Standoff

Number of Pins

A2
A1

.000

Units

n
p

MIN

TOP VIEW

5.99 BSC

.019

.030

.014

.016
.024

0.35
0.50

.356

0.40
0.60

5.74 BSC

0.47
0.75

MILLIMETERS*

.039

.002

.031

.026

.0004

.033

0.00

MAX

MIN

1.27 BSC

0.20 REF.

4.92 BSC
4.67 BSC

0.85

0.01

0.65

0.80
0.05

1.00

MAX

NOM

BOTTOM VIEW

PIN 1

Exposed Pad Length

Exposed Pad Width

.085

.091

.097

2.16

2.31

2.46

.152

.158

.163

3.85

4.00

4.15

EXPOSED

METAL

PADS

D1 D

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side.

24AA256/24LC256/24FC256

DS21203J-page 20

Preliminary

2002 Microchip Technology Inc.

14-Lead Plastic Thin Shrink Small Outline (ST) 4.4 mm (TSSOP)

Foot Angle

Mold Draft Angle Bottom

Mold Draft Angle Top

0.30

0.25

0.19

.012

.010

.007

Lead Width

0.20

0.15

0.09

.008

.006

.004

Lead Thickness

0.70

0.60

0.50

.028

.024

.020

Foot Length

5.10

5.00

4.90

.201

.197

.193

Molded Package Length

4.50

4.40

4.30

.177

.173

.169

Molded Package Width

6.50

6.38

6.25

.256

.251

.246

Overall Width

0.15

0.10

0.05

.006

.004

.002

Standoff §

0.95

0.90

0.85

.037

.035

.033

Molded Package Thickness

1.10

.043

Overall Height

0.65

.026

Pitch

Number of Pins

MAX

NOM

MIN

MAX

NOM

MIN

Dimension Limits

MILLIMETERS*

INCHES

Units

* Controlling Parameter

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005" (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087

§ Significant Characteristic

2002 Microchip Technology Inc.

Preliminary

DS21203J-page 21

24AA256/24LC256/24FC256

Systems Information and Upgrade Hot Line

The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive any currently available upgrade kits.The
Hot Line Numbers are:

1-800-755-2345 for U.S. and most of Canada, and

1-480-792-7302 for the rest of the world.

ON-LINE SUPPORT

Microchip provides on-line support on the Microchip
World Wide Web (WWW) site.

The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape or Microsoft
Explorer. Files are also available for FTP download
from our FTP site.

Connecting to the Microchip Internet Web Site

The Microchip web site is available by using your
favorite Internet browser to attach to:

www.microchip.com

The file transfer site is available by using an FTP ser-
vice to connect to:

ftp://ftp.microchip.com

The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A vari-
ety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:

· Latest Microchip Press Releases
· Technical Support Section with Frequently Asked

Questions

· Design Tips
· Device Errata
· Job Postings
· Microchip Consultant Program Member Listing
· Links to other useful web sites related to

Microchip Products

· Conferences for products, Development Systems,

technical information and more

· Listing of seminars and events

013001

24AA256/24LC256/24FC256

DS21203J-page 22

Preliminary

2002 Microchip Technology Inc.

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this Data Sheet.

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this data sheet easy to follow? If not, why?

4. What additions to the data sheet do you think would enhance the structure and subject?

5. What deletions from the data sheet could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

8. How would you improve our software, systems, and silicon products?

To:

Technical Publications Manager

RE:

Reader Response

Total Pages Sent

From: Name

Company
Address
City / State / ZIP / Country

Telephone: (_______) _________ - _________

Application (optional):

Would you like a reply? Y N

Device:

Questions:

FAX: (______) _________ - _________

DS21203J

24AA256/24LC256/24FC256 Literature Number:

2002 Microchip Technology Inc.

Preliminary

DS21203J-page23

24AA256/24LC256/24FC256

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Sales and Support

Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

Your local Microchip sales office

The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

PART NO.

/XX

Package

Temperature

Range

Device

Device:

24AA256:

256 Kbit 1.8V I2C Serial EEPROM

24AA256T:

256 Kbit 1.8V I2C Serial EEPROM
(Tape and Reel)

24LC256:

256 Kbit 2.5V I2C Serial EEPROM

24LC256T:

256 Kbit 2.5V I2C Serial EEPROM
(Tape and Reel)

24FC256:

256 Kbit 1 MHz I2C Serial EEPROM

24FC256T:

256 Kbit 1 MHz I2C Serial EEPROM
(Tape and Reel)

Temperature Range: I

= -40°C to +85°C

= -40°C to +125°C

Package:

= Plastic DIP (300 mil body), 8-lead

= Plastic SOIC (150 mil body), 8-lead

= Plastic SOIC (208 mil body), 8-lead

= Plastic TSSOP (4.4 mm), 8-lead

ST14

= Plastic TSSOP (4.4 mm), 14-lead

= Dual, Flat, No Lead (DFN)(6x5 mm body), 8-lead

= Plastic Micro Small Outline (MSOP), 8-lead

Examples:

24AA256-I/P:

Industrial Temperature,

PDIP package.

24AA256T-I/SN: Tape and Reel,
Industrial Temp., SOIC package.

24AA256-I/ST:

Industrial Temperature,

TSSOP package.

24AA256-I/MS: Industrial Temperature,
MSOP package.

24LC256-E/P:

Extended Temperature,

PDIP package.

24LC256-I/SN:

Industrial Temperature,

SOIC package.

24LC256T-I/SN: Tape and Reel,
Industrial Temperature, SOIC package.

24LC256-I/MS: Industrial Temperature,
MSOP package.

24FC256-I/P:

Industrial Temperature,

PDIP package.

24FC256-I/SN: Industrial Temperature,
SOIC package.

24FC256T-I/SN: Tape and Reel,
Industrial Temperature, SOIC package

2002 Microchip Technology Inc.

DS21203J - page 27

Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip's products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.

Trademarks

The Microchip name and logo, the Microchip logo, FilterLab,
K

, microID, MPLAB, PIC, PICmicro, PICMASTER,

PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Tech-
nology Incorporated in the U.S.A. and other countries.

dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, MXLAB, PICC, PICDEM, PICDEM.net, rfPIC, Select
Mode and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A.

Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their
respective companies.

Printed on recycled paper.

Microchip received QS-9000 quality system

certification for its worldwide headquarters,

design and wafer fabrication facilities in

Chandler and Tempe, Arizona in July 1999

and Mountain View, California in March 2002.

The Company's quality system processes and

procedures are QS-9000 compliant for its

PICmicro

8-bit MCUs, K

code hopping

devices, Serial EEPROMs, microperipherals,

non-volatile memory and analog products. In

addition, Microchip's quality system for the

design and manufacture of development

systems is ISO 9001 certified.

DS21203J-page 28

2002 Microchip Technology Inc.

AMERICAS

Corporate Office

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com

Rocky Mountain

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966 Fax: 480-792-4338

Atlanta

500 Sugar Mill Road, Suite 200B
Atlanta, GA 30350
Tel: 770-640-0034 Fax: 770-640-0307

Boston

2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848 Fax: 978-692-3821

Chicago

333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071 Fax: 630-285-0075

Dallas

4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423 Fax: 972-818-2924

Detroit

Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260

Kokomo

2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387

Los Angeles

18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338

New York

150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Tel: 631-273-5305 Fax: 631-273-5335

San Jose

Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955

Toronto

6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509

ASIA/PACIFIC

Australia

Microchip Technology Australia Pty Ltd
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755

China - Beijing

Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100 Fax: 86-10-85282104

China - Chengdu

Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86766200 Fax: 86-28-86766599

China - Fuzhou

Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506 Fax: 86-591-7503521

China - Shanghai

Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060

China - Shenzhen

Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1315, 13/F, Shenzhen Kerry Centre,
Renminnan Lu
Shenzhen 518001, China
Tel: 86-755-2350361 Fax: 86-755-2366086

China - Hong Kong SAR

Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431

India

Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O'Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062

Japan

Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122

Korea

Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5934

Singapore

Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850

Taiwan

Microchip Technology (Barbados) Inc.,
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139

EUROPE

Denmark

Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910

France

Microchip Technology SARL
Parc d'Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79

Germany

Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44

Italy

Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883

United Kingdom

Microchip Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820

Austria

Microchip Technology Austria GmbH
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393

05/16/02

ORLDWIDE

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Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: 24FC256T

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: 24FC256T