2004 Microchip Technology Inc.
DS21813C-page 1
TC1017
Features
Space-saving 5-Pin SC-70 and SOT-23 Packages
Extremely Low Operating Current for Longer
Battery Life: 53 A (typ.)
Very Low Dropout Voltage
Rated 150 mA Output Current
Requires Only 1 F Ceramic Output Capacitance
High Output Voltage Accuracy:
0.5% (typ.)
10 s (typ.) Wake-Up Time from SHDN
Power-Saving Shutdown Mode: 0.05 A (typ.)
Overcurrent and Overtemperature Protection
Pin-Compatible Upgrade for Bipolar Regulators
Applications
Cellular/GSM/PHS Phones
Battery-Operated Systems
Portable Computers
Medical Instruments
Electronic Games
Pagers
General Description
The TC1017 is a high-accuracy (typically 0.5%)
CMOS upgrade for bipolar low dropout regulators
(LDOs). It is offered in a SC-70 or SOT-23 package.
The SC-70 package represents a 50% footprint reduc-
tion versus the popular SOT-23 package and is offered
in two pinouts to make board layout easier.
Developed specifically for battery-powered systems,
the TC1017's CMOS construction consumes only
53 A typical supply current over the entire 150 mA
operating load range. This can be as much as 60 times
less than the quiescent operating current consumed by
bipolar LDOs.
The TC1017 is designed to be stable, over the entire
input voltage and output current range, with low-value
(1 F) ceramic or tantalum capacitors. This helps to
reduce board space and save cost. Additional inte-
grated features, such as shutdown, overcurrent and
overtemperature protection, further reduce the board
space and cost of the entire voltage-regulating
application.
Key performance parameters for the TC1017 include
low dropout voltage (285 mV typical at 150 mA output
current), low supply current while shutdown (0.05 A
typical) and fast stable response to sudden input
voltage and load changes.
Package Types
SC-70
1
3
4
5
2
SHDN NC
V
OUT
V
IN
GND
TC1017
SOT-23
1
2
3
5
4
NC
V
OUT
SHDN
GND
V
IN
TC1017
1
3
4
5
2
V
IN
GND
NC
V
OUT
SHDN
TC1017R
150 mA, Tiny CMOS LDO With Shutdown
TC1017
DS21813C-page 2
2004 Microchip Technology Inc.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings
Input Voltage ....................................................................6.5V
Output Voltage ..........................................(-0.3) to (V
IN
+ 0.3)
Power Dissipation ......................... Internally Limited (Note 7)
Maximum Voltage On Any Pin ..................V
IN
+ 0.3V to -0.3V
Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
PIN FUNCTION TABLE
Name
Function
SHDN
Shutdown control input.
NC
No connect
GND
Ground terminal
V
OUT
Regulated voltage output
V
IN
Unregulated supply input
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, V
IN
= V
R
+ 1V, I
L
= 100 A, C
L
= 1.0 F, SHDN > V
IH
, T
A
= +25C
Boldface type specifications apply for junction temperatures of 40C to +125C.
Parameter
Sym
Min
Typ
Max
Units
Test Conditions
Input Operating Voltage
V
IN
2.7
--
6.0
V
Note 1
Maximum Output Current
I
OUTMAX
150
--
--
mA
Output Voltage
V
OUT
V
R
2.5%
V
R
0.5%
V
R
+ 2.5%
V
Note 2
V
OUT
Temperature Coefficient
TCV
OUT
--
40
--
ppm/C
Note 3
Line Regulation
|(
V
OUT
/
V
IN
)| / V
R
--
0.04
0.2
%/V
(V
R
+ 1V) < V
IN
< 6V
Load Regulation (Note 4)
|
V
OUT
|
/ V
R
--
0.38
1.5
%
I
L
= 0.1 mA to I
OUTMAX
Dropout Voltage (Note 5)
V
IN
V
OUT
--
--
--
--
2
90
180
285
--
200
350
500
mV
I
L
= 100 A
I
L
= 50 mA
I
L
= 100 mA
I
L
= 150 mA
Supply Current
I
IN
--
53
90
A
SHDN = V
IH
, I
L
= 0
Shutdown Supply Current
I
INSD
--
0.05
2
A
SHDN = 0V
Power Supply Rejection Ratio
PSRR
--
58
--
dB
f =1 kHz, I
L
= 50 mA
Wake-Up Time
(from Shutdown Mode)
t
WK
--
10
--
s
V
IN
= 5V, I
L
= 60 mA,
C
IN
= C
OUT
=1 F,
f = 100 Hz
Note
1:
The minimum V
IN
has to meet two conditions: V
IN
2.7V and V
IN
(V
R
+ 2.5%) + V
DROPOUT
.
2:
V
R
is the regulator voltage setting. For example: V
R
= 1.8V, 2.7V, 2.8V, 3.0V.
3:
4:
Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating
effects are covered by the thermal regulation specification.
5:
Dropout voltage is defined as the input-to-output differential at which the output voltage drops 2% below its nominal
value at a 1V differential.
6:
Thermal regulation is defined as the change in output voltage at a time T after a change in power dissipation is applied,
excluding load or line regulation effects. Specifications are for a current pulse equal to I
LMAX
at V
IN
= 6V for t = 10 msec.
7:
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction-to-air (i.e., T
A
, T
J
,
JA
). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown. Please see Section 5.1 "Thermal Shutdown", for more
details
.
8:
Output current is limited to 120 mA (typ) when V
OUT
is less than 0.5V due to a load fault or short-circuit condition.
TCV
OUT
V
OUTMAX
V
OUTMIN
(
)
10
6
V
OUT
T
--------------------------------------------------------------------------------------
=
2004 Microchip Technology Inc.
DS21813C-page 3
TC1017
Settling Time
(from Shutdown mode)
t
S
--
32
--
s
V
IN
= 5V, I
L
= 60 mA,
C
IN
= 1 F,
C
OUT
= 1 F, f = 100 Hz
Output Short-Circuit Current
I
OUTSC
--
120
--
mA
V
OUT
= 0V, Average
Current (Note 8)
Thermal Regulation
V
OUT
/P
D
--
0.04
--
V/W
Notes 6, 7
Thermal Shutdown Die
Temperature
T
SD
--
160
--
C
Thermal Shutdown Hysteresis
T
SD
--
10
--
C
Output Noise
eN
--
800
--
nV/
Hz
f = 10 kHz
SHDN Input High Threshold
V
IH
45
--
--
%V
IN
V
IN
= 2.7V to 6.0V
SHDN Input Low Threshold
V
IL
--
--
15
%V
IN
V
IN
= 2.7V to 6.0V
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, V
IN
= V
R
+ 1V, I
L
= 100 A, C
L
= 1.0 F, SHDN > V
IH
, T
A
= +25C
Boldface type specifications apply for junction temperatures of 40C to +125C.
Parameter
Sym
Min
Typ
Max
Units
Test Conditions
Note
1:
The minimum V
IN
has to meet two conditions: V
IN
2.7V and V
IN
(V
R
+ 2.5%) + V
DROPOUT
.
2:
V
R
is the regulator voltage setting. For example: V
R
= 1.8V, 2.7V, 2.8V, 3.0V.
3:
4:
Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating
effects are covered by the thermal regulation specification.
5:
Dropout voltage is defined as the input-to-output differential at which the output voltage drops 2% below its nominal
value at a 1V differential.
6:
Thermal regulation is defined as the change in output voltage at a time T after a change in power dissipation is applied,
excluding load or line regulation effects. Specifications are for a current pulse equal to I
LMAX
at V
IN
= 6V for t = 10 msec.
7:
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction-to-air (i.e., T
A
, T
J
,
JA
). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown. Please see Section 5.1 "Thermal Shutdown", for more
details
.
8:
Output current is limited to 120 mA (typ) when V
OUT
is less than 0.5V due to a load fault or short-circuit condition.
TCV
OUT
V
OUTMAX
V
OUTMIN
(
)
10
6
V
OUT
T
--------------------------------------------------------------------------------------
=
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, V
DD
= +2.7V to +5.5V and V
SS
= GND.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Specified Temperature Range
T
A
-40
--
+85
C
Industrial Temperature parts
T
A
-40
--
+125
C
Extended Temperature parts
Operating Temperature Range
T
A
-40
--
+125
C
Storage Temperature Range
T
A
-65
--
+150
C
Thermal Package Resistances3
Thermal Resistance, 5L-SOT23
JA
--
255
--
C/W
Thermal Resistance, 5L-SC-70
JA
--
450
--
C/W
TC1017
DS21813C-page 4
2004 Microchip Technology Inc.
2.0
TYPICAL PERFORMANCE CHARACTERISTICS
Note: Unless otherwise noted, V
IN
= V
R
+ 1V, I
L
= 100 A, C
L
= 1.0 F, SHDN > V
IH
, T
A
= +25C.
FIGURE 2-1:
Dropout Voltage vs. Output
Current.
FIGURE 2-2:
Load Regulation vs.
Temperature.
FIGURE 2-3:
Supply Current vs. Input
Voltage.
FIGURE 2-4:
Dropout Voltage vs.
Temperature.
FIGURE 2-5:
Short-Circuit Current vs.
Input Voltage.
FIGURE 2-6:
Supply Current vs.
Temperature.
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0
25
50
75
100
125
150
Load Current (mA)
D
r
opout V
o
l
t
age (V
)
T
A
= +125C
T
A
= +25C
T
A
= -40C
V
OUT
= 2.85V
-0.70
-0.65
-0.60
-0.55
-0.50
-0.45
-0.40
-0.35
-0.30
-40
-15
10
35
60
85
110
Temperature (C)
Load R
e
gul
ati
on (%
)
V
OUT
= 2.85V
I
OUT
= 0-150 mA
V
IN
= 6.0V
V
IN
= 3.85V
V
IN
= 3.3V
50
51
52
53
54
55
56
57
3.3
3.6
3.9
4.2
4.5
4.8
5.1
5.4
5.7
6.0
Input Voltage (V)
S
uppl
y C
u
r
r
e
nt (
A
)
T
A
= -40C
T
A
= +25C
T
A
= +125C
V
OUT
= 2.85V
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
-40
-15
10
35
60
85
110
Temperature (C)
D
r
opout V
o
l
t
age (V
)
I
OUT
= 50 mA
I
OUT
= 100 mA
I
OUT
= 150 mA
V
OUT
= 2.85V
0
20
40
60
80
100
120
140
160
1
2
3
4
5
6
Input Voltage (V)
S
hor
t C
i
r
c
ui
t C
u
r
r
e
nt (m
A
)
V
OUT
= 2.85V
50
51
52
53
54
55
56
57
-40
-15
10
35
60
85
110
Temperature (C)
S
uppl
y C
u
r
r
e
nt (
A
)
V
IN
= 6.0V
V
IN
= 3.85V
V
IN
= 3.3V
V
OUT
= 2.85V
2004 Microchip Technology Inc.
DS21813C-page 5
TC1017
Note: Unless otherwise noted, V
IN
= V
R
+ 1V, I
L
= 100 A, C
L
= 1.0 F, SHDN > V
IH
, T
A
= +25C.
FIGURE 2-7:
Dropout Voltage vs. Output
Current.
FIGURE 2-8:
Load Regulation vs.
Temperature.
FIGURE 2-9:
Supply Current vs.
Temperature.
FIGURE 2-10:
Dropout Voltage vs.
Temperature.
FIGURE 2-11:
Supply Current vs. Input
Voltage.
FIGURE 2-12:
Output Voltage vs. Supply
Voltage.
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0
25
50
75
100
125
150
Load Current (mA)
D
r
opout V
o
l
t
age (V
)
V
OUT
= 3.30V
T
A
= +125C
T
A
= +25C
T
A
= -40C
-0.70
-0.65
-0.60
-0.55
-0.50
-0.45
-0.40
-0.35
-0.30
-40
-15
10
35
60
85
110
Temperature (C)
Load R
e
gul
ati
on (%
)
V
OUT
= 3.30V
I
OUT
= 0-150 mA
V
IN
= 6.0V
V
IN
= 4.0V
V
IN
= 4.3V
52
53
54
55
56
57
58
59
60
-40
-15
10
35
60
85
110
Temperature (C)
S
uppl
y C
u
r
r
e
nt (
A
)
V
OUT
= 3.30V
V
IN
= 4.0V
V
IN
= 4.3V
V
IN
= 6.0V
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
-40
-15
10
35
60
85
110
Temperature (C)
D
r
opout V
o
l
t
age (V
)
V
OUT
= 3.30V
I
OUT
= 150 mA
I
OUT
= 100 mA
I
OUT
= 50 mA
52
53
54
55
56
57
58
59
60
4.0
4.5
5.0
5.5
6.0
Input Voltage (V)
S
uppl
y C
u
r
r
e
nt (
A
)
T
A
= +125C
T
A
= +25C
T
A
= -40C
V
OUT
= 3.30V
2.862
2.863
2.864
2.865
2.866
2.867
2.868
2.869
3.3
3.6
3.9
4.2
4.5
4.8
5.1
5.4
5.7
6.0
Input Voltage (V)
Output V
o
ltage (V
)
V
OUT
= 2.85V
T
A
= -40C
T
A
= +25C
T
A
= +125C
TC1017
DS21813C-page 6
2004 Microchip Technology Inc.
Note: Unless otherwise noted, V
IN
= V
R
+ 1V, I
L
= 100 A, C
L
= 1.0 F, SHDN > V
IH
, T
A
= +25C.
FIGURE 2-13:
Output Voltage vs. Output
Current.
FIGURE 2-14:
Shutdown Current vs. Input
Voltage.
FIGURE 2-15:
Power Supply Rejection
Ratio vs. Frequency.
FIGURE 2-16:
Output Voltage vs.
Temperature.
FIGURE 2-17:
Output Noise vs. Frequency.
FIGURE 2-18:
Power Supply Rejection
Ratio vs. Frequency.
2.854
2.856
2.858
2.860
2.862
2.864
2.866
2.868
2.870
0
25
50
75
100
125
150
Load Current (mA)
Output V
o
ltage (V
)
V
IN
= 3.85V
V
IN
= 6.0V
V
OUT
= 2.85V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
3.3
3.6
3.9
4.2
4.5
4.8
5.1
5.4
5.7
6.0
Input Voltage (V)
S
hutdow
n C
u
r
r
e
nt (
A
)
T
A
= +25C
T
A
= +125C
V
OUT
= 2.85V
-70
-60
-50
-40
-30
-20
-10
0
0.01
0.1
1
10
100
1000
Frequency (KHz)
PSRR
(dB)
V
INDC
= 3.85V
V
INAC
= 100 mVp-p
V
OUTDC
= 2.85V
I
OUT
= 100
A
C
OUT
=1
F X7R Ceramic
2.862
2.863
2.864
2.865
2.866
2.867
2.868
2.869
-40
-15
10
35
60
85
110
Temperature (C)
Output V
o
ltage (V
)
V
IN
= 3.3V
V
IN
= 3.85V
V
IN
= 6.0V
V
OUT
= 2.85V
0.01
0.1
1
10
100
10
100
1000
10000
100000
1000000
Frequency (Hz)
Noise (V/
Hz)
V
IN
= 3.85V
V
OUT
= 2.85V
C
IN
= 1 F
C
OUT
= 1 F
I
OUT
= 40 mA
-70
-60
-50
-40
-30
-20
-10
0
0.01
0.1
1
10
100
1000
Frequency (KHz)
PSRR
(dB)
V
INDC
= 3.85V
V
INAC
= 100 mVp-p
V
OUTDC
= 2.85V
I
OUT
= 1 mA
C
OUT
= 1
F X7R Ceramic
2004 Microchip Technology Inc.
DS21813C-page 7
TC1017
Note: Unless otherwise noted, V
IN
= V
R
+ 1V, I
L
= 100 A, C
L
= 1.0 F, SHDN > V
IH
, T
A
= +25C.
FIGURE 2-19:
Power Supply Rejection
Ratio vs. Frequency.
FIGURE 2-20:
Wake-Up Response.
FIGURE 2-21:
Wake-Up Response.
FIGURE 2-22:
Load Transient Response.
FIGURE 2-23:
Load Transient Response.
FIGURE 2-24:
Line Transient Response.
-80
-70
-60
-50
-40
-30
-20
-10
0
0.01
0.1
1
10
100
1000
Frequency (KHz)
PSRR
(dB)
V
INDC
= 3.85V
V
INAC
= 100 mVp-p
V
OUTDC
= 2.85V
I
OUT
= 50 mA
C
OUT
= 1
F X7R Ceramic
V
IN
= 3.85V
C
IN
= 10 F
C
OUT
= 1 F Ceramic
Shutdow n Input
V
OUT
= 2.85V
V
IN
= 3.85V
C
IN
= 10 F
C
OUT
= 4.7 F Ceramic
Shutdow n Input
V
OUT
= 2.85V
V
IN
= 3.85V
C
IN
= 10 F
C
OUT
= 1 F Ceramic
V
OUT
= 2.85V
I
OUT
= 0.1 mA to 120 mA
V
IN
= 3.85V
C
IN
= 10 F
C
OUT
= 4.7 F Ceramic
V
OUT
= 2.85V
I
OUT
= 0.1 mA to 120 mA
C
IN
= 0 F
C
OUT
= 1.0 F Ceramic
I
LOAD
= 120 mA
V
OUT
= 2.85V
V
IN
= 3.85V to 4.85V
TC1017
DS21813C-page 8
2004 Microchip Technology Inc.
Note: Unless otherwise noted, V
IN
= V
R
+ 1V, I
L
= 100 A, C
L
= 1.0 F, SHDN > V
IH
, T
A
= +25C.
FIGURE 2-25:
Line Transient Response.
FIGURE 2-26:
Line Transient Response.
FIGURE 2-27:
Line Transient Response.
C
IN
= 0 F
C
OUT
= 4.7 F Ceramic
I
LOAD
= 120 mA
V
OUT
= 2.85V
V
IN
= 3.85V to 4.85V
C
IN
= 0 F
C
OUT
= 1 F Ceramic
I
LOAD
= 100 A
V
OUT
= 3.33V
V
IN
= 4.3V to 5.3V
C
IN
= 0 F
C
OUT
= 10 F Ceramic
I
LOAD
= 100 A
V
OUT
= 3.33V
V
IN
= 4.3V to 5.3V
2004 Microchip Technology Inc.
DS21813C-page 9
TC1017
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
3.1
Shutdown Control Input (SHDN)
The regulator is fully enabled when a logic-high is
applied to SHDN. The regulator enters shutdown when
a logic-low is applied to this input. During shutdown, the
output voltage falls to zero and the supply current is
reduced to 0.05 A (typ.)
3.2
Ground Terminal
For best performance, it is recommended that the
ground pin be tied to a ground plane.
3.3
Regulated Voltage Output (V
OUT
)
Bypass the regulated voltage output to GND with a
minimum capacitance of 1 F. A ceramic bypass
capacitor is recommended for best performance.
3.4
Unregulated Supply Input (V
IN
)
The minimum V
IN
has to meet two conditions in order
to ensure that the output maintains regulation:
V
IN
2.7V and V
IN
[(V
R
+ 2.5%) + V
DROPOUT
]. The
maximum V
IN
should be less than or equal to 6V.
Power dissipation may limit V
IN
to a lower potential in
order to maintain a junction temperature below 125C.
Refer to Section 5.0 "Thermal Considerations", for
determining junction temperature.
It is recommended that V
IN
be bypassed to GND with a
ceramic capacitor.
Pin No.
5-Pin SC-70
Pin No.
5-Pin SOT-23
5-Pin SC-70R
Symbol
Description
1
3
SHDN
Shutdown Control Input
2
4
NC
No Connect
3
2
GND
Ground Terminal
4
5
V
OUT
Regulated Voltage Output
5
1
V
IN
Unregulated Supply Input
TC1017
DS21813C-page 10
2004 Microchip Technology Inc.
4.0
DETAILED DESCRIPTION
The TC1017 is a precision, fixed-output, linear voltage
regulator. The internal linear pass element is a
P-channel MOSFET. As with all P-channel CMOS
LDOs, there is a body drain diode with the cathode
connected to V
IN
and the anode connected to V
OUT
(Figure 4-1).
As is shown in Figure 4-1, the output voltage of the
LDO is sensed and divided down internally to reduce
external component count. The internal error amplifier
has a fixed bandgap reference on the inverting input
and the sensed output voltage on the non-inverting
input. The error amplifier output will pull the gate
voltage down until the inputs of the error amplifier are
equal to regulate the output voltage.
Output overload protection is implemented by sensing
the current in the P-channel MOSFET. During a shorted
or faulted load condition in which the output voltage
falls to less than 0.5V, the output current is limited to a
typical value of 120 mA. The current-limit protection
helps prevent excessive current from damaging the
Printed Circuit Board (PCB).
An internal thermal sensing device is used to monitor
the junction temperature of the LDO. When the sensed
temperature is over the set threshold of 160C (typical),
the P-channel MOSFET is turned off. When the P-chan-
nel is off, the power dissipation internal to the device is
almost zero. The device cools until the junction temper-
ature is approximately 150C and the P-channel is
turned on. If the internal power dissipation is still high
enough for the junction to rise to 160C, it will again shut
off and cool. The maximum operating junction tempera-
ture of the device is 125C. Steady-state operation at or
near the 160C overtemperature point can lead to per-
manent damage of the device.
The output voltage V
OUT
remains stable over the entire
input operating voltage range (2.7V to 6.0V) and the
entire load range (0 mA to 150 mA). The output voltage
is sensed through an internal resistor divider and
compared with a precision internal voltage reference.
Several fixed-output voltages are available by
changing the value of the internal resistor divider.
Figure 4-2 shows a typical application circuit. The
regulator is enabled any time the shutdown input pin is
at or above V
IH
. It is shut down (disabled) any time the
shutdown input pin is below V
IL
. For applications where
the SHDN feature is not used, tie the SHDN pin directly
to the input supply voltage source. While in shutdown,
the supply current decreases to 0.006 A (typical) and
the P-channel MOSFET is turned off.
As shown in Figure 4-2, batteries have internal source
impedance. An input capacitor is used to lower the
input impedance of the LDO. In some applications, high
input impedance can cause the LDO to become
unstable. Adding more input capacitance can
compensate for this.
FIGURE 4-1:
TC1017 Block Diagram (5-Pin SC-70 Pinout).
FIGURE 4-2:
Typical Application Circuit (5-Pin SC-70 Pinout).
+
-
EA
V
OUT
V
REF
SHDN
V
IN
5
4
R
1
R
2
1
2
3
SHDN
GND
V
IN
NC
Current Limit
Over
Error
Feedback Resistors
Control
Temp.
Body
Diode
Amp
V
OUT
5
4
1
2
3
SHDN
GND
V
IN
NC
BA
TTER
Y R
SOURCE
C
IN
1 F Ceramic
C
OUT
1 F Ceramic
TC1017
Load
2004 Microchip Technology Inc.
DS21813C-page 11
TC1017
4.1
Input Capacitor
Low input source impedance is necessary for the LDO
to operate properly. When operating from batteries, or
in applications with long lead length (> 10") between
the input source and the LDO, some input capacitance
is required. A minimum of 0.1 F is recommended for
most applications and the capacitor should be placed
as close to the input of the LDO as is practical. Larger
input capacitors will help reduce the input impedance
and further reduce any high-frequency noise on the
input and output of the LDO.
4.2
Output Capacitor
A minimum output capacitance of 1 F for the TC1017
is required for stability. The Equivalent Series Resis-
tance (ESR) requirements on the output capacitor are
between 0 and 2 ohms. The output capacitor should be
located as close to the LDO output as is practical.
Ceramic materials X7R and X5R have low temperature
coefficients and are well within the acceptable ESR
range required. A typical 1 F X5R 0805 capacitor has
an ESR of 50 milli-ohms. Larger output capacitors can
be used with the TC1017 to improve dynamic behavior
and input ripple-rejection performance.
Ceramic, aluminum electrolytic or tantalum capacitor
types can be used. Since many aluminum electrolytic
capacitors freeze at approximately 30
C, ceramic or
solid tantalums are recommended for applications
operating below 25
C. When operating from sources
other than batteries, supply-noise rejection and
transient response can be improved by increasing the
value of the input and output capacitors and employing
passive filtering techniques.
4.3
Turn-On Response
The turn-on response is defined as two separate
response categories, wake-up time (t
WK
) and settling
time (t
S
).
The TC1017 has a fast wake-up time (10 sec, typical)
when released from shutdown. See Figure 4-3 for the
wake-up time designated as t
WK
. The wake-up time is
defined as the time it takes for the output to rise to 2%
of the V
OUT
value after being released from shutdown.
The total turn-on response is defined as the settling
time (t
S
) (see Figure 4-3). Settling time (inclusive with
t
WK
) is defined as the condition when the output is
within 98% of its fully-enabled value (32 sec, typical)
when released from shutdown. The settling time of the
output voltage is dependent on load conditions and
output capacitance on V
OUT
(RC response).
The table below demonstrates the typical turn-on
response timing for different input voltage power-up
frequencies: V
OUT
= 2.85V, V
IN
= 5.0V, I
OUT
= 60 mA
and C
OUT
= 1 F.
FIGURE 4-3:
Wake-Up Time from Shutdown.
Frequency
Typical (t
WK
)
Typical (t
S
)
1000 Hz
5.3 sec
14 sec
500 Hz
5.9 sec
16 sec
100 Hz
9.8 sec
32 sec
50 Hz
14.5 sec
52 sec
10 Hz
17.2 sec
77 sec
V
IH
t
S
t
WK
V
OUT
98%
2%
V
IL
SHDN
TC1017
DS21813C-page 12
2004 Microchip Technology Inc.
5.0
THERMAL CONSIDERATIONS
5.1
Thermal Shutdown
Integrated thermal protection circuitry shuts the
regulator off when the die temperature exceeds
approximately 160C. The regulator remains off until
the die temperature drops to approximately 150C.
5.2
Power Dissipation: SC-70
The TC1017 is available in the SC-70 package. The
thermal resistance for the SC-70 package is
approximately 450C/W when the copper area used in
the PCB layout is similar to the JEDEC J51-7 high ther-
mal conductivity standard or semi-G42-88 standard.
For applications with a larger or thicker copper area,
the thermal resistance can be lowered. See AN792, "A
Method to Determine How Much Power a SOT-23 Can
Dissipate in an Application", DS00792, for a method to
determine the thermal resistance for a particular appli-
cation.
The TC1017 power dissipation capability is dependant
upon several variables: input voltage, output voltage,
load current, ambient temperature and maximum
junction temperature. The absolute maximum steady-
state junction temperature is rated at +125C. The
power dissipation within the device is equal to:
EQUATION 5-1:
The V
IN
x I
GND
term is typically very small when
compared to the (V
IN
V
OUT
) x I
LOAD
term, simplifying
the power dissipation within the LDO to be:
EQUATION 5-2:
To determine the maximum power dissipation
capability, the following equation is used:
EQUATION 5-3:
Given the following example:
Find:
1.
Internal power dissipation:
2.
Maximum allowable ambient temperature:
3.
Maximum allowable power dissipation at
desired ambient:
In this example, the TC1017 dissipates approximately
158.5 mW and the junction temperature is raised 71C
over the ambient. The absolute maximum power
dissipation is 155 mW when given a maximum ambient
temperature of 55C.
Input voltage, output voltage or load current limits can
also be determined by substituting known values in the
power dissipation equations.
Figure 5-1 and Figure 5-2 depict typical maximum
power dissipation versus ambient temperature, as well
as typical maximum current versus ambient tempera-
ture, with a 1V input voltage to output voltage
differential, respectively.
FIGURE 5-1:
Power Dissipation vs.
Ambient Temperature (SC-70 package).
P
D
V
IN
V
OUT
(
)
I
LOAD
V
IN
I
GN D
+
=
P
D
V
IN
V
OUT
(
)
I
LOAD
=
P
DMAX
T
J_MAX
T
A_MAX
(
)
R
J A
----------------------------------------------
=
Where:
T
J_MAX
= the
maximum
junction
temperature allowed
T
A_MAX
= the maximum ambient
temperature
R
JA
= the thermal resistance from
junction to air
V
IN
=
3.0V to 4.1V
V
OUT
=
2.85V 2.5%
I
LOAD
=
120 mA (output current)
T
A
=
55C (max. desired ambient)
P
D MAX
V
IN_MAX
V
OUT_MIN
(
)
I
LOAD
=
4.1V
2.85
0.975
(
)
(
)
120mA
=
158.5mW
=
T
A_MAX
T
J_MAX
P
DM AX
R
JA
=
125
C
158.5mW
450
C/W
(
)
=
54
C
=
125
C
71
C
(
)
=
P
D
T
J_MAX
T
A
R
J A
------------------------------
=
155mW
=
125
C
55
C
450
C/W
-----------------------------------
=
0
50
100
150
200
250
300
350
400
-40
-15
10
35
60
85
110
Ambient Temperature (C)
P
o
w
e
r
D
i
ssi
pati
on (m
W
)
2004 Microchip Technology Inc.
DS21813C-page 13
TC1017
FIGURE 5-2:
Maximum Current vs.
Ambient Temperature (SC-70 package).
5.3
Power Dissipation: SOT-23
The TC1017 is also available in a SOT-23 package for
improved thermal performance. The thermal resistance
for the SOT-23 package is approximately 255C/W
when the copper area used in the printed circuit board
layout is similar to the JEDEC J51-7 low thermal
conductivity standard or semi-G42-88 standard. For
applications with a larger or thicker copper area, the
thermal resistance can be lowered. See AN792, "A
Method to Determine How Much Power a SOT-23 Can
Dissipate in an Application", DS00792, for a method to
determine the thermal resistance for a particular
application.
The TC1017 power dissipation capability is dependant
upon several variables: input voltage, output voltage,
load current, ambient temperature and maximum
junction temperature. The absolute maximum steady-
state junction temperature is rated at +125C. The
power dissipation within the device is equal to:
EQUATION 5-4:
The V
IN
x I
GND
term is typically very small when
compared to the (V
IN
V
OUT
) x I
LOAD
term, simplifying the
power dissipation within the LDO to be:
EQUATION 5-5:
To determine the maximum power dissipation
capability, the following equation is used:
EQUATION 5-6:
Given the following example:
Find:
1.
Internal power dissipation:
2.
Maximum allowable ambient temperature:
3.
Maximum allowable power dissipation at
desired ambient:
In this example, the TC1017 dissipates approximately
158.5 mW and the junction temperature is raised
40.5C over the ambient. The absolute maximum
power dissipation is 157 mW when given a maximum
ambient temperature of +85C.
Input voltage, output voltage or load current limits can
also be determined by substituting known values in the
power dissipation equations.
Figure 5-3 and Figure 5-4 depict typical maximum
power dissipation versus ambient temperature, as well
as typical maximum current versus ambient tempera-
ture with a 1V input voltage to output voltage
differential, respectively.
0
20
40
60
80
100
120
140
160
-40
-15
10
35
60
85
110
Ambient Temperature (C)
M
a
x
i
mu
m C
u
rre
n
t
(
m
A
)
V
IN
- V
OUT
= 1V
P
D
V
IN
V
OUT
(
)
I
LOAD
V
IN
I
GN D
+
=
P
D
V
IN
V
OUT
(
)
I
LOAD
=
V
IN
=
3.0V to 4.1V
V
OUT
=
2.85V 2.5%
I
LOAD
=
120 mA (output current)
T
A
=
+85C (max. desired ambient)
P
DMAX
T
J_MAX
T
A_MAX
(
)
R
JA
----------------------------------------------
=
Where:
T
J_MAX
= the maximum junction
temperature allowed
T
A_MAX
= the maximum ambient
temperature
R
JA
= the thermal resistance from
junction to air
P
DMAX
V
IN_MAX
V
OUT_MIN
(
)
I
LOAD
=
4.1V
2.85
0.975
(
)
(
)
120mA
=
158.5mW
=
T
A_MAX
T
J_MAX
P
DMAX
R
JA
=
125
C
158.5mW
255
C/W
(
)
=
84.5
C
=
125
C
40.5
C
(
)
=
P
D
T
J_MAX
T
A
R
J A
------------------------------
=
157mW
=
125
C
85
C
255
C/W
-----------------------------------
=
TC1017
DS21813C-page 14
2004 Microchip Technology Inc.
FIGURE 5-3:
Power Dissipation vs.
Ambient Temperature (SOT-23 Package).
FIGURE 5-4:
Maximum Current vs.
Ambient Temperature (SOT-23 Package).
5.4
Layout Considerations
The primary path for heat conduction out of the SC-70/
SOT-23 package is through the package leads. Using
heavy wide traces at the pads of the device will facili-
tate the removal of the heat within the package, thus
lowering the thermal resistance R
JA
. By lowering the
thermal resistance, the maximum internal power dissi-
pation capability of the package is increased.
FIGURE 5-5:
SC-70 Package Suggested
Layout.
0
100
200
300
400
500
600
700
-40
-15
10
35
60
85
110
Ambient Temperature (C)
P
o
we
r
D
i
s
s
i
pa
t
i
on (
m
W)
0
20
40
60
80
100
120
140
160
-40
-15
10
35
60
85
110
Ambient Temperature (C)
M
axi
mu
m Cu
rren
t
(
m
A)
V
IN
- V
OUT
= 1V
SHDN
U1
V
IN
V
OUT
GND
C
1
C
2
2004 Microchip Technology Inc.
DS21813C-page 15
TC1017
6.0
PACKAGE INFORMATION
6.1
Package Marking Information
Part Number
TC1017 Pinout
Code
TC1017R Pinout
Code
TC1017 - 1.8VLT
CE
CU
TC1017 - 1.85VLT
CQ
DF
TC1017 - 2.5VLT
CR
CV
TC1017 - 2.6VLT
CF
CW
TC1017 - 2.7VLT
CG
CX
TC1017 - 2.8VLT
CH
CY
TC1017 - 2.85VLT
CJ
CZ
TC1017 - 2.9VLT
CK
DA
TC1017 - 3.0VLT
CL
DB
TC1017 - 3.2VLT
CC
DC
TC1017 - 3.3VLT
CM
DD
TC1017 - 4.0VLT
CP
DE
5-Pin SC-70/SC-70R
TOPSIDE
BOTTOMSIDE
X
X
N
Y
W
W
Legend: XX...X
Customer specific information*
Y
Year code (last digit of calendar year)
YY
Year code (last 2 digits of calendar year)
WW
Week code (week of January 1 is week `01')
NNN
Alphanumeric traceability code
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*
Standard device marking consists of Microchip part number, year code, week code, and traceability
code.
5-Lead SOT-23
XXNN
Part Number
Code
TC1017 - 1.8VCT
DA
TC1017 - 1.85VCT
DK
TC1017 - 2.6VCT
DB
TC1017 - 2.7VCT
DC
TC1017 - 2.8VCT
DD
TC1017 - 2.85VCT
DE
TC1017 - 2.9VCT
DF
TC1017 - 3.0VCT
DG
TC1017 - 3.3VCT
DH
TC1017 - 4.0VCT
DJ
TC1017
DS21813C-page 16
2004 Microchip Technology Inc.
5-Lead Plastic Small Outline Transistor (LT) (SC-70)
0.30
0.15
.012
.006
B
Lead Width
0.18
0.10
.007
.004
c
Lead Thickness
0.30
0.10
.012
.004
L
Foot Length
2.20
1.80
.087
.071
D
Overall Length
1.35
1.15
.053
.045
E1
Molded Package Width
2.40
1.80
.094
.071
E
Overall Width
0.10
0.00
.004
.000
A1
Standoff
1.00
0.80
.039
.031
A2
Molded Package Thickness
1.10
0.80
.043
.031
A
Overall Height
0.65 (BSC)
.026 (BSC)
p
Pitch
5
5
n
Number of Pins
MAX
NOM
MIN
MAX
NOM
MIN
Dimension Limits
MILLIMETERS*
INCHES
Units
exceed .005" (0.127mm) per side.
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
Notes:
JEITA (EIAJ) Standard: SC-70
Drawing No. C04-061
*Controlling Parameter
L
E1
E
c
D
1
B
p
A2
A1
A
Q1
Top of Molded Pkg to Lead Shoulder
Q1
.004
.016
0.10
0.40
n
2004 Microchip Technology Inc.
DS21813C-page 17
TC1017
5-Lead Plastic Small Outline Transistor (OT) (SOT-23)
10
5
0
10
5
0
Mold Draft Angle Bottom
10
5
0
10
5
0
Mold Draft Angle Top
0.50
0.43
0.35
.020
.017
.014
B
Lead Width
0.20
0.15
0.09
.008
.006
.004
c
Lead Thickness
10
5
0
10
5
0
Foot Angle
0.55
0.45
0.35
.022
.018
.014
L
Foot Length
3.10
2.95
2.80
.122
.116
.110
D
Overall Length
1.75
1.63
1.50
.069
.064
.059
E1
Molded Package Width
3.00
2.80
2.60
.118
.110
.102
E
Overall Width
0.15
0.08
0.00
.006
.003
.000
A1
Standoff
1.30
1.10
0.90
.051
.043
.035
A2
Molded Package Thickness
1.45
1.18
0.90
.057
.046
.035
A
Overall Height
1.90
.075
p1
Outside lead pitch (basic)
0.95
.038
p
Pitch
5
5
n
Number of Pins
MAX
NOM
MIN
MAX
NOM
MIN
Dimension Limits
MILLIMETERS
INCHES*
Units
1
p
D
B
n
E
E1
L
c
A2
A
A1
p1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010" (0.254mm) per side.
JEDEC Equivalent: MO-178
Drawing No. C04-091
Significant Characteristic
TC1017
DS21813C-page 18
2004 Microchip Technology Inc.
NOTES:
2004 Microchip Technology Inc.
DS21813C-page 19
TC1017
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office
.
Sales and Support
Device:
TC1017: 150 mA Tiny CMOS LDO with Shutdown
TC1017R:150 mA Tiny CMOS LDO with Shutdown
(SC-70 only)
Voltage Options:*
(Standard)
1.8V
1.85V
2.5V
SC-70 only
2.6V
2.7V
2.8V
2.85V
2.9V
3.0V
3.2V
SC-70 only
3.3V
4.0V
* Other voltage options available. Please contact
your local Microchip sales office for details.
Temperature
Range:
V
= -40C to +125C
Package:
LTTR = 5-pin SC-70 (Tape and Reel)
CTTR = 5-pin SOT-23 (Tape and Reel)
PART NO.
X.XX
X
Temperature
Voltage
Options
Device
Range
Examples:
a)
TC1017-1.8VLTTR: 150 mA, Tiny CMOS
LDO with Shutdown,
SC-70 package.
b)
TC1017R-1.8VLTTR:150mA, Tiny CMOS
LDO with Shutdown,
SC-70R package.
c)
TC1017-2.6VCTTR: 150 mA, Tiny CMOS
LDO with Shutdown,
SOT-23 package.
d)
TC1017-2.7VLTTR: 150 mA, Tiny CMOS
LDO with Shutdown,
SC-70 package.
e)
TC1017-2.8VCTTR: 150 mA, Tiny CMOS
LDO with Shutdown,
SOT-23 package.
f)
TC1017-2.85VLTTR:150 mA, Tiny CMOS
LDO with Shutdown,
SC-70 package.
g)
TC1017-2.9VCTTR: 150 mA, Tiny CMOS
LDO with Shutdown,
SOT-23 package.
h)
TC1017-3.0VLTTR: 150 mA, Tiny CMOS
LDO with Shutdown,
SC-70 package.
i)
TC1017-3.3VCTTR: 150 mA, Tiny CMOS
LDO with Shutdown,
SOT-23 package.
j)
TC1017-4.0VLTTR: 150 mA, Tiny CMOS
LDO with Shutdown,
SC-70 package.
XXXX
Package
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
Your local Microchip sales office
2.
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com) to receive the most current information on our products.
TC1017
DS21813C-page 20
2004 Microchip Technology Inc.
NOTES:
2004 Microchip Technology Inc.
DS21813C-page 21
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip's products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
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EE
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OQ
, micro
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, MPLAB, PIC, PICmicro,
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dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as "unbreakable."
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company's quality system processes and
procedures are for its PICmicro
8-bit MCUs, K
EE
L
OQ
code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip's quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS21813C-page 22
2004 Microchip Technology Inc.
AMERICAS
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Atlanta
Alpharetta, GA
Tel: 770-640-0034
Fax: 770-640-0307
Boston
Westford, MA
Tel: 978-692-3848
Fax: 978-692-3821
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
Los Angeles
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Tel: 949-462-9523
Fax: 949-462-9608
San Jose
Mountain View, CA
Tel: 650-215-1444
Fax: 650-961-0286
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
ASIA/PACIFIC
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8676-6200
Fax: 86-28-8676-6599
China - Fuzhou
Tel: 86-591-8750-3506
Fax: 86-591-8750-3521
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
China - Shunde
Tel: 86-757-2839-5507
Fax: 86-757-2839-5571
China - Qingdao
Tel: 86-532-502-7355
Fax: 86-532-502-7205
ASIA/PACIFIC
India - Bangalore
Tel: 91-80-2229-0061
Fax: 91-80-2229-0062
India - New Delhi
Tel: 91-11-5160-8631
Fax: 91-11-5160-8632
Japan - Kanagawa
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Taiwan - Hsinchu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
EUROPE
Austria - Weis
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark - Ballerup
Tel: 45-4450-2828
Fax: 45-4485-2829
France - Massy
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany - Ismaning
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
England - Berkshire
Tel: 44-118-921-5869
Fax: 44-118-921-5820
W
ORLDWIDE
S
ALES
AND
S
ERVICE
10/20/04
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