2002 Microchip Technology Inc.

DS21458B-page 1

TC7126/A

Features

· Internal Reference with Low Temperature Drift

- TC7126: 80ppm/°C Typical

- TC7126A: 35ppm/°C Typical

· Zero Reading with Zero Input

· Low Noise: 15µV

P-P

· High Resolution: 0.05%

· Low Input Leakage Current: 1pA Typ., 10pA Max.

· Precision Null Detectors with True Polarity at Zero

· High-Impedance Differential Input

· Convenient 9V Battery Operation with Low Power

Dissipation: 500

W Typ., 900

W Max.

Applications

· Thermometry

· Bridge Readouts: Strain Gauges, Load Cells,

Null Detectors

· Digital Meters and Panel Meters:

- Voltage/Current/Ohms/Power, pH

· Digital Scales, Process Monitors

Device Selection Table

General Description

The TC7126A is a 3-1/2 digit CMOS analog-to-digital
converter (ADC) containing all the active components
necessary to construct a 0.05% resolution measure-
ment system. Seven-segment decoders, digit and
polarity drivers, voltage reference, and clock circuit are
integrated on-chip. The TC7126A directly drives a liq-
uid crystal display (LCD), and includes a backplane
driver.

A low cost, high resolution indicating meter requires
only a display, four resistors, and four capacitors. The
TC7126A's extremely low power drain and 9V battery
operation make it ideal for portable applications.

The TC7126A reduces linearity error to less than 1
count. Rollover error (the difference in readings for
equal magnitude, but opposite polarity input signals) is
below ±1 count. High-impedance differential inputs
offer 1pA leakage current and a 10

input imped-

ance. The 15

P-P

noise performance ensures a "rock

solid" reading, and the auto-zero cycle ensures a zero
display reading with a 0V input.

The TC7126A features a precision, low drift internal
voltage reference and is functionally identical to the
TC7126. A low drift external reference is not normally
required with the TC7126A.

Package

Code

Package

Temperature

Range

CPL

40-Pin PDIP

C to +70

IPL

40-Pin PDIP (TC7126 Only)

-25

C to +85

CKW

44-Pin PQFP

C to +70

CLW

44-Pin PLCC

C to +70

3-1/2 Digit Analog-to-Digital Converters

TC7126/A

DS21458B-page 2

2002 Microchip Technology Inc.

Package Type

TC7126CPL

TC7126ACPL

TC7126IPL

TC7126AIPL

OSC1

TEST

REF

ANALOG
COMMON

V+

Normal Pin

Configuration

Reverse Pin

Configuration

10's

100's

1000's

100's

OSC2

OSC3

REF

BUFF

INT

V-

BP
(Backplane)

POL

(Minus Sign)

TC7126RCPL

TC7126ARCPL

TC7126RIPL

TC7126ARIPL

100's

1000's

100's

1's

V+

POL
(Minus Sign)

1's

10's

OSC1

TEST

REF

ANALOG

COMMON

OSC2

OSC3

REF

BUFF

INT

V-

(Backplane)

NC = No Internal Connection

TC7126CKW

TC7126ACKW

12 13 14 15

17 18

44 43 42 41

39 38

ANALOG COMMON

INT

V-

19 20

21 22

OSC3

TEST

V+

OSC2

OSC1

REF

POL

ANALOG
COMMON

REF

18 19 20 21

23 24

POL

OSC1

OSC2

OSC3

TEST

25 26 27 28

BUFF

INT

TC7126CLW

TC7126ACLW

V-

V+

REF

44-Pin PQFP

44-Pin PDIP (Reverse)

44-Pin PLCC

40-Pin PDIP (Normal)

2002 Microchip Technology Inc.

DS21458B-page 5

TC7126/A

1.0

ELECTRICAL
CHARACTERISTICS

Absolute Maximum Ratings*

Supply Voltage (V+ to V-) ....................................... 15V
Analog Input Voltage (either Input) (Note 1) ... V+ to V-
Reference Input Voltage (either Input) ............ V+ to V-
Clock Input ................................................... Test to V+
Package Power Dissipation (T

70°C) (Note 2):

44-Pin PQFP............................................... 1.00W

40-Pin PLCC ............................................... 1.23W

44-Pin PDIP ................................................ 1.23W

Operating Temperature Range:

C (Commercial) Devices .................. 0°C to +70°C

I (Industrial) Devices .................... -25°C to +85°C

Storage Temperature Range .............. -65°C to +150°C

*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.

TC7126/A ELECTRICAL SPECIFICATIONS

Electrical Characteristics: V

= +9V, f

CLK

16kHz, and T

= +25°C, unless otherwise noted.

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

Input

Zero Input Reading

-000.0

±000.0

+000.0

Digital

Reading

= 0V

Full Scale = 200mV

Zero Reading Drift

0.2

V/°C

= 0V, 0°C

+70°C

Ratiometric Reading

999

999/1000

1000

Digital

Reading

= V

REF

, V

REF

= 100mV

Linearity Error

-1

±0.2

Count

Full Scale = 200mV or 2V
Max Deviation From Best Fit
Straight Line

Rollover Error

-1

±0.2

Count

- = V

200mV

Noise

P-P

= 0V, Full Scale = 200mV

Input Leakage Current

= 0V

CMRR

Common Mode Rejection Ratio

V/V

= ±1V, V

= 0V

Full Scale = 200mV

Scale Factor Temperature
Coefficient

ppm/°C

= 199mV, 0°C

+70°C

Ext. Ref. Temp Coeff. = 0ppm/°C

Analog Common

CTC

Analog Common Temperature
Coefficient

250k

Between Common and V+

0°C

+70°C ("C" Devices)

ppm/°C

TC7126

ppm/°C

TC7126A

100

ppm/°C

-25°C

+85°C ("I" Device)

(TC7126A)

Analog Common Voltage

2.7

3.05

3.35

250k

Between Common and V+

Note

Input voltages may exceed the supply voltages, provided the input current is limited to ±100

Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.

Refer to "Differential Input" discussion.

Backplane drive is in phase with segment drive for "OFF" segment, 180° out of phase for "ON" segment. Frequency is
20 times conversion rate. Average DC component is less than 50mV.

See "Typical Application".

During Auto-Zero phase, current is 10-20

A higher. A 48kHz ocillator increases current by 8

A (Typical). Common

current is not included.

TC7126/A

DS21458B-page 6

2002 Microchip Technology Inc.

LCD Drive

LCD Segment Drive Voltage

P-P

V+ to V- = 9V

LCD Backplane Drive Voltage

P-P

V+ to V- = 9V

Power Supply

Power Supply Current

100

= 0V, V+ to V- = 9V (Note 6)

TC7126/A ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: V

= +9V, f

CLK

16kHz, and T

= +25°C, unless otherwise noted.

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

Note

Input voltages may exceed the supply voltages, provided the input current is limited to ±100

Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.

Refer to "Differential Input" discussion.

Backplane drive is in phase with segment drive for "OFF" segment, 180° out of phase for "ON" segment. Frequency is
20 times conversion rate. Average DC component is less than 50mV.

See "Typical Application".

During Auto-Zero phase, current is 10-20

A higher. A 48kHz ocillator increases current by 8

A (Typical). Common

current is not included.

2002 Microchip Technology Inc.

DS21458B-page 7

TC7126/A

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

Pin Number

(40-Pin PDIP)

Normal

(Reversed)

Symbol

Description

(40)

V+

Positive supply voltage.

(39)

Activates the D section of the units display.

(38)

Activates the C section of the units display.

(37)

Activates the B section of the units display.

(36)

Activates the A section of the units display.

(35)

Activates the F section of the units display.

(34)

Activates the G section of the units display.

(33)

Activates the E section of the units display.

(32)

Activates the D section of the tens display.

(31)

Activates the C section of the tens display.

(30)

Activates the B section of the tens display.

(29)

Activates the A section of the tens display.

(28)

Activates the F section of the tens display.

(27)

Activates the E section of the tens display.

(26)

Activates the D section of the hundreds display.

(25)

Activates the B section of the hundreds display.

(24)

Activates the F section of the hundreds display.

(23)

Activates the E section of the hundreds display.

(22)

Activates both halves of the 1 in the thousands display.

(21)

POL

Activates the negative polarity display.

(20)

LCD Backplane drive output (TC7106A). Digital Ground (TC7107A).

(19)

Activates the G section of the hundreds display.

(18)

Activates the A section of the hundreds display.

(17)

Activates the C section of the hundreds display.

(16)

Activates the G section of the tens display.

(15)

V-

Negative power supply voltage.

(14)

INT

The integrating capacitor should be selected to give the maximum voltage swing that
ensures component tolerance buildup will not allow the integrator output to saturate.
When analog common is used as a reference and the conversion rate is 3 readings
per second, a 0.047

F capacitor may be used. The capacitor must have a low

dielectric constant to prevent rollover errors. See Section 6.3, Integrating Capacitor
for additional details.

(13)

BUFF

Integration resistor connection. Use a 180k

resistor for a 200mV full-scale range

and a 1.8M

resistor for a 2V full scale range.

(12)

The size of the auto-zero capacitor influences system noise. Use a 0.33

F capacitor

for 200mV full scale, and a 0.033

F capacitor for 2V full scale. See Section 6.1,

Auto-Zero Capacitor for additional details.

(11)

The analog LOW input is connected to this pin.

(10)

The analog HIGH input signal is connected to this pin.

(9)

ANALOG

COMMON

This pin is primarily used to set the Analog Common mode voltage for battery opera-
tion, or in systems where the input signal is referenced to the power supply. It also
acts as a reference voltage source. See Section 7.3, Analog Common for additional
details.

(8)

REF

See Pin 34.

TC7126/A

DS21458B-page 8

2002 Microchip Technology Inc.

(7)

REF

A 0.1

F capacitor is used in most applications. If a large Common mode voltage

exists (for example, the V

- pin is not at analog common) and a 200mV scale is

used, a 1

F capacitor is recommended and will hold the rollover error to 0.5 count.

(6)

REF

See Pin 36.

(5)

REF

The analog input required to generate a full scale output (1999 counts). Place 100mV
between Pins 35 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for
2V full scale. See Section 6.6, Reference Voltage for additional information.

(4)

TEST

Lamp test. When pulled HIGH (to V+), all segments will be turned on and the display
should read

-1888

. It may also be used as a negative supply for externally

generated decimal points. See Section 7.4, TEST for additional information.

(3)

OSC3

See Pin 40.

(2)

OSC2

See Pin 40.

(1)

OSC1

Pins 40, 39 and 38 make up the oscillator section. For a 48kHz clock (3 readings,
39 per second), connect Pin 40 to the junction of a 180k

resistor and a 50pF

capacitor. The 180k

resistor is tied to Pin 39 and the 50pF capacitor is tied to

Pin 38.

TABLE 2-1:

PIN FUNCTION TABLE (CONTINUED)

Pin Number

(40-Pin PDIP)

Normal

(Reversed)

Symbol

Description

2002 Microchip Technology Inc.

DS21458B-page 9

TC7126/A

3.0

DETAILED DESCRIPTION

(All Pin Designations Refer to 40-Pin PDIP.)

3.1

Dual Slope Conversion Principles

The TC7126A is a dual slope, integrating analog-to-
digital converter. An understanding of the dual slope
conversion technique will aid in following the detailed
TC7126/A operation theory.

The conventional dual slope converter measurement
cycle has two distinct phases:

· Input Signal Integration

· Reference Voltage Integration (De-integration)

The input signal being converted is integrated for a fixed
time period (T

). Time is measured by counting clock

pulses. An opposite polarity constant reference voltage
is then integrated until the integrator output voltage
returns to zero. The reference integration time is directly
proportional to the input signal (T

) (see Figure 3-1).

FIGURE 3-1:

BASIC DUAL SLOPE
CONVERTER

In a simple dual slope converter, a complete conver-
sion requires the integrator output to "ramp-up" and
"ramp-down."

A simple mathematical equation relates the input sig-
nal, reference voltage and integration time

EQUATION 3-1:

For a constant V

EQUATION 3-2:

The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. Noise
immunity is an inherent benefit. Noise spikes are inte-
grated or averaged to zero during integration periods.
Integrating ADCs are immune to the large conversion
errors that plague successive approximation converters
in high noise environments. Interfering signals with fre-
quency components at multiples of the averaging period
will be attenuated. Integrating ADCs commonly operate
with the signal integration period set to a multiple of the
50Hz/60Hz power line period (see Figure 3-2).

FIGURE 3-2:

NORMAL MODE
REJECTION OF DUAL
SLOPE CONVERTER

REF

Voltage

Analog

Input

Signal

Display

Switch

Driver

Control

Logic

Integrator

Output

Clock

Counter

Polarity Control

Phase

Control

REF

1.2 V

REF

Variable

Reference

Integrate

Time

Fixed

Signal

Integrate

Time

Integrator

Comparator

Where:

= Reference voltage

= Signal integration time (fixed)

= Reference voltage integration time (variable)

(t)d

-------

Normal Mode Rejection (dB)

0.1/t

1/t

10/t

Input Frequency

t = Measurement Period

TC7126/A

DS21458B-page 10

2002 Microchip Technology Inc.

4.0

ANALOG SECTION

In addition to the basic integrate and de-integrate dual
slope cycles discussed above, the TC7126A design
incorporates an auto-zero cycle. This cycle removes
buffer amplifier, integrator and comparator offset volt-
age error terms from the conversion. A true digital zero
reading results without external adjusting potentiome-
ters. A complete conversion consists of three phases:

Auto-Zero phase

Signal Integrate phase

Reference Integrate phase

4.1

Auto-Zero Phase

During the auto-zero phase, the differential input signal
is disconnected from the circuit by opening internal
analog gates. The internal nodes are shorted to analog
common (ground) to establish a zero input condition.
Additional analog gates close a feedback loop around
the integrator and comparator. This loop permits com-
parator offset voltage error compensation. The voltage
level established on C

compensates for device offset

voltages. The auto-zero phase residual is typically
10

V to 15

V. The auto-zero cycle length is 1000 to

3000 clock periods.

4.2

Signal Integrate Phase

The auto-zero loop is entered and the internal differen-
tial inputs connect to V

+ and V

-. The differential

input signal is integrated for a fixed time period. The
TC7126/A signal integration period is 1000 clock
periods or counts. The externally set clock frequency is
divided by

four before clocking the internal counters.

The integration time period is:

EQUATION 4-1:

The differential input voltage must be within the device
Common mode range when the converter and mea-
sured system share the same power supply common
(ground). If the converter and measured system do not
share the same power supply common, V

- should be

tied to analog common.

Polarity is determined at the end of signal integrate
phase. The sign bit is a true polarity indication, in that
signals less than 1LSB are correctly determined. This
allows precision null detection limited only by device
noise and auto-zero residual offsets.

4.3

Reference Integrate Phase

The third phase is reference integrate or de-integrate.
V

- is internally connected to analog common and V

is connected across the previously charged reference
capacitor. Circuitry within the chip ensures that the
capacitor will be connected with the correct polarity to
cause the integrator output to return to zero. The time
required for the output to return to zero is proportional to
the input signal and is between 0 and 2000 counts. The
digital reading displayed is:

EQUATION 4-2:

5.0

DIGITAL SECTION

The TC7126A contains all the segment drivers neces-
sary to directly drive a 3-1/2 digit LCD, including an
LCD backplane driver. The backplane frequency is the
external clock frequency divided by 800. For 3 conver-
sions per second, the backplane frequency is 60Hz
with a 5V nominal amplitude. When a segment driver is
in phase with the backplane signal, the segment is
OFF. An out of phase segment drive signal causes the
segment to be ON (visible). This AC drive configuration
results in negligible DC voltage across each LCD seg-
ment, ensuring long LCD life. The polarity segment
driver is ON for negative analog inputs. If V

+ and V

are reversed, this indicator reverses.

On the TC7126A, when the TEST pin is pulled to V+, all
segments are turned ON and the display reads

-1888

During this mode, LCD segments have a constant DC
voltage impressed.

The display font and segment drive assignment are
shown in Figure 5-1.

FIGURE 5-1:

DISPLAY FONT AND
SEGMENT ASSIGNMENT

OSC

x 1000

Where: F

OSC

= external clock frequency.

Note:

Do not leave the display in this mode for
more than several minutes. LCDs may be
destroyed if operated with DC levels for
extended periods.

REF

1000

Display Font

1000's

100's

10's

1's

2002 Microchip Technology Inc.

DS21458B-page 11

TC7126/A

5.1

System Timing

The oscillator frequency is divided by four prior to
clocking the internal decade counters. The four-phase
measurement cycle takes a total of 4000 counts
(16,000 clock pulses). The 4000-count cycle is inde-
pendent of input signal magnitude.

Each phase of the measurement cycle has the following
length:

Auto-Zero Phase: 1000 to 3000 counts
(4000 to 12,000 clock pulses).

For signals less than full scale, the auto-zero
phase is assigned the unused reference integrate
time period.

Signal Integrate: 1000 counts
(4000 clock pulses).

This time period is fixed. The integration period is:

EQUATION 5-1:

Reference Integrate: 0 to 2000 counts
(0 to 8000 clock pulses).

The TC7126A is a drop-in replacement for the TC7126
and ICL7126, which offer a greatly improved internal
reference temperature coefficient. No external compo-
nent value changes are required to upgrade existing
designs.

6.0

COMPONENT VALUE
SELECTION

6.1

Auto-Zero Capacitor (C

)

The C

capacitor size has some influence on system

noise. A 0.47

F capacitor is recommended for 200mV

full scale applications where 1LSB is 100

V. A 0.033µF

capacitor is adequate for 2.0V full scale applications. A
mylar type dielectric capacitor is adequate.

6.2

Reference Voltage Capacitor (C

REF

)

The reference voltage, used to ramp the integrator out-
put voltage back to zero during the reference integrate
phase, is stored on C

REF

. A 0.1

F capacitor is accept-

able when V

REF

- is tied to analog common. If a large

Common mode voltage exists (V

REF

- analog com-

mon) and the application requires a 200mV full scale,
increase C

REF

to 1

F. Rollover error will be held to less

than 0.5 count. A Mylar type dielectric capacitor is
adequate.

6.3

Integrating Capacitor (C

INT

)

INT

should be selected to maximize integrator output

voltage swing without causing output saturation. Due to
the TC7126A's superior analog

common temperature

coefficient specification, analog common will normally
supply the differential voltage reference. For this case,
a ±2V full scale integrator output swing is satisfactory.
For 3 readings per second (F

OSC

= 48kHz), a 0.047

µF

value is suggested. For 1 reading per second, 0.15

µF

is recommended. If a different oscillator frequency is
used, C

INT

must be changed in inverse proportion to

maintain the nominal ±2V integrator swing.

An exact expression for C

INT

is:

EQUATION 6-1:

At 3 readings per second, a 750

resistor should be

placed in series with C

INT

. This increases accuracy by

compensating for comparator delay. C

INT

must have

low dielectric absorption to minimize rollover error. A
polypropylene capacitor is recommended.

6.4

Integrating Resistor (R

INT

)

The input buffer amplifier and integrator are designed
with Class A output stages. The output stage idling cur-
rent is 6µA. The integrator and buffer can supply 1µA
drive current with negligible linearity errors. R

INT

is cho-

sen to remain in the output stage linear drive region, but
not so large that PC board leakage currents induce
errors. For a 200mV full scale, R

INT

is 180k

. A 2V full

scale requires 1.8M

Note:

OSC

= 48kHz (3 readings per sec).

= 4000

OSC

Where: F

OSC

is the externally set clock frequency.

Component

Value

Nominal Full Scale Voltage

200mV

0.33

µF

0.033

µF

INT

180k

1.8M

INT

0.047

µF

0.047

µF

INT

(4000)

OSC

INT

Where:

OSC

= Clock frequency at Pin 38

= Full scale input voltage

INT

= Integrating resistor

INT

= Desired full scale integrator output swing

TC7126/A

DS21458B-page 12

6.5

Oscillator Components

OSC

should be 50pF; R

OSC

is selected from the

equation:

EQUATION 6-2:

For a 48kHz clock (3 conversions per second),
R = 180k

Note that F

OSC

is 44 to generate the TC7126A's inter-

nal clock. The backplane drive signal is derived by
dividing F

OSC

by 800.

To achieve maximum rejection of 60Hz noise pickup,
the signal integrate period should be a multiple of
60Hz. Oscillator frequencies of 24kHz, 12kHz, 80kHz,
60kHz, 40kHz, etc. should be selected. For 50Hz rejec-
tion,

oscillator

frequencies

20kHz,

100kHz,

66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note
that 40kHz (2.5 readings per second) will reject both
50Hz and 60Hz.

6.6

Reference Voltage Selection

A full scale reading (2000 counts) requires the input
signal be twice the reference voltage.

Note:

= 2V

REF

In some applications, a scale factor other than unity
may exist between a transducer output voltage and the
required digital reading. Assume, for example, a pres-
sure transducer output for 2000lb/in

is 400mV. Rather

than dividing the input voltage by two, the reference
voltage should be set to 200mV. This permits the trans-
ducer input to be used directly.

The differential reference can also be used where a
digital zero reading is required when V

is not equal to

zero. This is common in temperature measuring instru-
mentation. A compensating offset voltage can be
applied between analog common and V

-. The trans-

ducer output is connected between V

+ and analog

common.

7.0

DEVICE PIN FUNCTIONAL
DESCRIPTION

(Pin Numbers Refer to the 40-Pin PDIP.)

7.1

Differential Signal Inputs
V

+ (Pin 31), V

- (Pin 30)

The TC7126A is designed with true differential inputs
and accepts input signals within the input stage
Common mode voltage range (V

). Typical range is

V+ 1V to V- + 1V. Common mode voltages are
removed from the system when the TC7126A operates
from a battery or floating power source (isolated from
measured system), and V

- is connected to analog

common (V

COM

) (see Figure 7-2).

In systems where Common mode voltages exist, the
TC7126A's 86 dB Common mode rejection ratio mini-
mizes error. Common mode voltages do, however,
affect the integrator output level. A worst case condition
exists if a large positive V

exists in conjunction with

a full scale negative differential signal. The negative
signal drives the integrator output positive along with
V

(see Figure 7-1). For such applications, the inte-

grator output swing can be reduced below the recom-
mended 2V full scale swing. The integrator output
will swing within 0.3V of V+ or V- without increased
linearity error.

FIGURE 7-1:

COMMON MODE
VOLTAGE REDUCES
AVAILABLE INTEGRATOR
SWING (V

COM

)

Required Full Scale Voltage*

REF

20mV

100mV

OSC

0.45

Integrator

[

Input
Buffer

= Integration capacitor

= Integration resistor

4000
F

OSC

= Integration time =

Where:

RI CI

DS21458B-page 13

TC7126/A

7.2

Differential Reference
V

REF

+ (Pin 36), V

REF

- (Pin 35)

The reference voltage can be generated anywhere
within the V+ to V- power supply range.

To prevent rollover type errors being induced by large
Common mode voltages, C

REF

should be large com-

pared to stray node capacitance.

The TC7126A offers a significantly improved analog
common temperature coefficient. This potential pro-
vides a very stable voltage, suitable for use as a refer-
ence. The temperature coefficient of analog common is
typically 35ppm/°C for the TC7126A and 80 ppm/°C for
the TC7126.

FIGURE 7-2:

COMMON MODE VOLTAGE REMOVED IN BATTERY OPERATION WITH
V

= ANALOG COMMON

7.3

Analog Common (Pin 32)

The analog common pin is set at a voltage potential
approximately 3V below V+. The potential is between
2.7V and 3.35V below V+. Analog common is tied inter-
nally to an N-channel FET capable of sinking 100

µA.

This FET will hold the common line at 3V should an
external load attempt to pull the common line toward
V+. Analog common source current is limited to 1

µA.

Therefore, analog common is easily pulled to a more
negative voltage (i.e., below V+ 3V).

The TC7126A connects the internal V

+ and V

inputs to analog common during the auto-zero phase.
During the reference integrate phase, V

- is con-

nected to analog common. If V

- is not externally con-

nected to analog common, a Common mode voltage
exists, but is rejected by the converter's 86dB Com-
mon mode rejection ratio. In battery operation, analog
common and V

- are usually connected, removing

Common mode voltage concerns. In systems where
V

- is connected to power supply ground or to a given

voltage, analog common should be connected to V

The analog common pin serves to set the analog sec-
tion reference, or common point. The TC7126A is spe-
cifically designed to operate from a battery, or in any
measurement system where input signals are not refer-
enced (float) with respect to the TC7126A's power
source. The analog common potential of V+ 3V gives
a 7V end of battery life voltage. The common potential
has a 0.001%/% voltage coefficient and a 15

output

impedance.

With sufficiently high total supply voltage (V+ V- > 7V),
analog common is a very stable potential with excellent
temperature stability (typically 35ppm/°C). This poten-
tial can be used to generate the TC7126A's reference
voltage. An external voltage reference will be unneces-
sary in most cases because of the 35ppm/°C tempera-
ture coefficient. See Section 7.5, TC7126A Internal
Voltage Reference discussion.

7.4

TEST (Pin 37)

The TEST pin potential is 5V less than V+. TEST may
be used as the negative power supply connection for
external CMOS logic. The TEST pin is tied to the inter-
nally generated negative logic supply through a 500

resistor. The TEST pin load should be no more than
1mA. See Section 5.0, Digital Section for additional
information on using TEST as a negative digital logic
supply.

f TEST is pulled HIGH (to V+), all segments plus the

minus sign will be activated. DO NOT OPERATE IN
THIS MODE FOR MORE THAN SEVERAL MINUTES.
With TEST = V+, the LCD segments are impressed
with a DC voltage which will destroy the LCD.

BUFF

INT

POL

Segment

Drive

OSC1

OSC3

OSC2

V-

V+

REF

ANALOG
COMMON

V-

V+

V-

V+

GND

Measured

System

Power

Source

LCD

TC7126A

TC7126/A

DS21458B-page 14

7.5

TC7126A Internal Voltage
Reference

The TC7126A's analog common voltage temperature
stability has been significantly improved (Figure 7-3).
The "A" version of the industry standard TC7126
device allows users to upgrade old systems and design
new systems, without external voltage references.
External R and C values do not need to be changed.
Figure 7-4 shows analog common supplying the
necessary voltage reference for the TC7126A.

FIGURE 7-3:

ANALOG COMMON TEMP.
COEFFICIENT

FIGURE 7-4:

TC7126A INTERNAL
VOLTAGE REFERENCE
CONNECTION

8.0

TYPICAL APPLICATIONS

8.1

Liquid Crystal Display Sources

Several manufacturers supply standard LCDs to inter-
face with the TC7126A, 3-1/2 digit analog-to-digital
converter.

Note:

Contact LCD manufacturer for full product listing/
specifications.

8.2

Decimal Point and Annunciator
Drive

The TEST pin is connected to the internally generated
digital logic supply ground through a 500

resistor. The

TEST pin may be used as the negative supply for exter-
nal CMOS gate segment drivers. LCD annunciators for
decimal points, low battery indication, or function indi-
cation may be added, without adding an additional sup-
ply. No more than 1mA should be supplied by the TEST
pin; its potential is approximately 5V below V+ (see
Figure 8-1).

FIGURE 8-1:

DECIMAL POINT AND
ANNUNCIATOR DRIVES

Typical

Maximum

Typical

200

180

160

140

120

100

Analog Commom

emper

ature Coefficient (ppm/

°
C)

TC7126A

ICL7136

Maximum

Specified

Maximum

Specified

ICL7126

V-

ANALOG

COMMON

TC7126A

REF

240k

10k

REF

SET V

REF

= 1/2 V

REF

V+

Manufacturer

Address/Phone

Representative

Part Numbers*

Crystaloid
Electronics

5282 Hudson Dr.
Hudson, OH 44236
216-655-2429

C5335, H5535,
T5135, SX440

AND

720 Palomar Ave.
Sunnyvale, CA 94086
408-523-8200

FE 0801
FE 0203

VGI, Inc.

1800 Vernon St., Ste. 2
Roseville, CA 95678
916-783-7878

LD-B709BZ
LD-H7992AZ

Hamlin, Inc.

612 E. Lake St.
Lake Mills,
WI 53551
414-648-2361

3902, 3933,
3903

TC7126A

V+

TEST

GND

4030

TC7126A

TEST

V+

GND

To LCD
Decimal
Point

To
Backplane

4049

Multiple Decimal Point or

Annunciator Driver

Simple Inverter for Fixed Decimal Point

or Display Annunciator

DS21458B-page 15

TC7126/A

8.3

Flat Package

The TC7126 is available in an epoxy 64-pin formed
lead package. A test socket for the TC7126ACBQ
device is available:

Part Number:

IC 51-42

Manufacturer:

Yamaichi

Distribution:

Nepenthe Distribution
2471 East Bayshore, Ste. 520
Palo Alto, CA 94043
(650) 856-9332

8.4

Ratiometric Resistance
Measurements

The TC7126A's true differential input and differential
reference make ratiometric reading possible. In a ratio-
metric operation, an unknown resistance is measured
with respect to a known standard resistance. No
accurately defined reference voltage is needed.

The unknown resistance is put in series with a known
standard and a current passed through the pair. The
voltage developed across the unknown is applied to the
input and the voltage across the known resistor is
applied to the reference input. If the unknown equals
the standard, the display will read 1000. The displayed
reading

can

determined

from

the

following

expression:

EQUATION 8-1:

The display will over range for R

UNKNOWN

2 x

STANDARD

(see Figure 8-2).

FIGURE 8-2:

LOW PARTS COUNT
RATIOMETRIC
RESISTANCE
MEASUREMENT

FIGURE 8-3:

3-1/2 DIGIT TRUE RMS AC DMM

Displayed (Reading) =

UNKNOWN

STANDARD

x 1000

REF

ANALOG
COMMON

TC7126A

LCD

STANDARD

UNKNOWN

V+

TC7126A

900k

90k

10k

20V

200V

200mV

1N4148

10M

0.02

µF

10%

47k

10%

20k

10%

6.8

µF

COM

C1 = 3pF to 10pF, Variable
C2 = 132pF, Variable

AD636

2.2

µF

0.01

µF

10k

240k

Segment

Drive

LCD

V +

V -

REF

ANALOG
COMMON

OUT

V-

DS21458B-page 17

TC7126/A

9.0

PACKAGING INFORMATION

9.1

Package Marking Information

Package marking data not available at this time.

9.2

Taping Form

PIN 1

Component Taping Orientation for 44-Pin PLCC Devices

User Direction of Feed

Standard Reel Component Orientation
for TR Suffix Device

Note: Drawing does not represent total number of pins.

Package

Carrier Width (W)

Pitch (P)

Part Per Full Reel

Reel Size

44-Pin PLCC

32 mm

24 mm

500

13 in

Carrier Tape, Number of Components Per Reel and Reel Size

Component Taping Orientation for 44-Pin PQFP Devices

User Direction of Feed

PIN 1

Standard Reel Component Orientation
for TR Suffix Device

Package

Carrier Width (W)

Pitch (P)

Part Per Full Reel

Reel Size

44-Pin PQFP

24 mm

16 mm

500

13 in

Carrier Tape, Number of Components Per Reel and Reel Size

Note: Drawing does not represent total number of pins.

TC7126/A

DS21458B-page 20

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

SALES AND SUPPORT

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

Your local Microchip sales office

The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System

PART CODE

TC7126X X XXX

A or blank*

R (reversed pins) or blank (CPL pkg only)

* "A" parts have an improved reference TC

Package Code (see Device Selection Table)

DS21458B-page 21

TC7126/A

Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip's products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.

Trademarks

The Microchip name and logo, the Microchip logo, FilterLab,
K

, microID,

MPLAB, PIC, PICmicro, PICMASTER,

PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Tech-
nology Incorporated in the U.S.A. and other countries.

dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and Total Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A.

Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their
respective companies.

Printed on recycled paper.

Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company's quality system processes and
procedures are QS-9000 compliant for its
PICmicro

8-bit MCUs, K

code hopping

devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip's quality system for the
design and manufacture of development
systems is ISO 9001 certified.

DS21458B-page 22

AMERICAS

Corporate Office

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com

Rocky Mountain

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966 Fax: 480-792-7456

Atlanta

500 Sugar Mill Road, Suite 200B
Atlanta, GA 30350
Tel: 770-640-0034 Fax: 770-640-0307

Boston

2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848 Fax: 978-692-3821

Chicago

333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071 Fax: 630-285-0075

Dallas

4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423 Fax: 972-818-2924

Detroit

Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260

Kokomo

2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387

Los Angeles

18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338

New York

150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Tel: 631-273-5305 Fax: 631-273-5335

San Jose

Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955

Toronto

6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509

ASIA/PACIFIC

Australia

Microchip Technology Australia Pty Ltd
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755

China - Beijing

Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100 Fax: 86-10-85282104

China - Chengdu

Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-6766200 Fax: 86-28-6766599

China - Fuzhou

Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506 Fax: 86-591-7503521

China - Shanghai

Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060

China - Shenzhen

Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1315, 13/F, Shenzhen Kerry Centre,
Renminnan Lu
Shenzhen 518001, China
Tel: 86-755-2350361 Fax: 86-755-2366086

Hong Kong

Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431

India

Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O'Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062

Japan

Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122

Korea

Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5934

Singapore

Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850

Taiwan

Microchip Technology Taiwan
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139

EUROPE

Denmark

Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910

France

Microchip Technology SARL
Parc d'Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79

Germany

Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44

Italy

Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883

United Kingdom

Arizona Microchip Technology Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820

03/01/02

*DS21458B*

ORLDWIDE

ALES

AND

ERVICE

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