DAC 3560C
ADVANCE INFORMATION
2
Feb. 5, 2003; 6251-588-1AI
Micronas
Contents
Page
Section
Title
4
1.
Introduction
4
1.1.
Features
4
1.2.
Target Systems
6
2.
Functional Description
6
2.1.
Digital Audio Interface (I
2
S)
7
2.2.
Clock System
7
2.3.
Control Interface
7
2.4.
Registers
8
2.5.
I
2
C Bus Interface
8
2.6.
SPI Bus Interface
8
2.7.
Noise Shaper and Multibit DAC
8
2.8.
Analog Low-Pass
8
2.9.
Analog Input
9
2.10.
Analog Audio Driver Output
9
2.11.
LDO
9
2.12.
Charge Pump
9
2.13.
Reference Block
9
2.14.
Temperature Overload Protection
9
2.15.
Power Management
9
2.16.
Click and Pop Suppression
10
3.
Control Registers
10
3.1.
Register Map
15
4.
Specifications
15
4.1.
Outline Dimensions
16
4.2.
Pin Connections and Short Descriptions
17
4.3.
Pin Descriptions
17
4.3.1.
Power Supply Pins
18
4.3.2.
Analog Reference Pins
18
4.3.3.
Analog Audio Pins
18
4.3.4.
Digital Audio Input Pins
18
4.3.5.
Control Interface Pins
18
4.3.6.
Other Pins
19
4.4.
Pin Configurations
19
4.5.
Pin Circuits
21
4.6.
Electrical Characteristics
21
4.6.1.
Absolute Maximum Ratings
22
4.6.2.
Recommended Operating Conditions
23
4.6.3.
Characteristics (LDO Mode)
26
4.6.4.
Characteristics (Non-LDO Mode)
28
4.6.5.
Terminology
29
4.6.6.
I
2
C Bus Characteristics
30
4.6.6.1.
I
2
S Bus Characteristics
31
4.6.6.2.
SPI-Bus Characteristics
32
4.6.7.
Power Consumption (LDO Mode)
Contents, continued
Page
Section
Title
ADVANCE INFORMATION
DAC 3560C
Micronas
Feb. 5, 2003; 6251-588-1AI
3
33
5.
Detailed Mode Description
33
5.1.
LDO Mode, Using the internal Low-Dropout Regulator
33
5.2.
Non-LDO Mode, Using the DAC 3560C without the LDO
34
5.3.
Headphone Common Driver
34
5.4.
Stereo, Mono Mode Operation of the DAC 3560C
35
5.4.1.
Digital Supply
35
5.4.2.
Power On/Off Sequence
36
6.
Application Circuit
38
7.
Data Sheet History
DAC 3560C
ADVANCE INFORMATION
4
Feb. 5, 2003; 6251-588-1AI
Micronas
Audio-Subsystem for Portable Applications
1. Introduction
The DAC 3560C is a single-chip, high-precision, dual
digital-to-analog converter designed for audio applica-
tions. The employed conversion technique is based on
oversampling with noise-shaping.
With Micronas' unique multibit sigma-delta technique,
less sensitivity to clock jitter, high linearity, and a supe-
rior S/N ratio have been achieved. The DAC 3560C is
controlled via SPI or I
2
C bus.
Digital audio input data is received via a versatile I
2
S
interface. The DAC 3560C provides three integrated
power audio drivers: a stereo headphone, a mono ear-
piece and a mono loudspeaker driver. Moreover, mix-
ing additional analog sources to the D/A-converted sig-
nal is supported.
For applications with a noise-critical power supply
environment, the DAC 3560C is equipped with an inte-
grated Low Drop-Out Voltage Regulator (LDO). The
LDO provides a stable 2.85 V output voltage and is
intended for supplying the headphone and earpiece
drivers. With the LDO, the Power Supply Rejection
Ratio (PSRR) of the audio outputs is improved to more
than 100 dB.
The DAC 3560C is designed for all kinds of applica-
tions in the audio and multimedia field, such as: mobile
phones, PDAs, and digital audio players.
1.1. Features
Three Integrated Short-Circuit-Protected
Power Audio Drivers:
Stereo headphone output
(25 mW at V
SUP
=2.85 V, or 80 mW at V
SUP
=5 V
respectively)
Mono earpiece output
(100 mW at V
SUP
=2.85 V, or 300 mW at
V
SUP
=5 V, respectively)
Mono loudspeaker output
(400 mW at V
SUP
=3 V, or 1.1 W at V
SUP
=5 V,
respectively)
Integrated LDO (Low Drop-Out Regulator)
100 dB PSRR
98 dB (A) Dynamic Range Multi-Bit Sigma Delta
DAC
Continuous Sample Rates from 8 kHz to 192 kHz
Capacitor-free Headset Connection
Analog Stereo and Mono Line Inputs with
Programmable Gain
I
2
C/SPI Compatible Serial Control Ports
I
2
S Digital Audio Interface
Programmable Power Management
-
30 dB to 6 dB Analog Volume, Mute
2.2 V to 5.5 V Supply Voltage
1.8 V to 5.5 V Digital I/O Voltage
Standby Mode
Zero-Power Mode (< 10
A)
PQFN40 Package
1.2. Target Systems
PDAs
Hand-held Terminals
Mobile and Cordless Phones
Portable MP3 and CD Players
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