2-183

Features

Programmable gain, network balance and
impedance

Transformerless 2-4 wire conversion

Constant current with constant voltage fallback
for long loop capability

Pin compatible with MH88632 and MH88628

Unbalance detection (Tip, Ring ground sensing)

Auto ring trip

On-Hook transmission (ANI) capability

Compatible with requirements of CCITT,
DOC/FCC and CSA/UL

Excellent power dissipation (SIL vertical
mounting)

12/16kHz meter pulse injection control

Solid State TIP/RING reversals

Applications

On/Off Premise PBX Line Cards

DID (Direct Inward Dial) Line Cards

Central Office Line Cards

Description

The Mitel MH88625 SLIC provides all of the
functions required to interface 2-wire off premise
subscriber loops to a serial TDM, PCM, switching
network of a modern PBX. The MH88625 is
manufactured using thick-film hybrid technology
which offers high voltage capability, reliability and
high density resulting in significant printed circuit
board area savings. A complete line card can be
implemented with very few external components.

SHK

N2
NATT

RRD REVC Z900 Z600 Z1 Z2 GRX1 GRX0 RX GTX1 GTX0 TX

TF2

TF1

TIP

RF2

RF1

RING

LCA

VDD

RNGC

RGND

VRLY

VEE

AGND

Matched

Feed

Resistors

Unbalance

Detection

Ring

Relay

Driver

Circuitry

And

Speech

Circuit

Tip/Ring

External

Signal

Input

Loop

Current

Set

Switch-hook

Threshold Set

Switch-hook

Detect

Impedance

Network

Ring

Filter

2-4 Wire

Conversion

Gain Adjust

VBat LGND

Reversal

ESI

ESE

ISSUE 6

April 1995

Ordering Information

MH88625

40 Pin SIL Package

C to 70

MH88625

DID/OPS SLIC

Preliminary Information

FIgure 1 - Functional Block Diagram

2-184

MH88625

Preliminary Information

Figure 2 - Pin Connections

Pin Description

Pin #

Name

Description

TIP

Tip Lead. Connects to the "Tip" lead of subscriber line.

RING

Ring Lead. Connects to the "Ring" lead of the subscriber line.

TF1

Tip Feed 1. Access point for balanced ringing. Normally connects to TF2.

TF2

Tip Feed 2. Access point for balanced ringing. Normally connects to TF1.

RF1

Ring Feed 1. Access point for balanced ringing. Normally connects to RF2.

RF2

Ring Feed 2. Access point for balanced ringing. Normally connects to RF1.

LGND

Battery Ground. V

Bat

return path. Connected to system's energy dumping ground.

LCA

Current Limit Set (Input). The current limit is set by connecting an external resistor to
ground. For 30mA default current, this pin is tied to GND

Bat

Battery Voltage. Typically -48Vdc is applied to this pin.

Internal Connection. This pin is internally connected and must be left open.

RGND

Relay Driver Ground Connection.

VRLY

Relay Supply Voltage Connection.

RRD

Ring Relay Drive (Output). Connects to ring relay coil.

RNGC

Ring Relay control (Input). A logic low enables the Ring Relay Drive (RRD) output which
activates the Ring Relay. The internal auto ring trip circuitry de-activates the relay drive
output upon detection of switch-hook.

REVC

Reversal Control (Input). A logic high reverse the internal Tip and Ring connections.

ESI

External Signal Input. 12/16kHz meter pulse input.

ESE

External Signal Enable. 12/16kHz meter pulse enable.

AGND

Analog Ground. V

and V

return path.

Z900

Z1
Z2

GTX0
GTX1

GRX0
GRX1

Z600

SHK

IC
IC
IC

VEE

VDD

TIP

RING

TF1
TF2

RF1
RF2

LGND

LCA

VBat

RGND

VRLY

RRD

RNGC

REVC

ESI

ESE

AGND

NATT

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

2-185

Preliminary Information

MH88625

NATT

Network Balance AT+T Node. Connects to N1 for a network balance impedance of AT&T
compromise (350

+ 1k

// 210nF); the device's input impedance must be set to 600

. This

node is active only when NS is at logic high. This node should be left open circuit when not
used.

Network Balance Node 1 (Input). 0.1 times the impedance between pins N1 and N2 must
match the device's input impedance, while 0.1 times the impedance between pins N1 and
AGND is the device's network balance impedance. This node is active only when NS is at
logic high. This node may be terminated when not used (i.e., NS at logic low).

Network Balance Node 2 (Output). See N1 for description.

Z900

Line Impedance 900

Node. Connects to Z1 for a line impedance of 900

. This node

should be left open circuit when not used.

Line Impedance Node 1 (Input). 0.1 times the times the impedance between pins Z1 and
Z2 is the device's line impedance. This node must always be connected.

Line Impedance Node 2 (Output). 0.1 times the times the impedance between pins Z1 and
Z2 is the device's line impedance. This node should be left open circuit when not used.

Transmit (Output). 4-Wire (AGND) referenced audio output.

Receive (Input). 4-Wire (AGND) referenced audio input.

GTX0

Transmit Gain Node 0. Connects to GTX1 for 0dB transmit gain.

GTX1

Transmit Gain Node 1. Connects to a resistor to AGND for transmit gain adjustment.

GRX0

Receive Gain Node 0. Connects to GRX1 for 0dB gain.

GRX1

Receive Gain Node 1. Connects to a resistor to AGND to receive gain adjustment.

Internal Connection. This pin is internally connected and must be left open.

Z600

Line Impedance 600

Node (Output). Connects to Z1 for a line impedance of 600

. This

pin should be left open circuit when not used.

Network Balance Setting (Input). The logic level at NS selects the network balance
impedance. A logic 0 enables an internal balance equivalent to the input impedance (Zin).
While a logic 1 enables an external balance 0.1 times the impedance between pins N1 and
AGND balanced to 0.1 times the impedance between pins N1 and N2. The impedance
between N1 and N2 must be equivalent to 10 times the input impedance (Zin).

SHK

Off-Hook Indication (Output). A logic low output indicates when the subscriber equipment
has gone Off-Hook.

Unbalance Detect (Output). A log IC low output indicates when the DC current flow in the
Tip and Ring leads is unbalanced, indicating that the subscriber equipment has grounded
the Ring lead.

36,37,38

Internal Connection. These pins are internally connected and must be left open

Negative Supply Voltage. -5V dc.

Positive Supply Voltage. +5V dc.

Pin Description (Continued)

Pin #

Name

Description

2-186

MH88625

Preliminary Information

* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.

* Typical figures are at 25

C with nominal

5V supplies for design aid only.

DC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
* Typical figures are at 25

C with nominal

5V supplies and are for design aid only.

Absolute Maximum Ratings*

Parameter

Sym

Min

Max

Units

Comments

Supply Voltage

Bat

-V

+0.3

-0.3

+0.3

6
6

V
V
V

With respect LGND

Storage Temperature

-40

+125

Recommended Operating Conditions

Parameter

Sym

Min

Typ*

Max

Units

Comments

Supply Voltage

Bat

-44

4.75

-4.75

-48

+5.0

-5.0

-60

5.25

-5.25

V
V
V

Operating Temperature

DC Electrical Characteristics

Characteristics

Sym

Min

Typ*

Max

Units

Test Conditions

Operating Loop Current

Var in loop current from nominal

Loop

mA
mA

Loop

2300

Bat

=-48V

Loop

mA
mA

Loop

, LCA -

GND

Operating Currents

Bat

25
25

mA
mA

Loop

=0 (Off-Hook),

LCA=GND
R

Loop

= open (On-

Hook)
On-Hook or Off-Hook
On-Hook or Off-Hook

Power Dissipation

300

Active
Standby/Idle

SHK

Low Level Output Voltage
High Level Output Voltage

3.7

0.5

V
V

= 400

= 40

ESE

Low Level Input Voltage
High Level Input Voltage

2.4

0.8

V
V

ESE

High Level Input Current
Low Level Input Current

20
20

=5.0V

=0.0V

2-187

Preliminary Information

MH88625

AC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
* Typical figure are at 25

C with nominal +5V supplies and are for design aid only.

Notes: Impedance set by external network of 600

or 900

default.

External network for test purposes consists of 2200

+ 8200

// 11.5nF between pins Z1 and Z2, the equivalent Z

has 1/10

the impedance and is equivalent o 220

+820

// 115nF.

Test condition uses a Z

value of 600

, 900

and the above external network.

Test conditions use a transmit and receive gain set to 0dB default and a Z

value of 600

unless otherwise stated.

"Ref" indicates reference impedance which is equivalent to the termination impedance.
"Net" indicates network balance impedance.
Refer to Table 1, 2 for TX, RX gain adjustment.

AC Electrical Characteristics

Characteristics

Sym

Min

Typ*

Max

Units

Test Conditions

TX Gain

externally adjustable

RX Gain

externally adjustable

Ringing Capability

REN

On-Hook Transmission
Signal Input Level
Gain 6

2.0

rms

Bat

=-48V

T-R load = 10k

min.

External Signal Output Level

1.75

2.25

rms

Bat

= -48V, T-R load=

200

LCA=0V, Zo-600

Gain=0dB

SHK Rise Time
Fall time

1
1

ms
ms

Dial Pulse Detection

2-Wire Termination
Impedance

600/

900

Selectable

Off-Hook Detect Threshold

2-Wire Return Loss

20
20
20

dB
dB
dB

300 to 500Hz
500 to 2500Hz
2500 to 3400Hz

Longitudinal Balance

Longitundinal to Metallic

Metallic to Longitudinal

58
53

dB
dB

200-1000Hz
3400Hz

Longitudinal Current
Capability

20mA per lead

Idle channel Noise

Rx to T-R

T-R to Tx

dBrnC
dBrnC

Transhybrid Loss

THL

200-3400Hz

Unbalanced Detect Threshold

Analog Signal Overload Level
at Tip and Ring

dBm

T-R=600

, VBat=-48V

Ringing Signal Voltage

Vrms

Ringing Frequency

Ring Trip Delay

100

Absolute Gain, Variation

+0.1

0dB at T-R, 1kHz

Relative Gain, reference to
1kHz

+0.05

300-3400Hz

Power supply Rejection Ratio

Bat

PSRR

24
24
24

1kHz, 100mVpp

MH88625

Preliminary Information

2-188

Functional Description

The SLIC uses a transformerless electronic 2-wire to
4-wire conversion which can be connected to a
Codec to interface the 2 wire subscriber loops to a
time division multiplexed (TDM) pulse code
modulated (PCM) digital switching network. For
analog applications, the Tx and Rx of the 2-4 wire
converter can be connected directly to an analog
crosspoint switch such as the MT8816. Powering of
the line is provided through precision battery feed
resistors. The MH88625 also contains control,
signalling and status circuitry which combines to
provide a complete functional solution which
simplifies the manufacture of line cards. This
circuitry is illustrated in the functional block diagram
in Fig. 1. The MH88625 is designed to be pin
compatible with Mitel's MH88632 and MH88628.
This allows a common PCB design with common
gain, input impedance and network balance.

Approvals

FCC part 68, CCITT, DOC CS-03, UL 1459,
CAN/CSA 22.2 No.225-M90 and ANSI/EIA/TIA-464-
A are system level safety standards and
performance requirements. As a component of a
system, the MH88625 is designed to comply with the
applicable requirements of these specifications.

Battery Feed

The loop current for the subscriber equipment is
sourced through a pair of matched 200

resistors

connected to the Tip and Ring. The two wire loop is
biased such that the Ring lead is 2V above V

Bat

(typically -46V) and the Tip lead is 2V below LPGD
(typically -2V) during constant voltage, constant
current mode.

The SLIC is designed for a nominal battery voltage
of -48Vdc and can provide the maximum loop current
of 45mA under the condition.

The MH88625 is designed to operate down to a
minimum of 16mA dc, with a battery voltage of -44V.
The Tip and Ring output drivers can operate within
2V of V

Bat

and LGND rails. This permits a maximum

loop range of 2300

Loop Current Setting

The MH88625 SLIC provides a constant current with
constant voltage fallback. This design feature
provides for long loop capability regardless of the
constant current setting. Refer to Graph 1.

The LCA (Loop Current Adjust) pin is an input to an
internal resistor divider network which generates a
bias voltage. The loop current is proportional to this
voltage. The loop current can be set between 20 and
45mA by various connections to the LCA pin as
illustrated in graph 2 and Figure 8. The loop current
during a fault condition will be limited to a safe level.
Primary over-current protection is inherent in the
current limiting feature of the 200

battery feed

resistors. Refer to Graph 1.

Receive and Transmit Audio Path

The audio signal of the 2-wire side is sensed
differentially across the external 200

feed resistors

and is passed on to a second differential amplifier
stage in the 2W/4W conversion block. This block
sets the transmit gain on the 4-wire side and cancels
signals originating from the receive input before
outputting the signal.

Programmable Transmit and Receive
Gain

Transmit Gain (Tip-Ring to Tx) and Receive Gain (Rx
to Tip-Ring) are programmed by connecting external
resistors (RRX and RRT) from GRXI to AGND and
from GTX1 to AGND as indicated in Figure 3 and
Tables 1 and 2. The programmable gain range is
from -12dB to +6dB; this wide range will
accommodate any loss plan. Alternatively, the
default Receive Gain of 0dB and Transmit Gain of
0dB can be obtained by connecting GRX0 to GRX1
and GTX0 to GTX1. In addition, a Receive gain of
+6dB and Transmit Gain of +6dB can be obtained by
not connecting resistors RRX and RTX. For correct
gain programming, the MH88625's Tip-Ring
impedance (Z

) must match the line termination

impedance.

For optimum performance, resistor RRX should be
physically located as close as possible to the GRX1
input pin, and resistor RTX should be physically
located as close as possible to the GTX1 input pin.

2-189

Preliminary Information

MH88625

Graph 1 - I

Loop

Characteristics

Constant

Current Region

Constant

Voltage

Region

Loop

(

)

Loop

(mA)

Two wire Port Termination Impedance

The AC termination impedance of 600 or 900

, of the

2W port, is set using active feedback paths to give
the desired relationship between the line voltage and
the line current. The loop current is sensed
differentially across the two feed resistors and
converted to a single ended signal. This signal is fed
back to the Tip/Ring driver circuitry such that
impedance in the feedback path gets reflected to the
two wire port. The MH88625's Tip-Ring impedance
(Z

) can be set to 600

, 900

or to a user selectable

value. Thus, Z

can be set to any international

requirement. The connection to Z1 determines the
input impedance. With Z1 connected to Z600, the line
impedance is set to 600

. With Z1 connected to

Z900, the line impedance is set to 900

. A user

defined impedance can be selected which is 0.1
times the impedance between Z1 and Z2. For
example, with 2200

in series with 11.5nF in parallel

with 8200

, all between Z1 and Z2, the devices line

impedance will be 220

in series with 115nF in

parallel with 820

. See Table 3 and Figures 4 & 5.

Network Balance

Transhybrid loss is maximized when the line
termination impedance and SLIC network balance
are matched. The MH88625's network balance
impedance set can be set to Z

, AT&T (350

+ 1k

//210nF) or to a user selectable value. Thus, the
network balance impedance can be set to any
international requirement, A logic level control input
NS selects the balance mode. With NS at logic low,
an internal network balance impedance is matched to
the line impedance (Z

). With NS at logic high, a user

defined network balance impedance is selected
which is 0.1 times the impedance between N1 and

AGND. For example, with 2200

in series with

11.5nF in parallel with 8200

, all between N1 and

AGND, and NS at logic high, the devices network
balance impedance is 220

in series with 115nF in

parallel with 820

; the impedance between N1 and

N2 must be equivalent to 10 times the input
impedance (Z

). In addition, with NS at logic high, an

AT&T network balance impedance can be selected
by connecting NATT to N1; in this case, no additional
network is required between N1 and N2. See Table 4
and Figure 6.

12/16kHz Meter Pulse

The MH88625 provides control of an external signal
path to the driver. A 12/16kHz continuous signal can
be applied to the ESI pin. Control of the ESE input
allows the metering signal to be transmitted to the
line.

Unbalanced Detection

The Unbalanced Detect (UD) pin goes low when the
DC current through the two battery feed resistors is
unbalanced i.e., when the average DC current into
the Ring lead exceeds the current flow out of the Tip
lead (indicating that the Ring lead has been
grounded).

When the SLIC is interfaced to ground start
subscriber equipment during the idle state, the UD
output is monitored for indication of the subscribers
Ring Ground signal. The maximum loop current
supplied by the feed circuitry under this condition is
limited.

2-190

MH88625

Preliminary Information

Figure 3 - Gain Programming with External Components

MH88625

10k

GRX0

GRX1

GTX0

GTX1

RRX

RTX

TRANSMIT GAIN

(Tip-Ring to Tx)

Example:

RTX = 38k

; AV = +4dB

RECEIVE GAIN

(RX to Tip-Ring)

Example:

RRX = 4.6k

; AV = -4dB

0.5

RTX

-----------

log

RTX

-----------

0.5

---------------------------------

0.5

RRX

-----------

log

RTX

-----------

0.5

---------------------------------

Longitudinal Balance

The longitudinal balance specifies the degree of
common mode rejection in the 2 to 4 wire direction.
Precision laser trimming of internal resistors in the
hybrid ensures good overall longitudinal balance.

The interface circuitry can operate in the presence of
induced longitudinal currents of up to 40mA at 60Hz.

Off-Hook and Dial Pulse Detection

The SHK pin goes low when the DC-loop current
exceeds a specified level. The threshold level is
internally set by the bias voltage of the switch-hook
detect circuitry.

Dial pulse can be detected by monitoring the
interruption rate at the SHK pin. These dial pulses
would be debounced by the system's software.

Ring Trip Detection

The interface permits detection of an Off-Hook
condition during the ringing. If the subscriber set
goes Off-Hook when the ringing signal has been
applied, the DC loop current flow will be detected
within approximately 100msecs and the SHK output
will go low. The ring relay is automatically disabled
by the internal hardware.

2-191

Preliminary Information

MH88625

Figure 4 - Input Impedance (Z

) Settings with Z

equal to 600 or 900

Figure 5 - Input Impedance (Z

) Settings with Z

not equal to 600 to 900

MH88625

Z900

Z600

Z900

Z600

Input impedance (Z

) set to 600

Input Impedance (Z

) set to 900

Note: Make connection between Z1 and other points as short as possible

MH88625

Z900

Z600

Notes:

1) The 10xZ

network must be set to 10 x the desired input impedance (Z

2) The network balance must be set to the desired network balance. See

section on network balance.

3) Make connection between Z1 and component as short as possible.

= 0.1 x

1/RP + S x CP

where S = j x w
and w = 2 x

x f

Example:

If RS = 2200

RP = 8200

, CP= 11.5nf

Then the input impedance (Z

) is 220

series with 820

in parallel with 115nF.

10 x Z

(RS + 1)

2-192

MH88625

Preliminary Information

Figure 6 - Network Balance Setting with NETBAL equal to Z

or AT&T

Figure 7 - Network Balance Setting with NETBAL not equal to ZNetbal or AT&T

VDD

MH88625

NATT

Network balance is set to the input

Network balance is set to the AT&T compromise

Note: Make connection between Z1 and other points as short as possible.

Impedance (Z

)

network (350

+ 1000

// 210nF) impedance.

The input impedance must be set to 600W.

MH88625

NATT

Notes:

1) The 10xZin network must be set to 10 x the desired input impedance (Z

2) The network balance must be set to the desired network balance. See

section on network balance.

3) Make connection between Z1 and component as short as possible.

VDD

10 x Z

10 x

NETBAL

ZNetbal = 0.1 x

1/RP + S x CP

where S = j x w
and w = 2 x

x f

Example:

If RS = 2200

RP = 8200

, CP= 11.5nf

Then the input impedance (Z

) is 220

series with 820

in parallel with 115nF.

(RS + 1)

2-193

Preliminary Information

MH88625

Tables 1 & 2: Transmit and Receive Gain Programming

Note 1: See Figures 3 and 4 for additional details.
Note 2: Overall gain refers to the receive path of PCM to 2-wire, and transmit path of 2-wire to PCM.

Table 3: Input Impedance Settings

Note 1: NA indicates high impedance (10k

) connection to this pin does not effect the resulting network balance.

Note 2: See Figure 4 & 5 for Applications Circuits.

Table 4: Network Balance Settings

Note 1: NA indicates high impedance (10k

) connection to this pin does not effect the resulting network balance.

Note 2:Low indicates Logic Low.
Note 3: See Figures 6 and 7 for Application Circuit.

Transmit

Gain (dB)

RTX Resistor

Value (

)

Notes

+6.0

No Resistor

+4.0

38.3k

Results in 0dB overall gain when used with Mitel A-law codec (i.e.
MT8965)

+3.7

32.4k

Results in 0dB overall gain when used with Mitel

-law codec (i.e.

MT8964)

0.0

GTX0 to GTX1

-3.0

5.49k

-6.0

3.32k

-12.0

1.43k

Receive Gain

(dB)

RRX Resistor

Value (

)

Notes

+6.0

No Resistor

0.0

GRX0 to GRX1

-3.0

5.49k

-3.7

4.87k

Results in 0dB overall gain when used with Mitel A-law codec (i.e.
MT8965)

-4.0

4.64k

Results in 0dB overall gain when used with Mitel

-law codec (i.e.

MT8964)

-6.0

3.32k

-12.0

1.43k

Z600

Z900

Resulting input impedance (Z

)

Connect Z1 to Z600

600

Connect Z1 to

Z900

Connect Z1 to

Z900

900

Connect network from Z1 to Z2

0.1 x impedance between Z1 & Z2

NS (Input)

NATT

Resulting input impedance (Z

)

Low

Equivalent to Z

High

Connect N1 to NATT

AT&T compromise (350

+ 1k

210nF)
Zin must be 600

High

Connect network from N1 to
AGND equivalent to 10 x
NETBAL. Connect network
from N1 to N2 equivalent to 10
x Z

0.1 x impedance between N1 & N2

2-194

MH88625

Preliminary Information

DTMF

DTMF tones may be transmitted and received at the
4-wire port.

DID Operation

For DID operation, the Tip and Ring reversal is
controlled by the REVC pin. A logic level one causes
Tip and Ring to be reversed. This can be controlled
by a Mitel Codec (MT896X) system drive output
(refer to Figure 9b).

High Voltage capability

Inherent in the thick-film process is the ability of the
substrate to handle high voltage. The standard Mitel
thick-film process provides dielectric strengths of
greater than 1000VAC or 1500VDC. The thick-film
process allows easy integration of surface mount
components such as the high voltage bi-polar power
transistor line drivers. This allows for simplier, less
elaborate and less expensive protection circuitry
required to handle high voltage transients and fault
conditions caused by lightning, induced voltages and
power line crossings.

On-Hook Transmission

The MH88625 provides for on-hook transmission
which supports features such as Automatic Numbers
Identification (ANI). The ANI information is a FSK
signal originating from and sent by the C.O. during
the off period of the ringing voltage being sent to the

subscribers set decodes the FSK signal and displays
the calling party's number.

Loop Length

The MH88625 can accommodate loop length of up to
2300

minimum (including the subscriber

equipment). This corresponds to approximately 8km
using 26AWG twisted pair or 15km using 24AWG
twisted pair.

OPS Operation

As shown in the application diagram, Figure 9a, the
ringing voltage, typically 90Vrms 20Hz biased at
V

Bat

, is applied to the subscriber line through an

external relay K1. Enabling of the relay is performed
by applying a logic low level to the relay driver
control input, RGNDC. Figure 9c, shows how
balanced ringing can be accommodated if required.

Central Office Operation

The MH88625 can be configured for ground start
C.O. applications with the addition of Q1, D1 and K2,
as shown in Figure 9c. Ground start requires control
of the Tip lead to remove battery ground from
subscriber loop. For loop start applications, control
of the Tip lead is not required.

C.O's perform Tip/Ring reversals to indicate that a
toll call has been dialled. The Tip/Ring reversal can
indicate a toll diversion signal.

Figure 8 - Loop Current Setting (See Graph 2)

+5V

LCA

-5V

MH88625

2-198

MH88625

Preliminary Information

Figure 9d - Suggested Protection Circuit

Figure 10 - Mechanical Data

MH88625

LINE

PRO1

SUGGESTED COMPONENTS:

F1, F2 1A, 250VAC, SLO-BLOW LITTLEFUSE 230 2AG

R1, R2, 10

, 1000V, 1/2W RESISTOR (FLAME RATED)

PRO1 SOLID STATE TRANSIENT SUPPRESSOR, EG TISP2300L, P2703AB

F1, R1 AND F2, R2 MAY BE FUSIBLE RESISTORS OR PTCS

4.20 + 0.020
(50.8 + 0.5)

0.58+0.02

(14.7+0.5)

0.12 Max
(3.1 Max)

0.010 + 0.002

(0.25 + 0.05)

0.080 Max
(2.0 Max)

Side View

0.05 + 0.01

(1.3 + 0.5)

0.05 + 0.02

(1.3 + 0.05)

0.020 + 0.05

(0.51 + 0.13)

0.100 + 0.10

(2.54 + 0.13)

0.18 + 0.02
(4.6 + 0.5)

Notes:
1) Not to scale
2) Dimensions in inches).
3) (Dimensions in millimetres).

*Dimensions to centre of pin &

tolerance non accumulative.

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: MH88625

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: MH88625