1
SP8713
Fig. 2 Block diagram
The SP8713 is a switchable divide by 64/65/72
programmable divider which is guaranteed to operate up to
1100MHz. It will operate from a supply of 2.7V to 5.25V and
requires typically 4.1mA (including the output current). It also
features a power down facility for battery economy.
The RF inputs are internally biased and should be capacitively
coupled to the signal source. The output is designed to interface
with CMOS synthesisers, such as the NJ88C50.
FEATURES
s
Operation to 1100MHz
s
Very Low Power
s
Single Supply Operation 2.7V to 5.25V
s
Power Down Facility for Battery Economy
s
Latched Modulus Control Inputs
s
Push Pull Output Drive
s
ESD Protection on All Pins
APPLICATIONS
s
Cellular Telephones
s
Cordless Telephones
s
Mobile Radio
ESD precautions must be observed
Fig. 1 Pin connections - top view
ORDERING INFORMATION
SP8713 IG MPAS Industrial Temperature Range
Miniature Plastic DIL Package
SP8713 IG MPAC As above supplied on Tape and Reel
BIAS
V
CC
2
7
5
4
D
Q
6
3
V
CC
V
EE
1
8
V
EE
POWER
DOWN
OUTPUT
MC1
MC2
RF
INPUT
(CLOCK)
DIVIDE BY
4 / 5
DIVIDE BY
16
CONTROL
LOGIC
D TYPE
D
Q
D TYPE
CK
D TYPE
250K
NOMINAL
MP8
1 8
2 7
3 6
4 5
RF INPUT
POWER DOWN
MODULUS CONTROL 2
VEE
SP8713
RF INPUT
V
MODULUS CONTROL 1
OUTPUT
CC
SP8713
1100MHz Very Low Current Three Modulus Divider
DS3934 - 4.0 November 1997
2
SP8713
ELECTRICAL CHARACTERISTICS
Guaranteed over the following conditions (unless otherwise stated):
V
CC
=+2.7V to +5.25V (with respect to V
EE
), Output load (pin 4) = 10pF, T
amb
= -40
C to +85
C (note 2)
Characteristic
Units
Conditions
Supply current
(note 3)
4.1
4.7
mA
Power down input low
Supply current
(note 3)
8
50
A
Power down input high
Power down high
V
CC
-0.5
V
CC
V
Power down low
0
V
CC
-2.0
V
Modulus control 1 high
(note 4)
0.6V
CC
V
CC
V
Divide by 64 or 72
Modulus control 1 low
(note 4)
0
0.4V
CC
V
Divide by 65 or 72
Modulus control 2 high
(note 4)
0.6V
CC
V
CC
V
Divide by 72
Modulus control 2 select low
(note 4)
0
0.4V
CC
V
Divide by 64 or 65
Max. sinewave input frequency
1100
MHz
See Figure 5
Min. sinewave input frequency
200
MHz
See Figure 5
Min. RF input voltage
50
mV RMS RF input 200MHz to
1100MHz. See Figure 5
Max. RF input voltage
200
mV RMS RF input 200MHz to
1100MHz. See Figure 5
Output level (pin 4)
500
600
mV p-p
Modulus set-up time, t
s
(notes 5,6,8)
20
ns
RF input = 1GHz
Modulus hold time, t
h
(notes 6,8)
1
ns
RF input = 1GHz
Power down time, t
pd
(notes 7,8)
10
s
See Figure 9
Power down recovery time, t
pu
(notes 7,8)
6
s
See Figure 9
NOTES
2. All electrical testing is performed at +85
C.
3. Typical values are measured at +25
C and V
CC
= +5V.
4. Modulus Control and Ratio Select are high impedance inputs which can be driven directly by standard CMOS outputs.
5. Modulus control is latched at the end of the previous cycle.
6. See Figure 4.
7. See Figure 8.
8. These parameters are not tested but are guranteed by design.
Value
Min.
Typ.
Max.
ABSOLUTE MAXIMUM RATINGS
Supply voltage (V
EE
=0V)
(note 1)
-0.5V to 7V
Control and RF inputs,
RF output (V
EE
=0V)
(note 1) -0.5V to V
CC
+0.5V
RF input current
(note 1)
10mA
Operating temperature
-40
C to +85
C
Storage temperature range
-55
C to +150
C
Maximum junction temperature
+150
C
NOTE 1. Duration <2 minutes.
3
SP8713
OPERATING NOTES
The RF inputs are biased internally and are normally coupled to the signal source with suitable capacitors.
The output stage has a novel design and is intended to drive a CMOS synthesiser input. External pull-down resistors or
circuits are not required. The SP8713 is not suitable for driving TTL or similar devices.
The device will operate down to DC frequencies for non-sinusoidal signals provided that the input slew rate is better than
100V/
s.
POWER DOWN (pin 7) is connected internally to a pull-up resistor. If the battery economy facility is not used, pin 7 should
be connected to V
EE
.
Fig. 4 Modulus control timing diagram
RF INPUT
CLOCK
MODULUS
CONTROL
INPUTS
OUTPUT
t s
t h
32 or 36
32, 33 or 36
DON'T CARE
DON'T CARE
Fig. 3 Typical input characteristics
Modulus
Modulus
Division
Control 1
Control 2
Ratio
(Pin 3)
(Pin 6)
L
L
65
H
L
64
H
H
72
L
H
72
TYPICAL
SENSITIVITY
TYPICAL
OVERLOAD
1000
800
600
400
200
0
200 400 600 800 1000 1200
* Tested as specified in table of Electrical Characteristics
FREQUENCY (MHZ)
RF INPUT VOLTAGE (mV RMS)
GUARANTEED*
OPERATING WINDOW
Table 1 Truth table
4
SP8713
Fig. 6 Typical S11 parameter for pin 1. V
CC
= +5.0V
j0.2
j0.5
j1
S11
PLOT 50 OHM
NORMALISED
f1: 130MHz
f2: 1310MHz
Fig. 5 Toggle frequency test circuit
VCC
V CC
RF INPUT
POWER
DOWN
MC 2
MC 1
RF INPUT
OUTPUT
MODULUS
CONTROL 1 INPUT
1n
1n
10n
10n
100n
C L
50
MONITOR
50
SIGNAL
SOURCE
SP8713
OUTPUT
MODULUS
CONTROL 2 INPUT
V EE
j2
-j0.2
-j0.5
-j2
-j1
f1
f2
0.2
0.5
1
2
5
SP8713
Fig. 7 Typical input impedance v. frequency
300
200
100
0
-100
-200
-300
-400
-500
-600
-700
-800
100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400
INPUT FREQUENCY (MHz)
jx ( )
R( )
jx(
)
R(
)
6
SP8713
FREQ-MHZ
130.000
153.600
177.200
200.800
224.400
248.000
271.600
295.200
318.800
342.400
366.000
389.600
413.200
436.800
460.400
484.000
507.600
531.200
554.800
578.400
602.000
625.600
649.200
672.800
696.400
720.000
743.600
767.200
790.800
814.400
838.000
861.600
885.200
908.800
932.400
956.000
979.600
1003.20
1026.80
1050.40
1074.00
1097.60
1121.20
1144.80
1168.40
1192.00
1215.60
1239.20
1262.80
1286.40
1310.00
jx (
)
-733.538
-688.623
-583.339
-545.839
-482.377
-441.798
-411.502
-369.645
-346.620
-323.129
-304.804
-280.556
-269.674
-255.279
-245.161
-234.680
-224.572
-211.375
-203.241
-194.613
-186.545
-182.049
-174.839
-168.320
-160.468
-156.267
-149.642
-145.328
-143.144
-137.557
-132.750
-129.254
-124.495
-120.568
-118.100
-113.395
-109.552
-105.975
-103.110
-99.886
-98.149
-98.605
-99.907
-100.925
-99.639
-98.425
-95.033
-92.553
-89.249
-86.081
-82.581
R (
)
255.068
153.362
153.330
115.187
88.649
80.815
71.050
56.207
39.526
41.338
38.779
39.210
23.809
21.221
27.545
23.333
22.227
19.931
17.767
17.636
14.607
12.479
13.075
12.891
12.583
11.250
10.213
10.187
11.269
11.081
10.509
10.063
10.172
10.745
10.841
10.884
12.260
12.984
14.508
16.625
19.260
22.799
23.285
21.149
18.956
16.434
14.377
13.743
12.711
12.776
12.598
Table.2 Coefficients for Fig.7
7
SP8713
Fig. 8 Power up and power down
Fig. 9 Power-down time test circuit
t
pu
t
pd
SUPPLY
CURRENT
POWER
DOWN
INPUT
VOLTAGE
CC
V
- 0.5V
0.05 I C
CURRENT
VOLTAGE
TIME
0.95 I C
CC
V
- 2.0V
SP8713
8
1
10nF
47
+
-
CURRENT SENSE
RESISTOR
POWER
SUPPLY
PULSE
GENERATOR
INPUT
OSCILLOSCOPE
PROBE POINT
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