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Mitsubishi microcomputers
M16C / 62M (80-pin version) Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
1
Description
The M16C/62M (80-pin version) group (low voltage version) of single-chip microcomputers are built using
the high-performance silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in
a 80-pin plastic molded QFP. These single-chip microcomputers operate using sophisticated instructions
featuring a high level of instruction efficiency. With 1M bytes of address space, they are capable of execut-
ing instructions at high speed. They also feature a built-in multiplier and DMAC, making them ideal for
controlling office, communications, industrial equipment, and other high-speed processing applications.
The M16C/62M (80-pin version) group (low voltage version) includes a wide range of products with different
internal memory types and sizes and various package types.
Features
Memory capacity .................................. ROM (See Figure 1.1.3. ROM Expansion)
RAM 10K to 20K bytes
Shortest instruction execution time ...... 100ns (f(X
IN
)=10MH
Z
, V
CC
=2.7V to 3.6V)
142.9ns (f(X
IN
)=7MH
Z
, V
CC
=2.2V to 3.6V, with software one-wait)
Supply voltage ..................................... 2.7V to 3.6V (f(X
IN
)=10MH
Z,
without software wait)
2.4V to 2.7V (f(X
IN
)= 7MH
Z,
without software wait)
2.2V to 2.4V (f(X
IN
)= 7MH
Z,
with software one-wait)
Low power consumption ...................... 28.5mW ( f(X
IN
)=10MH
Z
, with software one-wait, V
CC
= 3V)
Interrupts .............................................. 25 internal and 5 external interrupt sources, 4 software
interrupt sources; 7 levels (including key input interrupt)
Multifunction 16-bit timer ...................... 5 output timers + 6 input timers (3 for timer function only)
Serial I/O .............................................. 5 channels (2 for UART or clock synchronous, 1 for UART, 2 for clock synchronous)
DMAC .................................................. 2 channels (trigger: 24 sources)
A-D converter ....................................... 10 bits X 8 channels (Expandable up to 10 channels)
D-A converter ....................................... 8 bits X 2 channels
CRC calculation circuit ......................... 1 circuit
Watchdog timer .................................... 1 line
Programmable I/O ............................... 70 lines
Input port ..............................................
_______
1 line (P8
5
shared with NMI pin)
Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Note: Memory expansion mode and microprocessor mode are not supported.
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
Description
Mitsubishi microcomputers
M16C / 62M (80-pin version) Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
56
P4
2
P4
3
P5
6
P5
5
P5
4
P5
3
P5
2
P5
7
/CLK
OUT
P6
3
/T
X
D
0
P6
5
/CLK
1
P6
6
/RxD
1
P6
7
/T
X
D
1
P6
1
/CLK
0
P6
2
/RxD
0
P6
0
/CTS
0
/RTS
0
P6
4
/CTS
1
/RTS
1
/CLKS
1
P7
1
/RxD
2
/SCL/TA0
IN
/TB5
IN
P5
0
P5
1
P7
0
/TxD
2
/SDA/TA0
OUT
P2
0
P2
1
P2
2
P2
3
P2
4
P2
5
P2
6
P2
7
P3
0
P3
1
P3
2
P3
3
P3
4
P3
5
P3
6
P3
7
P4
0
P4
1
V
CC
X
IN
X
OUT
V
SS
RESET
CNVss(BYTE)
P8
7
/X
CIN
P8
6
/X
COUT
P7
6
/TA3
OUT
P7
7
/TA3
IN
P9
3
/DA
0
/TB3
IN
P9
4
/DA
1
/TB4
IN
P9
5
/ANEX0/CLK4
P9
2
/TB2
IN
/S
OUT
3
P8
2
/INT
0
P8
3
/INT
1
P8
1
/TA4
IN
P8
4
/INT
2
P8
0
/TA4
OUT
P8
5/
NMI
P0
0
P0
1
P0
2
P0
3
P0
4
P0
5
P0
6
P0
7
V
REF
AV
SS
AVcc
P10
0
/AN
0
P10
1
/AN
1
P10
2
/AN
2
P10
3
/AN
3
P10
4
/AN
4/
KI0
P10
5
/AN
5
/KI1
P10
6
/AN
6
/KI2
P10
7
/AN
7
/KI3
P9
6
/ANEX1/S
OUT
4
P9
7
/AD
TRG
/S
IN
4
P9
0
/TB0
IN
/CLK3
Pin Configuration
Figures 1.1.1 show the pin configurations (top view).
PIN CONFIGURATION (top view)
Package: 80P6S-A
Figure 1.1.1. Pin configuration (top view)
M16C/62M (80-pin version) group
(low voltage version)
Mitsubishi microcomputers
M16C / 62M (80-pin version) Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
3
Block Diagram
Figure 1.1.2 is a block diagram of the M16C/62M (80-pin version) group (low voltage version).
Block diagram of the M16C/62M (80-pin version) group (low voltage version)
Timer
Timer TA0 (16 bits)
Timer TA1 (16 bits)
Timer TA2 (16 bits)
Timer TA3 (16 bits)
Timer TA4 (16 bits)
Timer TB0 (16 bits)
Timer TB1 (16 bits)
Timer TB2 (16 bits)
Timer TB3 (16 bits)
Timer TB4 (16 bits)
Timer TB5 (16 bits)
Internal peripheral functions
Watchdog timer
(15 bits)
DMAC
(2 channels)
D-A converter
(8 bits X 2 channels)
A-D converter
(10 bits
X
8 channels
Expandable up to 10 channels)
UART/clock synchronous SI/O
(8 bits
X
3 channels)(Note 3)
System clock generator
X
IN
-X
OUT
X
CIN
-X
COUT
M16C/60 series16-bit CPU core
I/O ports
Port P0
8
Port P2
8
Port P3
8
Port P4
4
Port P5
8
Port P6
8
4
R0L
R0H
R1H
R1L
R2
R3
A0
A1
FB
R0L
R0H
R1H
R1L
R2
R3
A0
A1
FB
Registers
ISP
USP
Stack pointer
Vector table
INTB
CRC arithmetic circuit (CCITT )
(Polynomial : X
16
+X
12
+X
5
+1)
Multiplier
7
7
8
Port P10
Port P9
Port P8
Port P7
Memory
Port P8
5
ROM
(Note 1)
RAM
(Note 2)
Note 1: ROM size depends on MCU type.
Note 2: RAM size depends on MCU type.
Note 3: One of three channels is used for UART and IIC mode only.
SB
FLG
PC
Program counter
Clock synchronous SI/O
(8 bits
X
2 channels)
Flag register
Figure 1.1.2. Block diagram of M16C/62M (80-pin version) group (low voltage version)
Description
Mitsubishi microcomputers
M16C / 62M (80-pin version) Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
4
Item
Performance
Number of basic instructions
91 instructions
Shortest instruction execution time
100ns(f(X
IN
)=10MH
Z
, V
CC
=2.7V to 3.6V)
142.9ns (f(X
IN
)=7MH
Z
, V
CC
=2.2V to 3.6V, with software one-
wait)
Memory
ROM
(See the figure 1.1.3. ROM Expansion)
capacity
RAM
10K to 20K bytes
I/O port
P0 to P10 (except P8
5
)
8 bits x 6, 7 bits x 2, 4 bits x 2
Input port
P8
5
1 bit x 1
Multifunction
TA0, TA3, TA4
16 bits x 3 (timer mode, internal/external event count,
timer
one-shot timer mode and pulse width measurement mode)
TB0, TB2, TB3, TB4, TB5
16 bits x 5 (timer mode, internal/external event count
and pulse period/pulse width measurement mode)
TA1, TA2
16 bits x 2 (timer mode, internal event count and
a trigger through one-shot timer mode occurs.)
TB1
16 bits x 1 (timer mode and internal event count)
Serial I/O
UART0, UART1, UART2
(UART or clock synchronous) x 2, UART x 1(UART2)
SI/O3, SI/O4
(Clock synchronous) x 2 (SI/O3 is output only)
A-D converter
10 bits x (8 + 2) channels
D-A converter
8 bits x 2
DMAC
2 channels (trigger: 24 sources)
CRC calculation circuit
CRC-CCITT
Watchdog timer
15 bits x 1 (with prescaler)
Interrupt
25 internal and 5 external sources, 4 software sources, 7 levels
Clock generating circuit
2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Supply voltage
2.7V to 3.6V (f(X
IN
)=10MH
Z
, without software wait)
2.4V to 2.7V (f(X
IN
)= 7MH
Z
, without software wait)
2.2V to 2.4V (f(X
IN
)= 7MH
Z,
with software one-wait)
Power consumption
28.5mW (f(X
IN
) = 10MH
Z
, V
CC
=3V with software one-wait)
I/O
I/O withstand voltage
3V
characteristics Output current
1mA
Device configuration
CMOS high performance silicon gate
Package
80-pin plastic mold QFP
Note : M16C/62M (80-pin version) group (low voltage version) does not support memory expansion or
microprocessor mode.
Table 1.1.1. Performance outline of M16C/62M (80-pin version) group (low voltage version)
Performance Outline
Table 1.1.1 is a performance outline of M16C/62M (80-pin version) group (low voltage version).
Mitsubishi microcomputers
M16C / 62M (80-pin version) Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
5
Mitsubishi plans to release the following products in the M16C/62M (80-pin version) group (low voltage
version):
(1) Support for mask ROM version and flash memory version
(2) ROM capacity
(3) Package
80P6S-A
: Plastic molded QFP (mask ROM and flash memory versions)
The M16C/62M (80-pin version) group (low voltage version) products currently supported are listed in Table
1.1.2.
Table 1.1.2. M16C/62M (80-pin version) group (low voltage version)
ROM Size
(Byte)
External
ROM
128K
96K
64K
32K
Mask ROM version
Flash memory version
256K
M30621MCM-XXXGP
M30625MGM-XXXGP
M30625FGMGP
M30621FCMGP
80K
RAM capacity
ROM capacity
Package type
Remarks
Type No
As of April 2002
mask ROM version
Flash memory 3V version
M30625MGM-XXXGP
80P6S-A
256 Kbytes
20 Kbytes
M30621MCM-XXXGP
80P6S-A
128 Kbytes
10 Kbytes
M30621FCMGP
80P6S-A
128 Kbytes
10 Kbytes
M30625FGMGP
80P6S-A
256 Kbytes
20 Kbytes
Figure 1.1.3. ROM expansion
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