MITSUMI
I
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C BUS Control 4-Input 1-Output AV Switch MM1311
I
2
C BUS Control 4-Input 1-Output AV Switch
Monolithic IC MM1311
Outline
This IC is a 4-input 1-output AV switch with I
2
C control, developed for use in televisions.
Features
1. Serial control by I
2
C BUS.
2. 4 inputs, 1 output.
3. Video and audio system switches can be controlled independently.
4. 6 dB amplifier built in to video system.
5. Built-in Y/C MIX circuit.
6. Slave address can be changed : 90H or 92H.
7. Audio muting possible by external pin.
8. Maintains high impedance even when I
2
C BUS line (SDA, SCL) power supply is off.
9. Built-in 3 value discrimination function.
10. On-chip power ON reset function.
11. Two types of audio input impedance : 60k
and 30k
.
MM1311AD : 60k
MM1311BD : 30k
Package
SDIP-32A (MM1311AD, MM1311BD)
Applications
1. Television
2. Other video equipment
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
Equivalent Block Diagram
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
Pin Description
Pin No.
Name
Internal equivalent circuit diagram Pin No.
Name
Internal equivalent circuit diagram
31
MTV-V
1
V1-V
7
V2-V
13
V3-V
3
V1-Y
9
V2-Y
22
Y
IN
5
V1-C
11
V2-C
20
C
IN
32
MTV-L
2
V1-L
8
V2-L
14
V3-L
30
MTV-R
4
V1-R
10
V2-R
15
V3-R
24
L
OUT
23
R
OUT
26
BIAS
18
SCL
25
V
OUT
27
Y
OUT
29
C
OUT
17
SDA
6
S1
12
S2
16
ADR
19
Mute
Absolute Maximum Ratings
(Ta=25C)
Item
Symbol
Ratings
Units
Storage temperature
T
STG
-40~+125
C
Operating temperature
T
OPR
-20~+75
C
Power supply voltage
V
CC
12
V
Allowable power dissipation
Pd
950
mW
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
Measure
Conditions
Item
Symbol
ment pin
(unless otherwise indicated,
Min. Typ. Max. Units
Measurement Circuit Figure 1)
Operating power supply voltage
V
CC
8
9
10
V
Current consumption
I
CC
28
V
CC
=9V, no signal, no load
27
35
mA
V
OUT
output
Voltage gain
G
V
TP1
Sine wave, 1.0V
P-P
, 100kHz
5.5
6.0
6.5
dB
Frequency characteristics
F
V
TP1
Sine wave, 1.0V
P-P
, 10MHz/100kHz
-1.0
0
1.0
dB
Vn-V : Staircase, 1V
P-P
APL=10~90%
Differential gain
DG
V
TP1
Vn-Y : Staircase (luminance signal) 1V
P-P
-3
0
3
%
Vn-C : Chroma signal 0.3V
P-P
APL=10~90%
Vn-V : Staircase, 1V
P-P
APL=10~90%
Differential phase
DP
V
TP1
Vn-Y : Staircase (luminance signal) 1V
P-P
-3
0
3
deg
Vn-C : Chroma signal 0.3V
P-P
APL=10~90%
SG
Sine wave, 100kHz
Input dynamic range
D
V
1
1~3
Maximum input for total higher
1.6
1.9
V
P-P
harmonic distortion factor < 1.0%
Y
OUT
output
Voltage gain
G
Y
1
TP2
Vn-Y : Sine wave, 1.0V
P-P
, 100kHz
5.5
6.0
6.5
dB
G
Y
2
TP2
Y
IN
: Sine wave, 2.0V
P-P
, 100kHz
-0.5
0
0.5
F
Y
1
TP2
Vn-Y : Sine wave, 1.0V
P-P
Frequency characteristics
10MHz/100kHz
-1.0
0
1.0
dB
F
Y
2
TP2
Y
IN
: Sine wave, 2.0V
P-P,
10MHz/100kHz
-1.0
0
1.0
Vn-Y : Staircase, 1V
P-P
Differential gain
DG
Y
TP2
APL=10~90%
-3
0
3
%
Y
IN
: Staircase, 2V
P-P
, APL=10~90%
Vn-Y : Staircase, 1V
P-P
Differential phase
DP
Y
TP2
APL=10~90%
-3
0
3
deg
Y
IN
: Staircase, 2V
P-P
, APL=10~90%
Vn-Y : Sine wave100kHz
D
Y
1
SG2
Maximum input for total higher
1.6
1.9
Input dynamic range
harmonic distortion factor < 1.0%
V
P-P
Y
IN
: Sine wave, 100kHz
D
Y
2
SG4
Maximum input for total higher
3.2
3.8
harmonic distortion factor < 1.0%
Output impedance
Z
OY
50
C
OUT
output
Voltage gain
G
C
1
TP3
Vn-C : Sine wave, 1.0V
P-P
, 100kHz
5.5
6.0
6.5
dB
G
C
2
TP3
C
IN
: Sine wave, 2.0V
P-P
, 100kHz
-0.5
0
0.5
F
C
1
TP3
Vn-C : Sine wave, 1.0V
P-P
Frequency characteristics
10MHz/100kHz
-1.0
0
1.0
dB
F
C
2
TP3
C
IN
: Sine wave, 2.0V
P-P
, 10MHz/100kHz -1.0
0
1.0
Differential gain
DG
C
TP3
C
IN
: Staircase, 2V
P-P
, APL=10~90%
-3
0
3
%
Differential phase
DP
C
TP3
C
IN
: Staircase, 2V
P-P
, APL=10~90%
-3
0
3
deg
Vn-C : Sine wave, 100kHz
D
C
1
SG3
Maximum input for total higher
2.75
3.25
Input dynamic range
harmonic distortion factor < 1.0%
V
P-P
C
IN
: Sine wave, 100kHz
D
C
2
SG5
Maximum input for total higher
5.5
6.5
harmonic distortion factor < 1.0%
Input impedance
Z
IC
Vn-C, C
IN
10
15
20
k
Output impedance
Z
OC
50
L
OUT
output
Voltage gain
G
L
1
TP4
b7=0, Sine wave, 2.5V
P-P
, 1kHz
-6.5
-6.0
-5.5
dB
G
L
2
TP4
b7=1, Sine wave, 2.5V
P-P
, 1kHz
-0.5
0
0.5
Frequency characteristics
F
L
TP4
Sine wave, 2.5V
P-P
, 1MHz/1kHz
-3.0
0
1.0
dB
Electrical Characteristics
(Ta=25C, V
CC
=9V)
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
Measure
Conditions
Item
Symbol
ment pin
(unless otherwise indicated,
Min. Typ. Max. Units
Measurement Circuit Figure 1)
Total higher harmonic distortion
THD
L
TP4
Sine wave, 2.5V
P-P
, 1kHz
0.03
0.1
%
Sine wave, 1kHz
Input dynamic range
D
L
SG6
Maximum input for total higher
2.6
2.8
Vrms
harmonic distortion factor < 0.5%
Output offset voltage
V
OFFL
24
L
OUT
pin DC difference during SW switching
0
15
mV
Input impedance
Z
IL
42
60
78
k
Output impedance
Z
OL
120
R
OUT
output
Voltage gain
G
R
1
TP5
b7=0, Sine wave, 2.5V
P-P
, 1kHz
-6.5
-6.0
-5.5
dB
G
R
2
TP5
b7=1, Sine wave, 2.5V
P-P
, 1kHz
-0.5
0
-0.5
Frequency characteristics
F
R
TP5
Sine wave, 2.5V
P-P
, 1MHz/1kHz
-3.0
0
1.0
dB
Total higher harmonic distortion
THD
R
TP5
Sine wave, 2.5V
P-P
, 1kHz
0.03
0.1
%
Sine wave, 1kHz
Input dynamic range
D
R
SG7
Maximum input for total higher
2.6
2.8
Vrms
harmonic distortion factor < 0.5%
Output offset voltage
V
OFFR
23
R
OUT
pin DC difference during switching
0
15
mV
Input impedance
Z
IR
42
60
78
k
Output impedance
Z
OR
120
Crosstalk
V
OUT
C
TV
TP1
Measurement Circuit Figure 2
-60
-53
dB
Y
OUT
C
TY
TP2
SG1 input : 4.43MHz, 1V
P-P
-60
-53
dB
C
OUT
C
TC
TP3
SG2 input : 4.43MHz, 0.5V
P-P
-60
-53
dB
L
OUT
C
TL
TP4
Measurement Circuit Figure 2
-90
-80
dB
R
OUT
C
TR
TP5
1kHz, 2.5V
P-P
-90
-80
dB
Video I/O Pin Voltage
Input pin voltage
V
VIP
No signal, no load
4.0
4.3
4.6
V
Output pin voltage
V
VOP
V
OUT
pin, No signal, no load
4.1
4.4
4.7
V
V
SOP
Y
OUT
pin, C
OUT
pin, No signal, no load
3.3
3.6
3.9
V
Audio I/O Pin Voltage
Input pin voltage
V
AIP
No signal, no load
4.6
4.9
5.2
V
Output pin voltage
V
AOP
No signal, no load
3.9
4.2
4.5
V
Logic section (Refer to figure below)
Input voltage L
V
IL
I
2
C logic low level discrimination value
0.0
1.5
V
Input voltage H
V
IH
I
2
C logic high level discrimination value
3.0
5.0
V
Low level output voltage (SDA)
V
OL
SDA for 3mA inflow
0.0
0.4
V
High level input current
I
IH
when SDA, SCL=4.5V impressed
-10
+10
A
Low level input current
I
IL
when SDA, SCL=0.4V impressed
-10
+10
A
Clock frequency
f
SCL
100
kHz
Data transmission waiting time
t
BUF
4.7
S
SCL start hold time
t
HD : STA
4.0
S
SCL low level hold time
t
LOW
4.7
S
SCL high level hold time
t
HIGH
4.0
S
SCL start set-up time
t
SU : STA
4.7
S
SDA data hold time
t
HD : DAT
200
nS
SDA data set-up time
t
SU : DAT
250
nS
SCL rise time
t
R
1000
nS
SCL fall time
t
F
300
nS
SCL stop set-up time
t
SU : STO
4.0
S
I
2
C BUS Control Signal
SDA
SCL
t
BUF
P
P
S t
HD:STA
t
HD:DAT
t
HIGH
t
SU:DAT
t
SU:STA
t
SU:STO
t
LOW
Sr
t
R
t
F
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
Measurement Circuit
Measurement Circuit 1
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
Measurement Circuit 2 (Crosstalk measurement)
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
I
2
C BUS
SDA
SCL
S
1
2
3
4
5
6
7
8
A
1
2
3
8
A
P
S:Start Condition
P:Stop Condition
ACK:Acknowledge
The I
2
C BUS is a BUS system developed by Philips for internal use in equipment. Data transmission is carried
out by the two SDA and SCL lines, in byte units, with the MSB first from start condition.
Control Register
The control register contains data sent from the master in order to determine the status of each switch.
S
Slave address
R/W
A
Control register
A
P
1
0
0
1
0
0
0/1
0
b7
b6
b5
b4
b3
b2
b1
b0
Address byte
Control data
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the
slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 0 when
using as a control register.
The MM1311 slave address can be selected as 90H/92H depending on the status of the ADR pin. When the
ADR pin is low it is 90H. The relationship between the control register bits and switch control is as shown
below.
b7
b6
b5
b4
b3
b2
b1
b0
Audio S/Comp
Video-Select
Audio-Select
Gain
Select
The control register bits are reset to 0 when power is applied.
MM1311 control is carried out by the 2-byte structure of the 1 address byte and 1 control data byte. All of the
remaining data (third byte and after) are ignored.
Refer to the separate tables for details on switch control.
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
Status Register
The status register contains data for sending device status to the master.
S
Slave address
R/W
A
Control register
NA
P
1
0
0
1
0
0
0/1
1
b7
b6
b5
b4
b3
b2
b1
b0
Address byte
Control data
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the
slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 1 when
using as a status register.
The MM1311 slave address can be selected as 91H/93H depending on the status of the ADR pin. When the
ADR pin is low it is 91H. However, the confirmation response after completion of the status register should be
non-acknowledge. The status register output data as shown below.
b7
b6
b5
b4
b3
b2
b1
b0
P-ON
S1
S1
S2
S2
RESET
OPEN
SEL
OPEN
SEL
P-ON RESET : Returns 1 for power on reset. However once data read begins, 0 is returned next.
S1/S2 OPEN : Returns 0 when the S1/S2 pin is not open, and returns 1 when the S1/S2 pin is open
S1/S2 SEL : Returns 0 when the S1/S2 pin is not grounded, and returns 1 when the S1/S2 pin is
grounded.
S1/S2 OPEN, SEL have 3-value discrimination, and the combinations are as shown below.
S1/S2 pin DC voltage
S1/S2 OPEN
S1/S2 SEL
0.8V or less
0
1
1.3V or more, 3.5V or less
0
0
4.5V or more
1
0
Power On Reset
Power on reset is built in to reset each control register to 0 when power is turned on.
Power on reset threshold has hysteresis as shown in the figure below. The IC power on reset status can be
discriminated by reading the status register P-ON RESET.
Reset released
Reset status
Undefined
0.6V
4.3V
5.4V
V
CC
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
Switch Control Table
1. Video Output
b6
b5
b4
b3
V
OUT
Y
OUT
C
OUT
0
0
0
0
Mute
Mute
Mute
0
0
0
1
MTV-V
Y
IN
C
IN
0
0
1
0
V1-V
Y
IN
C
IN
0
0
1
1
V2-V
Y
IN
C
IN
0
1
0
0
V3-V
Y
IN
C
IN
0
1
0
1
Mute
Mute
Mute
1
1
1
0
0
0
Mute
Mute
Mute
1
0
0
1
MTV-V
Y
IN
C
IN
1
0
1
0
V1-Y+C
V1-Y
V1-C
1
0
1
1
V2-Y+C
V2-Y
V2-C
1
1
0
0
V3-V
Y
IN
C
IN
1
1
0
1
Mute
Mute
Mute
1
1
~~
2. Audio Output
Mute pin
b2
b1
b0
L
OUT
R
OUT
0
0
0
Mute
Mute
0
0
1
MTV-L
MTV-R
1.5V or less
0
1
0
V1-L
V1-R
(OPEN)
0
1
1
V2-L
V2-R
1
0
0
V3-L
V3-R
1
0
1
Mute
Mute
1
1
3.0V or more
-
-
-
Mute
Mute
~
3. Audio Gain Switching
b7
Output gain
0
-6dB output
1
0dB output
MITSUMI
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C BUS Control 4-Input 1-Output AV Switch MM1311
Example of Application Circuit
Notes 1 : V
OUT
is set at 4.4V and C
IN
at 4.3V.
Please note that capacitance polarity may vary depending on
comb filter bias.
Notes 2 : Each audio output can be muted by making pin 19 high. Mute is
off when it is open or low.
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