ChipFind - документация

Электронный компонент: MS6257GTR

Скачать:  PDF   ZIP

Document Outline

MO
SA
MS6257
GAIN AND ATTENUATION VOLUME CONTROLLER IC
REV 1 1 www.mosanalog.com
Gain and Attenuation Volume Controller IC
One Set of Stereo Input, Low voltage
Gain and Attenuation 15~-79dB
FEATURES
Operation range: 2.7V~5.5V
Low power consumption
Gain/Attenuation: 15dB to 79dB at 1dB/step
Housed in 8 pin SOP package
I
2
C interface
APPLICATIONS
Multimedia system
Hi-Fi audio system
MP3, PDA
Cross-reference PT2257, PT2259
DESCRIPTION
The MS6257 is the stereo audio volume controller IC. It uses CMOS technology specially for the low voltage
application with low noise, rail-to-rail output. The MS6257 provide an I
2
C control interface with gain / attenuation
range of 15dB to 79dB, 1dB/step. The initial condition is set to be maximum attenuation 79dB and mute on mode
when the power is up.
PIN CONFIGURATION
Symbol Pin
Description
L-IN
1
Left channel input
L-OUT
2
Left channel output
V
SS
3 Ground
SDA 4
I
2
C data input
SCL 5
I
2
C clock input
V
DD
6
Positive supply voltage
R-OUT
7
Right channel output
R-IN
8
Right channel input
7
6
5
8
2
3
4
1
MS6257
R-IN
R-OUT
V
DD
SCL
L-IN
L-OUT
V
SS
SDA

BLOCK DIAGRAM
R-IN
REF
SDA
SCL
R-OUT
L-OUT
I2C Interface
-10dB/STEP
-1dB/STEP
1dB/STEP
Serial Bus Decoder and Latches
Reference
Circuit
1dB/STEP
-1dB/STEP
-10dB/STEP
L-IN
MO
SA
MS6257
GAIN AND ATTENUATION VOLUME CONTROLLER IC
REV 1 2 www.mosanalog.com
ORDERING INFORMATION
Package
Part number
Packaging Marking
Transport Media
8-Pin SOP
MS6257TR
MS6257
2.5k Units Tape and Reel
8-Pin SOP
MS6257U
MS6257
100 Units Tube
8-Pin SOP (lead free)
MS6257GTR
MS6257G
2.5k Units Tape and Reel
8-Pin SOP (lead free)
MS6257GU
MS6257G
100 Units Tube



ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter Rating
Unit
V
DD
Supply
Voltage
6
V
V
ESD
Electrostatic Handling
-4500 to 4500
V
T
STG
Storage Temperature Range
-65 to 150
T
A
Operating Ambient Temperature Range
-40 to 85
T
J
Maximum Junction Temperature
150
T
S
Soldering Temperature, 10 seconds
260
R
THJA
Thermal Resistance from Junction to Ambient in Free Air
SOP8
210
/W



OPERATING RATINGS
Symbol Parameter Min Typ Max Unit
V
DD
Supply Voltage
2.7
-
5.5
V
























MO
SA
MS6257
GAIN AND ATTENUATION VOLUME CONTROLLER IC
REV 1 3 www.mosanalog.com
5V ELECTRICAL CHARACTERISTICS
(V
DD
=5.0V, V
SS
=0V, Attenuation=0dB, Gain=0dB, f=1KHz, V
O
=0dBV; unless otherwise specified)
Symbol Parameter
Conditions Min
Typ
Max
Unit
DC Characteristics
I
Q
Quiescent current
-
3.1
3.5
mA
Max gain
-
15
-
dB
A
GA
Gain/Attenuation
Max attenuation
-
-79
-
dB
A
STEP
Gain/Attenuation step
-
1
-
dB
E
GA
Gain/Attenuation step error
-
0.3
-
dB
E
IGA
Interchannel gin/attenuation error
-
0.3
-
dB
CS Channel
separation
120 130 - dB
MUTE Mute
Attenuation
Vin=0dBV
-
85
-
dB
Rin Input
Impedance
18 20 - k
Rout Output
Impedance
-
50 100
AC Characteristics
Vo
Maximum output voltage swing
(THD+N)/S < 0.1%
-
4.8
-
Vpp
THD+N
Total harmonic distortion plus
noise
-
-68
-63
dB
S/N Signal-to-noise
ratio
V
O
=4.5Vpp 95
100
-
dB
Bus Characteristics
V
IH
Bus high input level
-
-
0.7V
DD
V
V
IL
Bus low input level
0.3V
DD
- - V



3.3V ELECTRICAL CHARACTERISTICS
(V
DD
=3.3V, V
SS
=0V, Attenuation=0dB, Gain=0dB, f=1KHz, V
O
=-3dBV; unless otherwise specified)
Symbol Parameter
Conditions Min
Typ
Max
Unit
DC Characteristics
I
Q
Quiescent current
-
2.8
3.3
mA
CS Channel
separation
90 110 - dB
MUTE Mute
Attenuation
Vin=-3dBV
-
80
-
dB
AC Characteristics
Vo
Maximum output voltage swing
(THD+N)/S < 0.1%
-
3
-
Vpp
THD+N
Total harmonic distortion plus
noise
-
-63
-58
dB
S/N Signal-to-noise
ratio
85 90 - dB










MO
SA
MS6257
GAIN AND ATTENUATION VOLUME CONTROLLER IC
REV 1 4 www.mosanalog.com
2.7V ELECTRICAL CHARACTERISTICS
(V
DD
=2.7V, V
SS
=0V, Attenuation=0dB, Gain=0dB, f=1KHz, V
O
=-3dBV; unless otherwise specified)
Symbol Parameter
Conditions Min
Typ
Max
Unit
DC Characteristics
I
Q
Quiescent current
-
2.5
2.9
mA
CS Channel
separation
95 105 - dB
MUTE Mute
Attenuation
Vin=-3dBV
-
80
-
dB
AC Characteristics
Vo
Maximum output voltage swing
(THD+N)/S < 0.3%
-
2
-
Vpp
THD+N
Total harmonic distortion plus
noise
-
-60
-55
dB
S/N Signal-to-noise
ratio
85 90 - dB




TYPICAL PERFORMANCE CHARACTERISTICS
(Ta=25; unless otherwise specified)
THD+N (%)
OUTPUT VOLTAGE (dBV)
THD+N (%)
OUTPUT VOLTAGE (dBV)
THD+N (%)
OUTPUT VOLTAGE (dBV)
THD+N vs. output voltage
THD+N vs. output voltage
THD+N vs. output voltage
f=20Hz
f=20Hz
f=20Hz
f=1kHz
f=20kHz
f=20kHz
f=1kHz
f=1kHz
f=20kHz
V
DD
=5V
V
DD
=2.7V
V
DD
=3.3V


THD+N (%)
FREQUENCY (Hz)
C
H
A
N
N
E
L SEPAR
ATION
(
d
B)
FREQUENCY (Hz)
QUIE
S
C
E
N
T CURRE
NT (mA
)
SUPPLY VOLTAGE (V)
THD+N vs. frequency
Channel separation vs. frequency
Quiescent current vs. supply voltage
V
DD
=5V
V
O
=0dBV
V
DD
=3.3V
V
O
=-3dBV
V
DD
=2.7V
V
O
=-3dBV
V
DD
=3.3V
V
O
=-3dBV
V
DD
=2.7V
V
O
=-3dBV
V
DD
=5V
V
O
=0dBV

MO
SA
MS6257
GAIN AND ATTENUATION VOLUME CONTROLLER IC
REV 1 5 www.mosanalog.com
I
2
C BUS DESCRIPTION
Start and stop conditions
A start condition is activated when the SCL is set to HIGH and SDA shifts from HIGH to LOW state. The stop
condition is activated when SCL is set to HIGH and SDA shifts from LOW to HIGH state. Please refer to the timing
diagram below.
SDA
SCL
Start
Stop
SCL : Serial Clock Line, SDA : Serial Data Line



Data validity
A data on the SDA line is considered valid and stable only when the SCL signal is in HIGH state. The HIGH and
LOW states of the SDA line can only change when the SCL signal is LOW. Please refer to the figure below.
SDA
SCL
Data line
stable,
Data valid
Data
change
allowed


Byte format
Every byte transmitted to the SDA line consists of 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transmitted first.



Acknowledge
During the Acknowledge clock pulse, the master (up) put a resistive HIGH level on the SDA line. The peripheral
(audio processor) that acknowledges has to pull-down (LOW) the SDA line during the Acknowledge clock pulse so that
the SDA line is in a stable LOW state during this clock pulse. Please refer to the diagram below.
SCL
SDA
MSB
Acknowledge
1
2
3
7
8
9
Start
The audio processor that has been addressed has to generate an Acknowledge after receiving each byte, otherwise,
the SDA line will remain at the HIGH level during the ninth (9
th
) clock pulse. In this case, the master transmitter can
generate the STOP information in order to abort the transfer.