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Электронный компонент: V62C3802048LL-100B

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1
2
3
4
5
6
7
8
9
16
15
14
13
12
11
10
A
8
A
9
A
11
A
13
WE
CE
2
A
15
Vcc
A17
A
16
A
14
A
12
A
7
A
6
A
5
A
4
32
31
30
29
28
27
26
25
24
17
18
19
20
21
22
23
CE1
A
10
OE
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
GND
I/O
3
I/O
2
I/O
1
A
0
A
1
A
2
A
3
Cell Array
ROW DECODER
SENSE AMP
INPUT BUFFER
COLUMN DECODER
CONTROL
CIRCUIT
I/O8
I/O1
OE
WE
CE1
CE2
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
A9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
V62C3802048L(L)
Ultra Low Power
256K x 8 CMOS SRAM
Features
Low-power consumption
- Active: 40mA at 35ns
- Stand-by: 10
A
(CMOS input/output)
2
A
CMOS input/output, L version
Single + 2.7 to 3.3V Power Supply
Equal access and cycle time
35/45/55/70/85/100 ns access time
Easy memory expansion with CE1, CE2
and OE inputs
1.0V data retention mode
TTL compatible, Tri-state input/output
Automatic power-down when deselected
Package available: 32-TSOP1 / STSOP
48 Ball CSP_BGA
Functional Description
The V62C3802048L is a low power CMOS Static RAM orga-
nized as 262,144 words by 8 bits. Easy memory expansion is p-
rovided by an active LOW CE1, an active HIGH CE2, an acti-
ve LOW OE , and Tri-state I/O's. This device has an autom-
atic power-down mode feature when deselected.
Writing to the device is accomplished by taking Chip En-
able 1 (CE1) with Write Enable (WE ) LOW, and Chip Enab-
le 2 (CE2) HIGH. Reading from the device is performed by
taking Chip Enable 1 (CE1) with Output Enable (OE)
LOW while Write Enable (WE ) and Chip Enable 2 (CE2)
is HIGH. The I/O pins are placed in a high-impedance sta-
te when the device is deselected: the outputs are disabled d-
uring a write cycle.
The V62C3802048LL comes with a 1V data retention feature
and Lower Standby Power. The V62C3802048L is available in
a 32-pin 8 x 20 mm TSOP1/8 x 13.4mm STSOP and CSP type
48-fpBGA packages.
32-Pin TSOP1 / STSOP(CSP_BGA see next page)
Logic Block Diagram
REV. 1.
2 May 2001 V62C3802048L(L)
1
2
1
2
3
4
5
6
MOSEL VITELIC V62C3802048L(L)B
1
2
3
4
5
6
A
B
C
D
E
F
G
H
A0
I/O5
I/O6
VSS
VCC
I/O7
I/O8
A9
A1
A2
NC
NC
NC
NC
OE
A10
CS2
WE
NC
NC
NC
NC
CS1
A11
A3
A4
A5
NC
NC
A17
A16
A12
A6
A7
NC
NC
NC
NC
A15
A13
A8
I/O1
I/O2
VCC
VSS
I/O3
I/O4
A14
Top View
Note: NC means no Ball.
Top View
SIDE VIEW
BOTTOM VIEW
48 Ball - 9x12 fpBGA (Ultra Low Power)
PACKAGE OUTLINE DWG.
SYMBOL
UNIT:MM
A
D
D1
e
E1
E
C
A1
6
5
4
3
2
1
A
B
C
D
E
F
G
H
aaa
b
SOLDER BALL
A
1.05+0.15
A1
0.25+0.05
0.35+.05
0.30(TYP)
12.00+0.10
5.25
9.00+0.10
b
c
D
D1
E
E1
e
aaa
3.75
0.75TYP
0.10
V62C3802048L(L)
REV. 1.
2 May 2001 V62C3802048L(L)
Absolute Maximum Ratings *
* Note: Stresses greater than those listed above Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at these or any conditions outside those indicated in the operational sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Parameter
Symbol
Minimum
Maximum
Unit
Voltage on Any Pin Relative to Gnd
Vt
-0.5
4.6
V
Power Dissipation
P
T
-
1.0
W
Storage Temperature (Plastic)
Tstg
-55
+150
0
C
Temperature Under Bias
Tbias
-40
+85
0
C
Truth Table
* Key: X = Don't Care, L = Low, H = High
CE1
CE2
WE
OE
Data
Mode
H
X
X
X
High-Z
Standby
X
L
X
X
High-Z
Standby
L
H
H
L
Data Out
Active, Read
L
H
H
H
High-Z
Active, Output Disable
L
H
L
X
Data In
Active, Write
3
Recommended Operating Conditions
(T
A
= 0
0
C to +70
0
C / -40
0
C to 85
0
C
**
)
* V
IL
min = -2.0V for pulse width less than t
RC
/2.
** For Industrial Temperature.
Parameter
Symbol
Min
Typ
Max
Unit
V
CC
2.7
3.0
3.3
V
Gnd
0.0
0.0
0.0
V
V
IH
2.2
-
V
CC
+ 0.2
V
V
IL
-0.5*
-
0.6
V
Supply Voltage

Input Voltage
V62C3802048L(L)
REV. 1.
2 May 2001 V62C3802048L(L)
AC Test Conditions
Input Pulse Level
0.6V to 2.2V
Input Rise and Fall Time
5ns
Input and Output Timing
Reference Level
50% of input level
(VIL+VIH)/2
Output Load Condition
70ns/85 ns
C
L
= 30pf + 1TTL Load
Load 100ns/120 ns
C
L
= 100pf + 1TTL Load
C
L
*
Figure A. * Including Scope and Jig Capacitance
DC Operating Characteristics
(V
cc
= 2.7 to 3.3V, Gnd = 0V, T
A
= 0
0
C to +70
0
C / -40
0
C to 85
0
C)
Input Leakage Current
I
I
LI
I
V
cc
= Max,
V
in
= Gnd to V
cc
-
1
-
1
-
1
-
1
A
Output Leakage
Current
I
I
LO
I
CE1 = V
IH
or CE2 = V
IL
V
cc
=
Max,
V
OUT
=
Gnd to V
cc
-
1
-
1
-
1
-
1
A
Operating Power
Supply Current
I
CC
CE1 = V
IL
, CE2 = V
IH
V
IN
= V
IH
or
V
IL
,
I
OUT
=
0
mA
-
3
-
3
-
3
-
3
mA
Average Operating
Current
I
CC1
CE1 = V
IL
, CE2 = V
IH
I
OUT
=
0mA,
Min Cycle, 100% Duty
-
35
-
35
-
30
-
25
mA
I
CC2
CE1 = 0.2V ,
CE2 =V
cc
- 0.2V
I
OUT
=
0mA,
Cycle Time=1
s, 100% Duty
-
3
-
3
-
3
-
3
mA
Standby Power Supply
Current (TTL Level)
I
SB
CE1 = V
IH
or CE2 = V
IL
-
0.5
-
0.5
-
0.5
-
0.5
mA
Standby Power Supply
Current (CMOS Level)
I
SB1
CE1 > V
cc
- 0.2V
or
CE2 < 0.2V, f = 0
V
IN
< 0.2V or
V
IN
> V
cc
- 0.2V
L
-
-
10
2
-
-
10
2
-
-
10
2
-
-
10
2
A
A
Output Low Voltage
V
OL
I
OL
= 2 mA
-
0.4
-
0.4
-
0.4
-
0.4
V
Output High Voltage
V
OH
I
OH
= -2 mA
2.4
-
2.4
-
2.4
-
2.4
-
V
-55
-85
-100
Unit
Parameter
Sym
Test Conditions

Min Max Min Max Min Max Min Max
-70
4
Capacitance
(f = 1MHz, T
A
= 25
0
C)
* This parameter is guaranteed by device characterization and is not production tested.
Parameter*
Symbol
Test Condition
Max
Unit
Input Capacitance
C
in
V
in
= 0V
7
pF
I/O Capacitance
C
I/O
V
in
= V
out
= 0V
8
pF
V62C3802048L(L)
REV. 1.
2 May 2001 V62C3802048L(L)
DC Operating Characteristics
(V
cc
= 2.7 to 3.3V, Gnd = 0V, T
A
= 0
0
C to +70
0
C / -40
0
C to 85
0
C)
-35
-45
Input Leakage Current
I
I
LI
I
V
cc
= Max,
V
in
= Gnd to V
cc
-
1
-
1
A
Output Leakage
Current
I
I
LO
I
CE1 = V
IH
or CE2 = V
IL
V
cc
=
Max,
V
OUT
=
Gnd to V
cc
-
1
-
1
A
Operating Power
Supply Current
I
CC
CE1 = V
IL
, CE2 = V
IH
V
IN
= V
IH
or
V
IL
,
I
OUT
=
0
mA
-
3
-
3
mA
Average Operating
Current
I
CC1
CE1 = V
IL
, CE2 = V
IH
I
OUT
=
0mA,
Min Cycle, 100% Duty
-
40
-
40
mA
I
CC2
CE1 = 0.2V ,
CE2 =V
cc
- 0.2V
I
OUT
=
0mA,
Cycle Time=1
s, 100% Duty
-
3
-
3
mA
Standby Power Supply
Current (TTL Level)
I
SB
CE1 = V
IH
or CE2 = V
IL
-
0.5
-
0.5
mA
Standby Power Supply
Current (CMOS Level)
I
SB1
CE1 > V
cc
- 0.2V
or
CE2 < 0.2V, f = 0
V
IN
< 0.2V or
V
IN
> V
cc
- 0.2V
L
-
-
10
2
-
-
10
2
A
A
Output Low Voltage
V
OL
I
OL
= 2 mA
-
0.4
-
0.4
V
Output High Voltage
V
OH
I
OH
= -2 mA
2.4
-
2.4
-
V
Unit
Parameter
Sym
Test Conditions

5
Min Max Min Max
V62C3802048L(L)
REV. 1.
2 May 2001 V62C3802048L(L)