Document Outline
- Introduction
- 33981 Simplified Application Diagram
- 33981 Simplified Internal Block Diagram
- Terminal Definitions
- Maximum Ratings
- Static Electrical Characteristics
- Dynamic Electrical Characteristics
- Functional Truth Tables
- Timing Diagram
- Functional Diagrams
- Electrical Performance Curves
- System/Application Information
- Introduction
- Functional Description
- Applications
- Package Dimensions
GND
OCLS
SR
CSNS
TEMP
INHS
EN
INLS
CONF
V
PWR
GLS
DLS
OUT
C
BOOT
M
FS
V
PWR
V
DD
V
DD
MCU
I/O
I/O
I/O
I/O
A/D
A/D
33981
Simplified Application Diagram
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
This document contains information on a product under development.
Motorola reserves the right to change or discontinue this product without notice.
Motorola, Inc. 2004
Document order number: MC33981
Rev 2.0, 10/2004
33981
Preliminary Information
High-Frequency, High-Current,
Self-Protected High-Side Switch
(4.0 m
up to 60 kHz)
The 33981 is a high-frequency, self-protected 4.0 m
R
DS(ON)
high-side
switch used to replace electromechanical relays, fuses, and discrete devices
in power management applications.
The 33981 can be controlled by pulse-width modulation (PWM) with a
frequency up to 60 kHz. It is designed for harsh environments, and it includes
self-recovery features. The 33981 is suitable for loads with high inrush current,
as well as motors and all types of resistive and inductive loads.
The 33981 is packaged in a 12 x 12 nonleaded power-enhanced Power
QFN package with exposed tabs.
Features
Single 4.0 m
R
DS(ON)
Maximum High-Side Switch
PWM Capability up to 60 kHz with Duty Cycle from 5% to 100%
Very Low Standby Current
Slew Rate Control with External Capacitor
Overcurrent and Overtemperature Protection, Undervoltage Shutdown
and Fault Reporting
Reverse Battery Protection
Gate Drive Signal for External Low-Side N-Channel MOSFET with
Protection Features
Output Current Monitoring
Temperature Feedback
HIGH-SIDE SWITCH
4.0 m
ORDERING INFORMATION
Device
Temperature
Range (T
A
)
Package
PC33981PNA/R2
-40
C to 125
C
16 PQFN
33981 Simplified Application Diagram
SCALE 1:1
Bottom View
PNA SUFFIX
CASE 1402-02
16-TERMINAL PQFN
(12 X 12)
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
2
Figure 1. 33981 Simplified Internal Block Diagram
GND
OUT Current
Recopy
1/20000
Logic
Gate Driver
OUT
CSNS
V
PWR
EN
INHS
INLS
C
BOOT
Bootstrap Supply
Slew Rate Control
SR
Low-Side
Gate Driver
GLS
Undervoltage
FS
CONF
Cross-
Conduction
DLS
and Protection
TEMP
Temperature
Feedback
OCLS
Current Protection
100 A
Overtemperature
Detection
5.0 V
I
CONF
I
OCLS
I
DWN
R
DWN
5.0 V
Detection
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
3
TERMINAL DEFINITIONS
Functional descriptions of some of these terminals can be found in the System/Application Information section beginning on
page 19
.
Terminal
Terminal
Name
Formal Name
Definition
1
CSNS
Output Current Monitoring
This terminal is used to output a current proportional to the high-side OUT current and
is used externally to generate a ground-referenced voltage for the microcontroller
(MCU) to monitor OUT current.
2
TEMP
Temperature Feedback
This terminal reports an analog value proportional to the temperature of the GND flag
(terminal 13). It is used by the MCU to monitor board temperature.
3
EN
Enable
(Active High)
This is an input used to place the device in a low current sleep mode. This terminal has
an passive internal pulldown.
4
INHS
Serial Input High Side
The input terminal is used to directly control the OUT. This input has an active internal
pulldown current source and requires CMOS logic levels.
5
FS
Fault Status
(Active Low)
This is an open drain-configured output requiring an external pull-up resistor to
V
DD
(5.0 V) for fault reporting. When a device fault condition is detected, this terminal
is active LOW.
6
INLS
Serial Input Low Side
The input terminal is used to directly control an external low-side N-channel MOSFET
and has an active internal pulldown current source and requires CMOS logic levels. It
can be controlled independently of the INHS depending of CONF terminal.
7
CONF
Configuration Input
This input terminal is used to manage the cross-conduction between the internal high-
side N-channel MOSFET and the external low-side N-channel MOSFET. The terminal
has an active internal pullup current source. When CONF is at 0 V, the two MOSFETs
are controlled independently. When CONF is at 5.0 V, the two MOSFETs cannot be on
at the same time.
8
OCLS
Low-Side Overload
This terminal sets the V
DS
protection level of the external low-side MOSFET. This
terminal has an active internal pullup current source. It must be connected to an
external resistor.
9
DLS
Drain Low Side
This terminal is the drain of the external low-side N-channel MOSFET. Its monitoring
allows for protection features.
10
GLS
Low-Side Gate
This terminal is an output used to drive the gate of the external low-side N-channel
MOSFET.
11
SR
Slew Rate Control
A capacitor connected between this terminal and the ground is used to control the
output slew rate.
CSNS
INHS
FS
INLS
CONF
OCLS
EN
TEMP
DLS
GLS
SR
C
BOOT
1
11
10
9
8
7
6
5
4
3
2
OUT
OUT
16
15
V
PWR
Transparent Top View of Package
14
GND
13
12
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
4
14
V
PWR
Positive Power Supply
This terminal connects to the positive power supply and is the source input of
operational power for the device. The V
PWR
terminal is a backside surface mount tab
of the package.
15, 16
OUT
Output
Protected high-side power output to the load. Output terminals must be connected in
parallel for operation.
TERMINAL DEFINITIONS (continued)
Functional descriptions of some of these terminals can be found in the System/Application Information section beginning on
page 19
.
Terminal
Terminal
Name
Formal Name
Definition
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
5
MAXIMUM RATINGS
All voltages are with respect to ground unless otherwise noted.
Rating
Symbol
Value
Unit
ELECTRICAL RATINGS
Power Supply Voltage
Steady-State
V
PWR
-16 to 41
V
Input/Output Terminals Voltage
(Note 1)
V
IN
-0.3 to 7.0
V
Output Voltage
V
OUT
-5.0 to 41
V
Continuous Output Current
(Note 2)
I
OUT
40
A
CSNS Input Clamp Current
I
CSNS
10
mA
SR Voltage
V
SR
-0.3 to 54
V
Temperature Feedback Voltage
V
TEMP
-0.3 to 5.0
V
C
BOOT
Voltage
C
BOOT
-0.3 to 54
V
OCLS Voltage
V
OCLS
-0.3 to 7.0
V
Low-Side Gate Voltage
V
GLS
-0.3 to 15
V
Low-Side Drain Voltage
V
DLS
-5.0 to 41
V
ESD Voltage
Human Body Model
(Note 3)
Machine Model
(Note 4)
V
ESD1
V
ESD2
2000
200
V
Output Clamp Energy
(Note 5)
E
CL
TBD
J
THERMAL RATINGS
Operating Temperature
Ambient
Junction
T
A
T
J
-40 to 125
-40 to 150
C
Storage Temperature
T
STG
-55 to 150
C
Thermal Resistance
(Note 6)
Junction to Power Die Case
Junction to Ambient
R
JC
R
JA
1.0
20
C/W
Peak Terminal Reflow Temperature During Solder Mounting
(Note 7)
T
SOLDER
240
C
Power Dissipation (TA = 25C)
(Note 8)
P
D
TBD
W
Notes
1.
Exceeding voltage limits on INHS, INLS, CONF, CSNS, FS, TEMP, and EN terminals may cause a malfunction or permanent damage to the
device.
2.
Continuous high-side output rating as long as maximum junction temperature is not exceeded. Calculation of maximum output current using
package thermal resistance is required.
3.
ESD1 testing is performed in accordance with the Human Body Model (C
ZAP
= 100 pF, R
ZAP
= 1500
).
4.
ESD2 testing is performed in accordance with the Machine Model (C
ZAP
= 200 pF, R
ZAP
= 0
) and in accordance with the system module
specification with a capacitor > 0.01
F connected from OUT to GND.
5.
Active clamp energy using single-pulse method (L = 16 mH, R
L
= 0, V
PWR
= 12 V, T
J
= 150C).
6.
Device mounted on a 2s2p test board per JEDEC JESD51-2.
7.
Terminal soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
8.
Maximum power dissipation at indicated ambient temperature in free air with no heatsink used.
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
6
STATIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions 4.5 V
V
DD
5.5 V, 6.0 V V
PWR
27 V, -40C T
J
150C unless otherwise noted.
Typical values noted reflect the approximate parameter mean at T
A
= 25
C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER INPUT
Battery Supply Voltage Range
Fully Operational
Extended
V
PWR
6.0
4.5
27
27
V
V
PWR
Supply Current
Output ON, I
OUT
= 0 A
I
PWR(ON)
10
mA
V
PWR
Supply Current
Output OFF, EN = 5.0 V, OUT Connected to GND
I
PWR(SBY)
10
mA
Sleep State Supply Current (V
PWR
< 14 V, EN = 0 V)
T
J
= 25
C
T
J
= 125
C
I
PWR(SLEEP)
5.0
50
A
Undervoltage Shutdown
V
PWR(UV)
2.0
4.0
V
Undervoltage Hysteresis
V
PWR(UVHYS)
0.3
V
POWER OUTPUT
Output Drain-to-Source ON Resistance
(
I
OUT
= 20 A, T
J
= 25
C)
V
PWR
= 6.0 V
V
PWR
= 10.0 V
V
PWR
= 13 V
R
DS(ON)
6.0
5.0
4.0
m
Output Drain-to-Source ON Resistance (I
OUT
= 20 A, T
J
= 150
C)
V
PWR
= 6.0 V
V
PWR
= 9.0 V
V
PWR
= 13 V
R
DS(ON)
10.2
8.5
6.8
m
Output Drain-to-Source ON Resistance
(
I
OUT
= 20 A, T
J
= 25
C)
V
PWR
= - 13 V
R
DS(ON)
8.0
m
Output Overcurrent Detection Level
I
OCH
100
A
Current Sense Ratio
9.0 V < V
PWR
< 16 V, CNS < 4.5V
C
SR
1/20000
Current Sense Ratio (C
SR
) Accuracy
Output Current
5.0 A
10 A
30 A
C
SR_ACC
-20
-14
-12
20
14
12
%
Current Sense Voltage Clamp
I
CCNS
= 15 mA
V
CL(CSNS)
4.5
6.0
7.0
V
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
7
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions 4.5 V
V
DD
5.5 V, 6.0 V V
PWR
27 V, -40C T
J
150C unless otherwise noted.
Typical values noted reflect the approximate parameter mean at T
A
= 25
C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER OUTPUT (continued)
Overtemperature Shutdown
T
SD
160
175
190
C
Overtemperature Shutdown Hysteresis
(Note 9)
T
SD(HYS)
5.0
20
C
Low-Side Gate
V
PWR
= 6.0 V
V
PWR
= 9.0 V
V
PWR
= 13 V
V
PWR
= 27 V
V
GSLS
6.0
9.0
12
12
V
Low-Side Gate Current
C = 4.7 nF
I
GSLS
100
mA
Low-Side Overload Detection Level versus Low-Side Drain Voltage
V
OCLS
- V
DLS
V
DS_LS
50
mV
Temperature Feedback
T
J
= 25C
T
Feed
TBD
4.75
TBD
V
Temperature Feedback Derating
DT
Feed
-12
mV/C
CONTROL INTERFACE
Input Logic High Voltage
(Note 10)
V
IH
0.7
V
DD
Input Logic Low Voltage
(Note 10)
V
IL
0.2
V
DD
Input Logic Voltage Hysteresis
(Note 10)
V
IN(HYS)
100
350
750
mV
Input Logic Active
Pulldown Current (INHS, INLS)
I
DWN
5.0
20
A
Input Logic Pulldown Resistor (EN)
R
DWN
100
200
400
k
Input Active Pullup Current (OCLS)
I
OCLS
p
100
A
Input Active Pullup Current (CONF)
I
CONF
10
A
FS
Tri-State Capacitance
(Note 9)
C
SO
20
pF
FS
Low-State Output Voltage
V
SOL
0.2
0.4
V
Notes
9.
Parameter is guaranteed by process monitoring but is not production tested.
10.
Upper and lower logic threshold voltage range applies to EN, CONF, INHS, and INLS input signals.
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
8
DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions 4.5 V
V
DD
5.5 V, 6.0 V V
PWR
27 V, -40C T
J
150C unless otherwise noted.
Typical values noted reflect the approximate parameter mean at T
A
= 25
C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
CONTROL INTERFACE AND POWER OUTPUT TIMING
C
BOOT
Charge Blanking Time
(Note 11)
t
ON
20
s
Output Rising
Slew Rate
(Note 12)
V
PWR
= 14 V
C
GATE
= 6.8 nF, from 10% to 90% of V
OUT,
SR Capacitor = 4.7 nF
SR
R
25
V/
s
Output Falling Slew Rate
(Note 12)
V
PWR
= 14 V
C
GATE
= 6.8 nF, from 90% to 10% of V
OUT,
SR Capacitor = 4.7 nF
SR
F
25
V/
s
Output Turn-ON Delay Time
(Note 13)
t
DLY(ON)
200
ns
Output Turn-OFF Delay Time
t
DLY(OFF)
400
ns
Input Switching Frequency
(Note 14)
f
PWM
60
kHz
Notes
11.
Refer to the paragraph entitled
Sleep Mode on page 19
.
12.
Parameter is guaranteed by process monitoring but is not production tested.
13.
Turn-ON delay time measured from rising edge of INHS that turns the output ON to V
OUT
= 0.5 V with R
L
= 5.0
resistive load.
14.
Turn-OFF delay time measured from falling edge of INHS that turns the output OFF to V
OUT
= V
PWR
-0.5 V with R
L
= 5.0
resistive load.
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
9
Table 1. Functional Truth Table in Normal Mode
Condition
CONF INHS
INLS
OUT
GLS
FS
EN
Comments
Sleep
x
x
x
x
x
H
L
Device is in Sleep mode. The OUT and
low-side gate are OFF.
Normal
L
H
H
H
H
H
H
Normal mode. High side and low side are
controlled independently. The high side
and the low side are both on.
Normal
L
L
L
L
L
H
H
Normal mode. High side and low side are
controlled independently. The high side
and the low side are both off.
Normal
H
L
H
L
H
H
H
Normal mode. No cross-conduction. Half-
bridge configuration. The high side is off
and the low side is on.
Normal
H
H
L
H
L
H
H
Normal mode. No cross-conduction. Half-
bridge configuration. The high side is on
and the low side is off.
Normal
H
PWM
H
PWM
PWM
OR
H
(Logical
OR)
H
H
Normal mode. Cross-conduction
management is activated. Half-bridge
configuration.
H = High level
L = Low level
x = Don't care
PWM = Pulse-width modulation
Table 2. Functional Truth Table in Fault Mode
Conditions
CONF INHS
INLS
OUT
GLS
FS
EN
TEMP CSNS OCLS
Comments
Overtemperature
on OUT
x
x
x
L
x
L
H
L
x
x
The 33981 is currently in fault mode. The
OUT is OFF. TEMP at 0 V indicates this
fault. Once the fault is removed 33981
recovers its normal mode.
Overtemperature
on C
BOOT
or GLS
x
x
x
L
L
L
H
L
x
x
The 33981 is currently in fault mode. The
OUT
is OFF and GLS is at 0 V. TEMP at
0 V indicates this fault. Once the fault is
removed 33981 recovers its normal mode.
Overcurrent
on OUT
x
H
x
L
x
L
H
x
L
x
The 33981 is currently in fault mode. The
OUT is OFF. It is reset by a logic [0] at
INHS for at least 200
s. When INHS goes
to 0 V, CSNS goes to 5.0 V.
Overload
on External Low-
Side MOSFET
L
x
H
x
L
L
H
x
x
L
The 33981 is currently in fault mode. GLS
is at 0 V and OCLS internal current source
is off. The external resistance connected
between OCLS and GND terminal will pull
OCLS terminal to 0 V. The fault is reset by
a logic [0] at
INLS for at least 200
s.
H = High level
L = Low level
x = Don't care
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
10
Timing Diagram
Figure 2. Time Delays
0.5 V
V
PWR
- 0.5 V
OUT
INHS
t
DLY(ON)
t
DLY(OFF)
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
11
Functional Diagrams
Figure 3. Overtemperature on Output
EN
CONF
INHS
High Side ON
High Side OFF
INLS
OUT
Thermal Shutdown on OUT
GLS
FS
TEMP
Thermal Shutdown on OUT
High Side ON
Thermal Shutdown on OUT
High Side OFF
Temperature
OUT
TSD
TSD
Hysteresis
Hysteresis
Thermal Shutdown on OUT
Thermal Shutdown on OUT
0 V
5.0 V
0 V
0 V
5.0 V
0 V
Low Side ON
Thermal Shutdown
on OUT
Thermal Shutdown
on OUT
0 V
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
12
Figure 4. Overtemperature on Bootstrap Circuit or on Low-Side Gate Drive
INHS
High Side ON
High Side OFF
INLS
OUT
GLS
FS
TEMP
Thermal Shutdown
on
Bootstrap Circuit or on Low-Side Gate Drive
Temperature
Control
TSD
TSD
Low Side ON
Hysteresis
Hysteresis
15 s After
15 s After
0 V
Thermal Shutdown
Thermal Shutdown
5.0 V
Thermal Shutdown
Thermal Shutdown
EN
CONF
0 V
0 V
0 V
0 V
Thermal Shutdown
Thermal Shutdown
Thermal Shutdown
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
13
Figure 5. Overload on Low-Side Gate Drive, Case 1
Figure 6. Overload on Low-Side Gate Drive, Case 2
EN
INLS
GLS
FS
Overload on Low Side
200 s Min
OCLS
V
DS_LS
Low Side OFF
V
DS_LS =
V
OCLS
Case 1: Overload Removed
Overload on Low Side
Overload on Low Side
Overload on Low Side
0 V
0 V
0 V
5.0 V
0 V
EN
INLS
GLS
FS
Overload on Low Side
200 s Min
OCLS
V
DS_LS
Case 2: Low Side Still Overloaded
Low Side OFF
V
DS_LS =
V
OCLS
0 V
0 V
0 V
0 V
Overload on Low Side
Overload on Low Side
Overload on Low Side
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
14
Figure 7. Overcurrent on Output
Figure 8. Normal Mode. Cross-Conduction Management
EN
INHS
OUT
FS
Overcurrent on High Side
200 s Min
CSNS
I
OUT
Overcurrent on High Side
I
OCH
Fault Removed
Overcurrent on High Side
Overcurrent on High Side
0 V
0 V
0 V
5.0 V
0 V
5.0 V
EN
INHS
INLS
OUT
GLS
FS
15 s After
CONF
5.0 V
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
15
Figure 9. Normal Mode. Independent High Side and Low Side
Figure 10. High-Side Overcurrent
EN
INHS
INLS
OUT
GLS
FS
High Side ON
High Side OFF
15 s After
CONF
0 V
INHS
CSNS
FS
Io ut
I
OUT
CSNS
INHS
FS
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
16
Figure 11. Cross-Conduction with Low Side
Figure 12. Overtemperature on OUT
OUT
Iout
GLS
INHS
Recirculation in Low Side
Current in Motor
Overtemperature
TEMP
INHS
OUT
I
OUT
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
17
Figure 13. Overtemperature on Bootstrap Circuit or on Low-Side Gate Drive
Figure 14. Maximum Operating Frequency for SR Capacitor of 4.7 nF
EN
TEMP
Overtemperature
OUT
I
OUT
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
18
Electrical Performance Curves
Figure 15. R
DS(ON)
versus Temperature
Figure 16. Sleep State Supply Current versus V
PWR
at 150C
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
-50
0
50
100
150
200
Temperature (C)
Rd
s
O
N (
m
O
h
m
)
R
DS(ON)
(m
)
Temperature (C)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
4.5
6.0
9.0
12.0
12.5
13.0
14.0
17.0
21.0
Vpwr(V)
I
p
w
r
(
s
l
eep
)
(
A
)
V
PWR
(V)
I
PWR(SLEEP
)
(
A)
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
19
SYSTEM/APPLICATION INFORMATION
INTRODUCTION
The 33981 is a high-frequency self-protected silicon 4.0 m
R
DS(ON)
high-side switch used to replace electromechanical
relays, fuses, and discrete devices in power management
applications. The 33981 can be controlled by pulse-width
modulation (PWM) with a frequency up to 60 kHz. It is designed
for harsh environments, and it includes self-recovery features.
The 33981 is suitable for loads with high inrush current, as
well as motors and all types of resistive and inductive loads. A
dedicated parallel input is available for an external low-side
control with protection features and cross-conduction
management.
FUNCTIONAL DESCRIPTION
Sleep Mode
Sleep mode is the state of the 33981 when the EN is logic [0].
In this mode, OUT, the gate driver for the external MOSFET,
and all unused internal circuitry are off to minimize current draw.
The 33981 will go to the normal operating mode when the EN
terminal is logic [1]. The INHS and INLS commands will be
disabled typically 20
s after the EN transitions to logic [1] to
enable the charge of the bootstrap capacitor.
Fault Logic
This 33981 indicates the faults below as they occur by
driving the
FS
terminal to logic [0]:
Overtemperature
Overcurrent fault on OUT
Overload fault on the external low-side MOSFET
The
FS
terminal will return to logic [1] when the
overtemperature fault condition is removed. The two other
faults are latched.
Undervoltage
The latched faults are
reset when the V
PWR
voltage is below
V
PWR(UV)
.
Overtemperature Fault
The 33981 incorporates overtemperature detection and
shutdown circuitry on OUT. Overtemperature detection also
protects the bootstrap circuit (C
BOOT
terminal) and the low-side
gate driver (GLS terminal). Overtemperature detection occurs
when OUT is in the ON or OFF state and GLS is at high or low
level.
For OUT, an overtemperature fault condition results in OUT
turning OFF until the temperature falls below T
SD
. This cycle will
continue indefinitely until the offending load is removed.
Figure 12
, page 16, shows an overtemperature on OUT.
An overtemperature fault on the bootstrap circuit or on the
low-side gate drive results in OUT turning OFF and the GLS
going to 0 V until the temperature falls below T
SD
. This cycle will
continue indefinitely until the offending load is removed.
FS
terminal transition to logic [1] will be disabled typically 15
s
after to enable the charge of the bootstrap capacitor.
Figure 13
, page 17, shows an overtemperature on the
bootstrap circuit or on the low-side gate drive. As the
temperature increases, TEMP voltage decreases until thermal
shutdown.
Overtemperature faults force the TEMP terminal to 0 V.
Overcurrent Fault on High Side
The OUT terminal has a 100 A overcurrent high-detection
level for maximum device protection. If at any time the current
reaches this level, OUT will stay OFF and the CSNS terminal
will go to 0 V. The OUT terminal is reset by a logic [0] at the
INHS
terminal for at least 200
s. When INHS goes to 0 V,
CSNS goes to 5.0 V.
In
Figure 11
, page 16, the OUT terminal is short-circuited to
0 V. When the current reaches I
OCH
, OUT is turned OFF within
10 s owing to internal logic circuit.
Overload Fault on Low Side
This fault detection is active when INLS is logic [1]. Low-side
overload protection does not measure the current directly but
rather its effects on the low-side MOSFET. When V
GLS
> V
GSH
and V
DLS
> V
DSH
for at least 2.5
s, the GLS terminal goes to
0 V and the OCLS internal current source is disconnected and
OCLS goes to 0 V. The GLS terminal and the OCLS terminal
are reset by a logic [0] at the INLS terminal for at least 200
s.
When connected to an external resistor, the OCLS terminal
with its internal current source sets the V
DSH
level. By changing
the external resistance, the protection level can be adjusted
depending on low-side characteristics.
A 3.3 k
resistor gives
a V
DSH
level of 3.3 V typical.
This protection circuitry measures the voltage between the
drain of the low side (DLS terminal) and the 33981 ground
(GND terminal). It also uses the voltage across the external
resistance connected to the OCLS terminal and the GND
terminal. For this reason it is key that the low-side source, the
33981 ground, and the external resistance ground connection
are connected together in order to prevent false error detection
due to ground shifts.
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
20
Configuration
The CONF terminal manages the cross-conduction between
the internal MOSFET and the external low-side MOSFET. With
the CONF terminal at 0 V, the two MOSFETs can be
independently controlled. A load can be placed between the
high side and the low side.
With the CONF terminal at 5.0 V, the two MOSFETs cannot
be on at the same time. They are in half-bridge configuration as
shown in the simplified application diagram on
page 1
. If INHS
and INLS are at 5.0 V at the same time, INHS has priority and
OUT will be at V
PWR
. If INHS changes from 5.0 V to 0 V with
INLS at 5.0 V, GLS will go to high state as soon as the V
GS
of
the internal MOSFET is lower than TBD typically. A half-bridge
application could consist in sending PWM signal to the INHS
terminal and 5.0 V to the INLS terminal with the CONF terminal
at 5.0 V.
Figure 11
, page 16, illustrates the simplified application
diagram on
page 1
with a DC motor and external low side. The
CONF and INLS terminals are at 5.0 V. When INHS is at 5.0 V,
current is flowing in the motor. When INHS goes to 0 V, the load
current recirculates in the external low side.
Bootstrap Supply
Bootstrap supply provides current to recharge the bootstrap
capacitor through the V
PWR
terminal. A short time is required
after the application of power to the device to charge the
bootstrap capacitor
.
A typical value for this capacitor is 100 nF.
An internal charge pump allows continuous MOSFET drive.
When the device is in the sleep mode, this bootstrap supply is
off to minimize current consumption.
High-Side Gate Driver
The high-side gate driver switches the bootstrap capacitor
voltage to the gate of the MOSFET. The driver circuit has a low-
impedance drive to ensure that the MOSFET remains OFF in
the presence of fast falling dV/dt transients on the OUT
terminal.
This bootstrap capacitor connected between the power
supply and the C
BOOT
terminal provides the high pulse current
to drive the device. The voltage across this capacitor is limited
to about 13 V. C
BOOT
is protected against short by a local
overtemperature sensor.
An external capacitor connected between terminals SR and
GND is used to control the slew rate at the OUT terminal.
Low-Side Gate Driver
The low-side control circuitry is PWM capable. It can drive a
standard MOSFET with an R
DS(ON)
as low as 4.0 m
at a
frequency up to 60 kHz. The V
GS
is internally clamped at 14 V
typically to protect the gate of the MOSFET. The GLS terminal
is protected against short by a local overtemperature sensor.
Thermal Feedback
The 33981 has an analog feedback output (TEMP terminal)
that provides a value proportional to the temperature of the
GND flag (terminal 13). The controlling microcontroller can
"read" the temperature proportional voltage with its analog-to-
digital converter (ADC). This can be used to provide real-time
monitoring of the PC board temperature to optimize the motor
speed and to protect the whole electronic system.
TEMP
terminal value is typically 4.2 V at 25C with a negative
temperature coefficient of 10 mV/K.
Reverse Battery
The 33981 survives the application of reverse battery voltage
as low as -16 V. Under these conditions, the output's gate is
enhanced to decrease device power dissipation. No additional
passive components are required. The 33981 survives these
conditions until the maximum junction rating is reached.
In the case of reverse battery in a half-bridge application, a
direct current passes through the external freewheeling diode
and the internal high-side.
As
Figure 17
shows, it is essential to protect this power line.
The proposed solution is an external low-side with its gate tied
to battery voltage through a resistor. A high-side in the V
PWR
line could be another solution but with a more complex drive.
Figure 17. Reverse Battery Protection
M
V
PWR
V
DD
V
PWR
MCU
33981
No current
GND
OUT
Diode
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
21
APPLICATIONS
Figure 18
shows a typical application for the 33981.
A brush
DC motor is connected to the output. A low-side gate driver is
used for the freewheeling phase. Typical values for the external
capacitors and resistances are given.
Figure 18. 33981 Typical Application Diagram
MCU
33981
OUT
SR
EN
FS
INHS
CSNS
I/O
I/O
I/O
A/D
GND
V
PWR
V
DD
C
BOOT
GLS
INLS
I/O
DLS
TEMP
A/D
CONF
OCLS
V
PWR
V
DD
M
2.2 nF
1.0 k
1.0 k
33 k
330
F
100 nF
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
33981
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
22
PACKAGE DIMENSIONS
M
M
2.2 2.20
0.05
C
0.1
C
0.05
C
SEATING PLANE
4
2.0 1.95
0.00
12
1
(
10X
0.4)
M
0.1
C
M
0.05
C
A B
C A B
0.1
4.6
5.0
C
0.1
A B
9X
0.9
2X
1.075
6X
2.05
1.55
1.85
3.55
(2)
6X
0.8
0.4
2X
1.28
0.88
6 PLACES
0.15
0.05
(
10X
0.5)
(0.5)
10.7
10.3
C
0.1
A B
11.2
10.8
(
2X
0.75)
4X
1.45
1.05
C
0.1
A B
5.5
5.1
C
0.1
A B
2.25
1.75
(
10X
0.25)
2.5
2.1
6X
1.1
0.6
2X
0.95
0.55
M
0.1
C
M
0.05
C
A B
10X
0.6
0.2
13
14
15
16
PIN 1
INDEX AREA
12
B
C
0.1
2X
2X
C
0.1
A
12
1
12
16
15
PIN NUMBER
REF. ONLY
DETAIL G
CASE 1402-02
NOTES:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
3. THE COMPLETE JEDEC DESIGNATOR FOR THIS
5. MINIMUM METAL GAP SHOULD BE 0.25MM.
PACKAGE IS: HF-PQFP-N.
4. COPLANARITY APPLIES TO LEADS AND CORNER
LEADS.
DETAIL G
VIEW ROTATED 90 CLOCKWISE
VIEW M-M
PNA SUFFIX
16-TERMINAL PQFN
NONLEADED PACKAGE
CASE 1402-02
ISSUE B
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33981
23
NOTES
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
HOW TO REACH US:
USA/EUROPE/LOCATIONS NOT LISTED:
JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center
Motorola Literature Distribution
3-20-1 Minami-Azabu. Minato-ku, Tokyo 106-8573, Japan
P.O. Box 5405, Denver, Colorado 80217
81-3-3440-3569
1-800-521-6274 or 480-768-2130
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre
2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong
852-26668334
HOME PAGE: http://motorola.com/semiconductors
MC33981
Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied
copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee
regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product
or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be
provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating
parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license
under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product
could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or
unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all
claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
MOTOROLA and the Stylized M Logo are registered in the US Patent and Trademark Office. All other product or service names are the property of their
respective owners.
Motorola, Inc. 2004
F
r
e
e
s
c
a
l
e
S
e
m
i
c
o
n
d
u
c
t
o
r
,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
.
.
PDF 
ZIP