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Электронный компонент: MC74HC151N

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
8-Input Data
Selector/Multiplexer
HighPerformance SiliconGate CMOS
The MC74HC151 is identical in pinout to the LS151. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This device selects one of the eight binary Data Inputs, as determined by
the Address Inputs. The Strobe pin must be at a low level for the selected
data to appear at the outputs. If Strobe is high, the Y output is forced to a low
level and the Y output is forced to a high level.
The HC151 is similar in function to the HC251 which has 3state outputs.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 132 FETs or 33 Equivalent Gates
LOGIC DIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
STROBE
Y
Y
DATA
OUTPUTS
DATA
INPUTS
ADDRESS
INPUTS
5
6
4
3
2
1
15
14
13
12
11
10
9
7
PIN 16 = VCC
PIN 8 = GND
MC74HC151
FUNCTION TABLE
PIN ASSIGNMENT
Inputs
Outputs
A2
A1
A0
Strobe
Y
Y
X
X
X
H
L
H
L
L
L
L
D0
D0
L
L
H
L
D1
D1
L
H
L
L
D2
D2
L
H
H
L
D3
D3
H
L
L
L
D4
D4
H
L
H
L
D5
D5
H
H
L
L
D6
D6
H
H
H
L
D7
D7
D0, D1,
...
, D7 = the level of the respective
D input.
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
D3
D0
D1
D2
STROBE
Y
Y
GND
D7
D6
D5
D4
VCC
A1
A0
A2
D SUFFIX
SOIC PACKAGE
CASE 751B05
N SUFFIX
PLASTIC PACKAGE
CASE 64808
1
16
1
16
ORDERING INFORMATION
MC74HCXXXN
MC74HCXXXD
Plastic
SOIC
MC74HC151
MOTOROLA
HighSpeed CMOS Logic Data
DL129 -- Rev 6
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
0.5 to + 7.0
V
Vin
DC Input Voltage (Referenced to GND)
1.5 to VCC + 1.5
V
Vout
DC Output Voltage (Referenced to GND)
0.5 to VCC + 0.5
V
Iin
DC Input Current, per Pin
20
mA
Iout
DC Output Current, per Pin
25
mA
ICC
DC Supply Current, VCC and GND Pins
50
mA
PD
Power Dissipation in Still Air
Plastic DIP
SOIC Package
750
500
mW
Tstg
Storage Temperature
65 to + 150
_
C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
_
C
* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
Derating -- Plastic DIP: 10 mW/
_
C from 65
_
to 125
_
C
SOIC Package: 7 mW/
_
C from 65
_
to 125
_
C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
Vin, Vout
DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
55
+ 125
_
C
tr, tf
Input Rise and Fall Time
VCC = 2.0 V
(Figure 1)
VCC = 4.5 V
VCC = 6.0 V
0
0
0
1000
500
400
ns
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
VCC
V
Guaranteed Limit
Unit
Symbol
Parameter
Test Conditions
VCC
V
55 to
25
_
C
v
85
_
C
v
125
_
C
Unit
VIH
Minimum HighLevel Input
Voltage
Vout = 0.1 V or VCC 0.1 V
|Iout|
v
20
A
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
VIL
Maximum LowLevel Input
Voltage
Vout = 0.1 V or VCC 0.1 V
|Iout|
v
20
A
2.0
4.5
6.0
0.3
0.9
1.2
0.3
0.9
1.2
0.3
0.9
1.2
V
VOH
Minimum HighLevel Output
Voltage
Vin = VIH or VIL
|Iout|
v
20
A
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
Vin = VIH
|Iout|
v
4.0 mA
|Iout|
v
5.2 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.70
5.20
VOL
Maximum LowLevel Output
Voltage
Vin = VIH or VIL
|Iout|
v
20
A
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
Vin = VIH or VIL |Iout|
v
4.0 mA
|Iout|
v
5.2 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.40
0.40
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
0.1
1.0
1.0
A
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0
A
6.0
8
80
160
A
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND
v
(Vin or Vout)
v
VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
MC74HC151
HighSpeed CMOS Logic Data
DL129 -- Rev 6
3
MOTOROLA
AC ELECTRICAL CHARACTERISTICS
(CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
VCC
V
Guaranteed Limit
Unit
Symbol
Parameter
VCC
V
55 to
25
_
C
v
85
_
C
v
125
_
C
Unit
tPLH,
tPHL
Maximum Propagation Delay, Input D to Output Y or Y
(Figures 1, 3 and 6)
2.0
4.5
6.0
185
37
31
230
46
39
280
56
48
ns
tPLH,
tPHL
Maximum Propagation Delay, Input A to Output Y or Y
(Figures 2 and 6)
2.0
4.5
6.0
205
41
35
255
51
43
310
62
53
ns
tPLH,
tPHL
Maximum Propagation Delay, Strobe to Output Y or Y
(Figures 4, 5 and 6)
2.0
4.5
6.0
125
25
21
155
31
26
190
38
32
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 6)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
Cin
Maximum Input Capacitance
--
10
10
10
pF
NOTES:
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).
CPD
Power Dissipation Capacitance (Per Package)*
Typical @ 25
C, VCC = 5.0 V
pF
CPD
Power Dissipation Capacitance (Per Package)*
36
pF
* Used to determine the noload dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola HighSpeed CMOS Data Book (DL129/D).
PIN DESCRIPTIONS
INPUTS
D0, D1,
...
, D7 (Pins 4, 3, 2, 1, 15, 14, 13, 12)
Data inputs. Data on any one of these eight binary inputs
may be selected to appear on the output.
CONTROL INPUTS
A0, A1, A2 (Pins 11, 10, 9)
Address inputs. The data on these pins are the binary ad-
dress of the selected input (see the Function Table).
Strobe (Pin 7)
Strobe. This input pin must be at a low level for the se-
lected data to appear at the outputs. If the Strobe pin is high,
the Y output is forced to a low level and the Y output is forced
to a high level.
OUTPUTS
Y, Y (Pins 5, 6)
Data outputs. The selected data is presented at these pins
in both true (Y output) and complemented (Y output) forms.
MC74HC151
MOTOROLA
HighSpeed CMOS Logic Data
DL129 -- Rev 6
4
SWITCHING WAVEFORMS
STROBE
Y
Figure 1.
Figure 2.
Figure 3.
tr
tf
tPHL
tPLH
tTHL
tTLH
STROBE
10%
50%
VCC
GND
tf
tr
INPUT D
OUTPUT Y
10%
50%
90%
10%
50%
90%
tTLH
tPLH
tPHL
tTHL
tr
tf
VCC
GND
INPUT D
OUTPUT Y
tPHL
tPLH
tTHL
tTLH
10%
50%
90%
10%
50%
90%
tf
tr
VCC
GND
10%
50%
90%
tPHL
tPLH
10%
50%
90%
tTHL
tTLH
VCC
GND
VCC
GND
50%
INPUT A
tPLH
tPHL
50%
OUTPUT
Y OR Y
10%
50%
90%
90%
Y
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 4.
Figure 5.
Figure 6. Test Circuit
VALID
VALID
MC74HC151
HighSpeed CMOS Logic Data
DL129 -- Rev 6
5
MOTOROLA
Y
Y
5
6
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
4
3
2
1
15
14
13
12
11
10
9
7
DATA
INPUTS
EXPANDED LOGIC DIAGRAM
DATA
OUTPUTS
ADDRESS
INPUTS
STROBE
MC74HC151
MOTOROLA
HighSpeed CMOS Logic Data
DL129 -- Rev 6
6
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 64808
ISSUE R
MIN
MIN
MAX
MAX
INCHES
MILLIMETERS
DIM
A
B
C
D
F
G
H
J
K
L
M
S
18.80
6.35
3.69
0.39
1.02
0.21
2.80
7.50
0
0.51
19.55
6.85
4.44
0.53
1.77
0.38
3.30
7.74
10
1.01
0.740
0.250
0.145
0.015
0.040
0.008
0.110
0.295
0
0.020
0.770
0.270
0.175
0.021
0.070
0.015
0.130
0.305
10
0.040
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
2.54 BSC
1.27 BSC
0.100 BSC
0.050 BSC
A
B
1
8
9
16
F
H
G
D
16 PL
S
C
T
SEATING
PLANE
K
J
M
L
T
A
0.25 (0.010)
M
M
0.25 (0.010)
T
B
A
M
S
S
MIN
MIN
MAX
MAX
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
J
K
M
P
R
9.80
3.80
1.35
0.35
0.40
0.19
0.10
0
5.80
0.25
10.00
4.00
1.75
0.49
1.25
0.25
0.25
7
6.20
0.50
0.386
0.150
0.054
0.014
0.016
0.008
0.004
0
0.229
0.010
0.393
0.157
0.068
0.019
0.049
0.009
0.009
7
0.244
0.019
1.27 BSC
0.050 BSC
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
1
8
9
16
A
B
D
16 PL
K
C
G
T
SEATING
PLANE
R
X 45
M
J
F
P
8 PL
0.25 (0.010)
B
M
M
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B05
ISSUE J
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
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MC74HC151/D
*MC74HC151/D*
CODELINE