5-177
FAST AND LS TTL DATA
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct
Clear and Clock Pulse inputs. Output changes are initiated by the
HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the
other inputs and makes the Q output LOW.
The SN54 / 74LS107A is the same as the SN54 / 74LS73A but has corner
power pins.
NOTE:
The Flatpak version has the
same pinouts (Connection
Diagram) as the Dual In-Line
Package.
CONNECTION DIAGRAM DIP (TOP VIEW)
14
13
12
11
10
9
1
2
3
4
5
6
VCC
8
7
GND
CD1 CP1 K2
CD2 CP2
J2
Q2
Q2
K1
Q1
Q1
J1
LOGIC SYMBOL
VCC = PIN 14
GND = PIN 7
1
1
12
4
3
2
13
J
Q
CP
K
Q
CD
2
8
9
11
5
6
J
Q
CP
K
Q
CD
10
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
TA
Operating Ambient Temperature Range
54
74
55
0
25
25
125
70
C
IOH
Output Current -- High
54, 74
0.4
mA
IOL
Output Current -- Low
54
74
4.0
8.0
mA
SN54/74LS107A
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 632-08
N SUFFIX
PLASTIC
CASE 646-06
14
1
14
1
ORDERING INFORMATION
SN54LSXXXJ
Ceramic
SN74LSXXXN
Plastic
SN74LSXXXD
SOIC
14
1
D SUFFIX
SOIC
CASE 751A-02
5-178
FAST AND LS TTL DATA
SN54/74LS107A
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
VIH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage for
All Inputs
VIL
Input LOW Voltage
54
0.7
V
Guaranteed Input LOW Voltage for
All Inputs
VIL
Input LOW Voltage
74
0.8
V
Guaranteed Input LOW Voltage for
All Inputs
VIK
Input Clamp Diode Voltage
0.65
1.5
V
VCC = MIN, IIN = 18 mA
VOH
Output HIGH Voltage
54
2.5
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOH
Output HIGH Voltage
74
2.7
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOL
Output LOW Voltage
54, 74
0.25
0.4
V
IOL = 4.0 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
VOL
Output LOW Voltage
74
0.35
0.5
V
IOL = 8.0 mA
VIN = VIL or VIH
per Truth Table
IIH
Input HIGH Current
J, K
Clear
Clock
20
60
80
A
VCC = MAX, VIN = 2.7 V
IIH
Input HIGH Current
J, K
Clear
Clock
0.1
0.3
0.4
mA
VCC = MAX, VIN = 7.0 V
IIL
Input LOW Current
J, K
Clear and Clock
0.4
0.8
mA
VCC = MAX, VIN = 0.4 V
IOS
Short Circuit Current (Note 1)
20
100
mA
VCC = MAX
ICC
Power Supply Current
6.0
mA
VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(TA = 25
C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
fMAX
Maximum Clock Frequency
30
45
MHz
VCC = 5.0 V
CL = 15 pF
tPLH
tPHL
Propagation Delay,
Clock to Output
15
20
ns
VCC = 5.0 V
CL = 15 pF
tPLH
tPHL
Propagation Delay,
Clock to Output
15
20
ns
CL = 15 pF
AC SETUP REQUIREMENTS
(TA = 25
C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
tW
Clock Pulse Width
20
ns
VCC = 5.0 V
tW
Clear Pulse Width
25
ns
VCC = 5.0 V
ts
Setup Time
20
ns
VCC = 5.0 V
th
Hold Time
0
ns
5-179
FAST AND LS TTL DATA
MIN
MIN
MAX
MAX
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
0.19
0.10
0
5.80
0.25
8.75
4.00
1.75
0.49
1.25
0.25
0.25
7
6.20
0.50
0.337
0.150
0.054
0.014
0.016
0.008
0.004
0
0.229
0.010
0.344
0.157
0.068
0.019
0.049
0.009
0.009
7
0.244
0.019
1.27 BSC
0.050 BSC
NOTES:
1. DIMENSIONS A" AND B" ARE DATUMS AND
T" IS A DATUM SURFACE.
2. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
3. CONTROLLING DIMENSION: MILLIMETER.
4. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
5. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
6. 751A 01 IS OBSOLETE, NEW STANDARD
751A 02.
-A-
-B-
P
G
C
K
SEATING
PLANE
14 PL
D
M
F
J
7 PL
R X 45
1
7
8
14
Case 751A-02 D Suffix
14-Pin Plastic
SO-14
B
0.25 (0.010)
M
M
T
0.25 (0.010)
B
A
M
S
S
Case 632-08 J Suffix
14-Pin Ceramic Dual In-Line
MIN
MIN
MAX
MAX
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
J
K
L
M
N
19.05
6.23
3.94
0.39
1.40
0.21
3.18
0
0.51
19.94
7.11
5.08
0.50
1.65
0.38
4.31
15
1.01
0.750
0.245
0.155
0.015
0.055
0.008
0.125
0
0.020
0.785
0.280
0.200
0.020
0.065
0.015
0.170
15
0.040
2.54 BSC
7.62 BSC
0.100 BSC
0.300 BSC
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIM F MAY NARROW TO 0.76 (0.030) WHERE
THE LEAD ENTERS THE CERAMIC BODY.
5. 632 01 THRU 07 OBSOLETE, NEW STANDARD
632 08.
14
8
1
7
-A-
-B-
-T-
SEATING
PLANE
F
G
D
14 PL
N
K
C
L
J
14 PL
M
0.25 (0.010)
T A
M
S
0.25 (0.010)
T B
M
S
Case 646-06 N Suffix
14-Pin Plastic
MIN
MIN
MAX
MAX
MILLIMETERS
INCHES
DIM
18.16
6.10
3.69
0.38
1.02
1.32
0.20
2.92
19.56
6.60
4.69
0.53
1.78
2.41
0.38
3.43
0
0.39
0.715
0.240
0.145
0.015
0.040
0.052
0.008
0.115
0.770
0.260
0.185
0.021
0.070
0.095
0.015
0.135
10
1.01
2.54 BSC
7.62 BSC
0.100 BSC
0.300 BSC
0
0.015
10
0.039
A
B
C
D
F
G
H
J
K
L
M
N
NOTES:
1. LEADS WITHIN 0.13 mm (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L" TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B" DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
5. 646 05 OBSOLETE, NEW STANDARD 646 06.
1
7
14
8
B
A
NOTE 4
F
H
G
D
SEATING
PLANE
N
K
C
L
J
M
5-180
FAST AND LS TTL DATA
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different
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associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
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