4707 Dey Road Liverpool, N.Y. 13088
M.S.KENNEDY CORP.
(315) 701-6751
FEATURES:
Industry Wide LH0033/EL2005 Replacement
Low Input Offset - 2mV
Low Input Offset Drift - 25V/C
FET Input, Low Input Current - 50pA
High Slew Rate - 1500V/S
Wide Bandwidth - 140MHz
High Output Current - 100mA
Available to DSCC SMD 5962-80014
DESCRIPTION:
FET INPUT HIGH SPEED VOLTAGE
FOLLOWER/BUFFER AMPLIFIER
Sample And Hold
Impedance Buffers For A to D's
High Speed Line Drivers
CRT Deflection Driver
1
2
3
4
5
6
Positive Driver Power
Supply
N/C
N/C
N/C
Input
Offset Preset
Offset Adjust
N/C
Negative Driver Power Supply
Negative Power Supply
Output
Positive Power Supply
7
8
9
10
11
12
0033
PIN-OUT INFORMATION
TYPICAL APPLICATIONS
ISO 9001 CERTIFIED BY DSCC
1
Rev. B 7/00
MIL-PRF-38534 CERTIFIED
EQUIVALENT SCHEMATIC
The MSK 0033(B) is a high speed, wide bandwidth voltage follower/buffer amplifier that is pin compatible with all
other 0033 designs. The FET input is cascaded to force the input characteristics to remain constant over the full input
voltage range. Significantly improved performance in sample and hold circuits is achieved since the DC bias current
remains constant with input voltage. The FET input also makes the MSK 0033 very accurate since it produces
extremely low input bias current, input offset voltage and input offset voltage drift specifications. Transistion times in
the range of 2.5 nS make the MSK 0033 fast enough for most high speed voltage follower/buffer amplifier applica-
tions.
Max.
18
22
10
250
100
10
-
-
-
-
-
-
-
-
-
-
V
IN
=0V
Short Pin 6 to Pin 7 V
IN
=0V
Short Pin 6 to Pin 7 V
IN
=0V
Pin 6=open R
POT
=200
From Pin 7 to Pin 9
V
CM
=0V
Either Input
F=DC
10V
V
S
20V
F=10Hz to 1KHz
F=1KHz
V
IN
=14V R
L
=1K
V
IN
=10.5V R
L
=100
2V step
V
IN
=1V
RMS
R
L
=1K
V
OUT
=10V
R
S
=100
V
IN
=1V
RMS
F=1KHz
1
2
3
4
5
6
7
8
9
ABSOLUTE MAXIMUM RATINGS
T
ST
T
LD
T
J
R
TH
Storage Temperature Range
Lead Temperature Range
(10 Seconds)
Junction Temperature
Thermal Resistance
Junction to Case
Output Devices Only
Supply Voltage
Output Current
Differential Input Voltage
Case Operating Temperature
(MSK 0033B)
(MSK 0033)
-65C to +150C
300C
175C
65C/W
20V
120mA
20V
-55C to +125C
-40C to +85C
V
CC
I
OUT
V
IN
T
C
Group A
Subgroup
-
1
1
2,3
1,2,3
1
2,3
-
-
-
-
4
4
-
-
4
4
STATIC
Supply Voltage Range
Quiescent Current
INPUT
Offset Voltage
Offset Voltage Drift
Offset Adjust
Input Bias Current 9
Input Impedance 3
Power Supply Rejection Ratio 2
Input Noise Density 3
Input Noise Voltage 3
OUTPUT
Output Voltage Swing
Output Current
Settling Time to 1% 2 3
Bandwidth (-3dB) 3
TRANSFER CHARACTERISTICS
Slew Rate
Voltage Gain
Typ.
15
19
2.0
25
50
2
10
75
1.5
40
12.5
110
25
140
1500
0.99
Min.
10
-
-
-
-
-
-
65
-
-
12
90
-
-
1000
0.97
Min.
10
-
-
-
-
-
-
60
-
-
12
90
-
-
1000
0.95
Max.
18
25
15
-
500
-
-
-
-
-
-
-
-
-
-
-
Typ.
15
19
5
-
50
2
10
75
1.5
40
12.5
110
25
140
1500
0.98
Units
V
mA
mV
V/C
mV
pA
nA
dB
VRMS
nV/
Hz
V
mA
nS
MHz
V/S
V/V
MSK 0033B
MSK 0033
Parameter
Adjust to Zero
Adjust to Zero
12
12
Test Conditions
Unless otherwise specified VCC = 15 VDC.
Measured within a high speed amplifier feedback loop.
Devices shall be capable of meeting the parameter, but need not be tested. Typical parameters are for reference only.
Industrial grade devices shall be tested to subgroups 1 and 4 unless otherwise specified.
Military grade devices ('B' suffix) shall be 100% tested to subgroups 1,2,3 and 4.
Subgroup 5 and 6 testing available upon request.
Subgroup 1,4 T
A
=T
C
=+25C
Subgroup 2,5 T
A
=T
C
=+125C
Subgroup 3,6 T
A
=T
C
=-55C
Electrical specifications are derated for power supply voltages other than 15VDC.
Measurement made 0.5 seconds after application of power. Actual DC continuous test limit is 2.5 nA at 25C
ELECTRICAL SPECIFICATIONS
2
Rev. B 7/00
NOTES:
8
3
HEAT SINKING
To determine if a heat sink is necessary for your application
and if so, what type, refer to the thermal model and governing
equation below.
Example:
This example demonstrates a worst case analysis for the buffer
output stage. This occurs when the output voltage is 1/2 the
power supply voltage. Under this condition, maximum power
transfer occurs and the output is under maximum stress.
Conditions:
V
CC
= 16VDC
V
O
= 8Vp Sine Wave, Freq. = 1KHz
R
L
= 100
Governing Equation:
T
J
=P
D
x (R
JC
+ R
CS
+ R
SA
) + T
A
Where
T
J
= Junction Temperature
P
D
= Total Power Dissipation
R
JC
= Junction to Case Thermal Resistance
R
CS
= Case to Heat Sink Thermal Resistance
R
SA
= Heat Sink to Ambient Thermal Resistance
T
C
= Case Temperature
T
A
= Ambient Temperature
T
S
= Sink Temperature
R
SA
= ((T
J
- T
A
)/P
D
) - (R
JC
) - (R
CS
)
= ((125C - 80C) / .64W) - 65C/W - .15C/W
= 70.3 - 65.15
= 5.2C/W
The heat sink in this example must have a thermal resistance
of no more than 5.2C/W to maintain a junction temperature of
no more than +125C.
Thermal Model:
For a worst case analysis we will treat the 8Vp sine wave
as an 8 VDC output voltage.
1.) Find Driver Power Dissipation
P
D
= (V
CC
-V
O
) (V
O
/R
L
)
= (16V-8V) (8V/100
)
= 640mW
2.) For conservative design, set T
J
=+125C Max.
3.) For this example, worst case T
A
=+80C
4.) R
JC
= 65C/W from MSK 0033B Data Sheet
5.) R
CS
= 0.15C/W for most thermal greases
6.) Rearrange governing equation to solve for R
SA
POWER SUPPLY BYPASSING
Both the negative and the positive power supplies must be
effectively decoupled with a high and low frequency bypass
circuit to avoid power supply induced oscillation. An effective
decoupling scheme consists of a 0.1 microfarad ceramic ca-
pacitor in parallel with a 4.7 microfarad tantalum capacitor from
each power supply pin to ground.
APPLICATION NOTES
OFFSET VOLTAGE ADJUST
See Figure 1. To externally null the offset voltage, connect a
200
potentiometer between Pins 7 and 10 and leave Pin 6
open. If offset null is not necessary, short Pin 6 to Pin 7 and
remove the 200
potentiometer. Do not connect Pin 7 to -
Vcc.
CURRENT LIMITING
See Figure 1. If no current limit is required, short Pin 1 to Pin
12 and Pin 9 to Pin 10 and delete Q1 thru Q4 connections. Q1
through Q4 and the Rlim resistors form a current source current
limit scheme and current limit resistor values can be calculated
as follows:
+Rlim
Vbe -Rlim
Vbe
Isc Isc
Since current limit is directly proportional to the base-emitter
voltage drop of the 2N2222's and 2N2907's in the current
limit scheme, the current limit value will change slightly with
ambient temperature changes. The base-emitter voltage drop
will decrease as temperature increases causing the actual cur-
rent limit point to decrease.
3
Rev. B 7/00
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