4707 Dey Road Liverpool, N.Y. 13088
(315) 701-6751
M.S.KENNEDY CORP.
ISO 9001 CERTIFIED BY DSCC
FEATURES:
Extremely Fast - 500v/S
Wide Supply Range 15V to 45V
VMOS Output, No S.O.A. Restrictions
Large Gain-Bandwidth Product
FET Input
Electrically Isolated Case
800mA Typical Output Current
1461
HIGH SPEED/VOLTAGE
OP AMP
The MSK 1461 is a state of the art high speed FET input operational amplifier. The distinguishing characteristic
of the MSK 1461 is its unique VMOS output stage which completely eliminates the safe operating area restrictions
associated with secondary breakdown of bipolar transistor output stage op-amps. Freedom from secondary break-
down allows the 1461 to handle large output currents at any voltage level limited only by transistor junction tempera-
ture. 115 dB of open loop gain gives the 1461 high closed loop gain accuracy and the typical 1.0mV of input offset
voltage will fit well in any error budget. A 500 V/S slew rate and 1200 MHz gain bandwidth product make the 1461
an outstanding high-speed op-amp. A single external capacitor is used for compensation and output current limiting
is user programmable through the selection of two external resistors.
DESCRIPTION:
MIL-PRF-38534 CERTIFIED
8
9
10
11
12
13
14
Output
Positive Current Limit
Positive Power Supply
Compensation
Compensation
Offset Adjust
Offset Adjust
1
2
3
4
5
6
7
Inverting Input
Non-Inverting Input
No Connection
No Connection
Negative Power Supply
Negative Current Limit
No Connection
PIN-OUT INFORMATION
TYPICAL APPLICATIONS
Video Yoke Drivers
Video Distribution Amplifiers
High Accuracy Audio Amplification
High Speed ATE Pin Drivers
EQUIVALENT SCHEMATIC
Rev. B 8/00
1
45V
800mA
25V
12C/W
V
IN
=0V
V
CM
=0V
Quiescent Current
Input Bias Current
Input Offset Current
Output Voltage Swing
Junction to Case
V
IN
=0V A
V
=-10V/V
Bal. Pins=N/C
R
POT
=10K
to +V
CC
V
CM
=0V
Either Input
F=DC
F=10KHz V
CM
=22V
R
L
=50
A
V
=-5V/V
R
L
=1K
R
L
=33
A
V
=-5V/V T
J
<175C
0.1% 10V step
V
OUT
=10V R
L
=1K
A
V
=-5V/V
R
L
=1K
F=100Hz
F=100KHz
STATIC
Supply Voltage Range
Thermal Resistance
INPUT
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Adjust
Input Impedance
Common Mode Range
Common Mode Rejection Ratio
OUTPUT
Output Current, Peak
Settling Time
TRANSFER CHARACTERISTICS
Slew Rate
Open Loop Voltage Gain
Gain Bandwidth Product
ABSOLUTE MAXIMUM RATINGS
V
CC
I
OUT
V
IN
R
TH
T
ST
T
LD
T
C
T
J
V
mA
mA
C/W
mV
V/C
V
pA
nA
pA
nA
V
dB
V
V
mA
nS
V/S
dB
MHz
Parameter
ELECTRICAL SPECIFICATIONS
Units
Test Conditions
Max.
45
28
-
15
8.0
-
-
300
-
-
-
-
-
-
-
-
-
800
-
-
-
Typ.
-
19
-
11
1.0
10
8.0
10
-
5.0
-
3x10
24
100
31
33
800
400
500
106
1200
Min.
15
-
-
-
-
-
-
-
-
-
-
-
22
90
27
30
600
-
200
90
800
Max.
45
25
35
12
5.0
50
-
300
100
-
-
-
-
-
-
-
-
800
-
-
-
Typ.
-
19
21
11
1.0
6.0
8.0
10
10
5.0
5.0
3x10
24
100
31
33
800
400
500
106
1200
Min.
15
-
-
-
-
-
-
-
-
-
-
-
22
90
27
30
600
-
200
90
800
MSK 1461
MSK 1461B
-
1
2,3
-
1
2,3
-
1
2,3
-
-
-
-
4
4
4
4
4
4
4
4
Group A
Subgroup
12
12
3
3
2 3
3
3
3
3
3
3
3
1
2
3
4
5
6
7
NOTES:
R
SC
=0
and V
CC
=36VDC unless otherwise specified.
AV=-1, measured in false summing junction circuit.
Devices shall be capable of meeting the parameter, but need not be tested. Typical parameters are for reference only.
Industrial grade devices shall be tested to subgroups 1 and 4 unless otherwise specified.
Military grade devices ("B" suffix) shall be 100% tested to subgroups 1,2,3 and 4.
Subgroups 5 and 6 testing available upon request.
Subgroup 1,4
Subgroup 2,5
Subgroup 3,6
T
C
=+25C
T
J
=+125C
T
A
=-55C
-65C to +150C
300C
-55C to +125C
-40C to 85C
+175C
Storage Temperature Range
Lead Temperature Range
(10 Seconds)
Case Operating Temperature
(MSK 1461B)
(MSK 1461)
Junction Temperature
Supply Voltage
Output Current
Differential Input Voltage
Thermal Resistance
Junction to Case
(Output Devices Only)
Rev. B 8/00
2
1.) Find Driver Power Dissipation
P
D
= [(quiescent current) x (+V
S
- (-V
S
))] +
[(+V
S
-V
O
) x I
OUT
]
= [(50mA) x (80V)] + [(20V) x (0.05A)]
= 4W + 1.0W
= 5Watts
2.) For conservative design, set T
J
=+125C.
3.) For this example, worst case T
A
=+50C
4.) R
JC
= 12C/W from MSK 1461B Data Sheet
5.) R
CS
= 0.15C/W for most thermal greases
6.) Rearrange governing equation to solve for R
SA
R
SA
= ((T
J
- T
A
)/P
D
) - (R
JC
) - (R
CS
)
= ((125C - 50C) / 5W) - (12C/W) - (.15C/W)
2.85C/W
The heat sink in this example must have a thermal
resistance of no more than 2.85C/W to maintain a junc-
tion temperature of no more than +125C
.
APPLICATION NOTES
HEAT SINKING
To select the correct heat sink for your application,
refer to the thermal model and governing equation below.
Thermal Model:
Governing Equation:
CURRENT LIMIT
The output current of the MSK 1461 is internally lim-
ited to approximately 750mA by two 0.8
internal cur-
rent limit resistors. Additional current limit can be achieved
through the use of two external current limit resistors.
One resistor (+R
SC
) limits the positive output current and
the other (-R
SC
) limits the negative output current. The
value of the current limit resistors can be determined as
follows:
Since the 0.65V term is obtained from the base to
emitter voltage drop of a bipolar transistor, the equation
only holds true for +25C operation. As case tempera-
ture increases, the 0.65V term will decrease making the
actual current limit set point decrease slightly.
R
SC
= [(0.65V/I
LIM
) - 0.8
]
T
J
=P
D
x (R
JC
+ R
CS
+ R
SA
) + T
A
Where
T
J
= Junction Temperature
P
D
= Total Power Dissipation
R
JC
= Junction to Case Thermal Resistance
R
CS
= Case to Heat Sink Thermal Resistance
R
SA
= Heat Sink to Ambient Thermal Resistance
T
C
= Case Temperature
T
A
= Ambient Temperature
T
S
= Sink Temperature
Example:
In our example the amplifier application requires the
output to drive a 20 volt peak sine wave across a 400
load for 50mA of peak output current. For a worst case
analysis we will treat the 50mA peak output current as a
D.C. output current. The power supplies shall be set to
40VDC.
The following schematic illustrates how to connect
each current limit resistor:
IN
Any designer who has worked with power operational
amplifiers is familiar with Safe Operating Area (S.O.A.)
curves. S.O.A. curves are a graphical representation of
the following three power limiting factors of any bipolar
transistor output op-amp.
1. Wire Bond Current Carrying Capability
2. Transistor Junction Temperature
3. Secondary Breakdown Limitations
Since the MSK 1461 utilizes a MOSFET output, there
are no secondary breakdown limitations and therefore no
need for S.O.A. curves. The only limitation on output
power is the junction temperature of the output drive tran-
sistors.
Whenever possible, junction temperature should be
kept below 150C to ensure high reliability. See "Heat
Sinking" for more information involving junction tempera-
ture calculations.
SAFE OPERATING AREA
Both the negative and the positive power supplies must
be effectively decoupled with a high and low frequency
bypass circuit to avoid power supply induced oscillation.
An effective decoupling scheme consists of a 0.1F ce-
ramic capacitor in parallel with a 4.7F tantalum capaci-
tor from each power supply pin to ground.
POWER SUPPLY BYPASSING
INPUT OFFSET ADJUST CONNECTION
Rev. B 8/00
3
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