BLOCK DIAGRAM
GENERAL DESCRIPTION
FEATURES
CS5854
Preliminary
TFT Gate Driver (240 Outputs)
Sales@myson.com.tw
www.myson.com.tw
Rev.0.94 Oct. 2003
page 1 of 26
Myson Century, Inc.
No. 2, Industry East Rd. III,
Science-Based Industrial Park, Hsin-Chu, Taiwan
Tel: 886-3-578-4866 Fax: 886-3-578-4349
The CS5854 is a gate driver with 240 outputs for
the TFT LCD panel. The logic and control portion is
implemented in standard CMOS circuits while the
output drivers use high voltage CMOS design. The
low voltage part includes a 240-stage bidirectional
shift register with right and left shift I/O for cascading.
The output of the shift register is then level translated
to drive the high voltage output buffer. There are four
supply voltages for the CS5854. VDD/VLL are the
supply voltages for logic interfaces. Typically VDD is
at 3.3V/5.0V while VLL is 0V. VGON and VSS are
the supply voltages for the output driver. VSS is the
most negative supply voltage for the internal
substrate of the CS5854.
The CS5854 allows one output enable control
(OE), and one global enable signal (XON).
240 gate drive outputs
Bidirectional shift control and cascadable
Output enable control
Maximum shift clock frequency up to 100KHz
3.3V/5.0V CMOS logic I/O
High voltage output drive
Operating supply range
Logic (VDD-VLL: 2.7V~5.5V)
Output Drive (VGON -VSS: 15V~40V)
Bare chip with gold bump for COG solution.
DIOL
SCLK
SHIFT CONTROL REGISTER
CS5854
ENABLE CONTROL
OUTPUT BUFFER
LEVEL SHIFT
DIOR
RL
OE
VGON
OUT1 OUT2
OUT239 OUT240
VDD
VLL
VSS
XON
*This datasheet is the confidential information of MYSON CENTURY, INC. and is subject to various privileges
against unauthorized disclosure. Recipient shall not disclose this confidential information to any other person,
nor shall one use the confidential information for the purpose of competing with MYSON CENTURY, INC.
CONFIDENTIAL
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