NanoAmp Solutions, Inc.
670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035
ph: 408-935-7777, FAX: 408-935-7770
www.nanoamp.com
N08L163WC1C
Stock No. 23394-B 01/05
1
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
Advance Information
8Mb Ultra-Low Power Asynchronous CMOS SRAM
512K 16 bit
Overview
The N08L163WC1C is an integrated memory
device containing a 8 Mbit Static Random Access
Memory organized as 524,288 words by 16 bits.
The device is designed and fabricated using
NanoAmp's advanced CMOS technology to
provide both high-speed performance and ultra-low
power. Byte controls (UB and LB) allow the upper
and lower bytes to be accessed independently and
can also be used to deselect the device. The
N08L163WC1C is optimal for various applications
where low-power is critical such as battery backup
and hand-held devices. The device can operate
over a very wide temperature range of -40
o
C to
+85
o
C and is available in JEDEC standard
packages compatible with other standard 512Kb x
16 SRAMs
Features
Single Wide Power Supply Range
2.2 to 3.6 Volts
Very low standby current
2.0A at 3.0V (Typical)
Very low operating current
1.5mA at 3.0V and 1s(Typical)
Simple memory control
Byte control for independent byte operation
Output Enable (OE) for memory expansion
Low voltage data retention
Vcc = 1.5V
Very fast output enable access time
25ns OE access time
Automatic power down to standby mode
TTL compatible three-state output driver
Ultra Low Power Sort Avaliable
Pin Configuration
Product Family
Part Number
Package Type
Operating
Temperature
Power
Supply (Vcc)
Speed
Standby
Current
(I
SB
),
Typical
Operating Current
(Icc), Typical
N08L163WC1CT1 44-TSOP II Pb-Free -40
o
C to +85
o
C
2.2V - 3.6V
55ns
2
A
1.5 mA @ 1MHz
PIN
ONE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A
4
A
3
A
2
A
1
A
0
CE
I/O
0
I/O
1
I/O
2
I/O
3
VCC
VSS
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
18
A
17
A
16
A
15
A
14
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A
5
A
6
A
7
OE
UB
LB
I/O
15
I/O
14
I/O
13
I/O
12
VSS
VCC
I/O
11
I/O
10
I/O
9
I/O
8
A
8
A
9
A
10
A
11
A
12
A
13
N0
8L1
63W
C1C
T
S
OP
- I
I
Pin Descriptions
Pin Name
Pin Function
A
0
-A
18
Address Inputs
WE
Write Enable Input
CE
Chip Enable Input
OE
Output Enable Input
LB
Lower Byte Enable Input
UB
Upper Byte Enable Input
I/O
0
-I/O
15
Data Inputs/Outputs
V
CC
Power
V
SS
Ground
NC
Not Connected
Stock No. 23394-B 01/05
2
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
NanoAmp Solutions, Inc.
N08L163WC1C
Advance Information
Functional Block Diagram
Functional Description
CE
WE
OE
UB
LB
I/O
0
- I/O
15
1
1. When UB and LB are in select mode (low), I/O
0
- I/O
15
are affected as shown. When LB only is in the select mode only I/O
0
- I/O
7
are affected as shown. When UB is in the select mode only I/O
8
- I/O
15
are affected as shown.
MODE
POWER
H
X
X
X
X
High Z
Standby
2
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are inter-
nally isolated from any external influence and disabled from exerting any influence externally.
Standby
X
X
X
H
H
High Z
Standby
2
Standby
L
L
X
3
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
L
1
L
1
Data In
Write
3
Active
L
H
L
L
1
L
1
Data Out
Read
Active
L
H
H
L
1
L
1
High Z
Active
Active
Capacitance
1
1. These parameters are verified in device characterization and are not 100% tested
Item
Symbol
Test Condition
Min
Max
Unit
Input Capacitance
C
IN
V
IN
= 0V, f = 1 MHz, T
A
= 25
o
C
10
pF
I/O Capacitance
C
I/O
V
IN
= 0V, f = 1 MHz, T
A
= 25
o
C
10
pF
Address
Inputs
A0 - A3
Address
Inputs
A4 - A18
Word
Address
Decode
Logic
32K Page
x 16 word
x 16 bit
RAM Array
W
o
rd Mux
Input/
Output
Mux
and
Buffers
Page
Address
Decode
Logic
Control
Logic
CE
WE
OE
UB
LB
I/O0 - I/O7
I/O8 - I/O15
Stock No. 23394-B 01/05
3
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
NanoAmp Solutions, Inc.
N08L163WC1C
Advance Information
Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional oper-
ation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Absolute Maximum Ratings
Item
Symbol
Rating
Unit
Voltage on any pin relative to V
SS
V
IN,OUT
0.3 to V
CC
+0.3
V
Voltage on V
CC
Supply Relative to V
SS
V
CC
0.3 to 4.5
V
Power Dissipation
P
D
500
mW
Storage Temperature
T
STG
65 to 150
o
C
Operating Temperature
T
A
-40 to +85
o
C
Soldering Temperature and Time
T
SOLDER
260
o
C, 10sec
o
C
Operating Characteristics (Over Specified Temperature Range)
Item
Symbol
Test Conditions
Min.
Typ
1
1. Typical values are measured at Vcc=Vcc Typ., T
A
=25C and not 100% tested.
Max
Unit
Supply Voltage
V
CC
2.2
3.0
3.6
V
Data Retention Voltage
V
DR
Chip Disabled
1.5
V
Input High Voltage
V
IH
Vcc = 2.2V to 2.7V
1.8
V
CC
+0.3
V
Vcc = 2.2V to 2.7V
2.2
V
CC
+0.3
Input Low Voltage
V
IL
Vcc = 2.2V to 2.7V
0.3
0.6
V
Vcc = 2.2V to 2.7V
-0.3
0.8
Output High Voltage
V
OH
I
OH
= -0.1mA, Vcc = 2.2V
2.0
V
I
OH
= -1.0mA, Vcc = 2.7V
2.4
Output Low Voltage
V
OL
I
OL
= 0.1mA, Vcc = 2.2V
0.4
V
I
OL
= 2.1mA, Vcc = 2.2V
0.4
Input Leakage Current
I
LI
V
IN
= 0 to V
CC
-1
1
A
Output Leakage Current
I
LO
OE = V
IH
or Chip Disabled
-1
1
A
Read/Write Operating Supply Current
@ 1
s Cycle Time
2
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive
output capacitance expected in the actual system.
I
CC1
V
CC
=3.6 V, V
IN
=V
IH
or V
IL
Chip Enabled, I
OUT
= 0
1.5
3.0
mA
-L
1.5
3.0
Read/Write Operating Supply Current
@ fmax
I
CC2
V
CC
=3.6 V, V
IN
=V
IH
or V
IL
Chip Enabled, I
OUT
= 0
12.0
20.0
mA
-L
12.0
15.0
Maximum Standby Current
I
SB1
V
IN
= V
CC
or 0V
Chip Disabled
t
A
= 85
o
C, V
CC
= 3.6 V
2.0
20
A
-L
2.0
8
Maximum Data Retention Current
I
DR
Vcc = 1.5V, CE
Vcc - 0.2V,
VIN
Vcc - 0.2V or VIN
0.2V
10
A
-L
4
Stock No. 23394-B 01/05
4
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
NanoAmp Solutions, Inc.
N08L163WC1C
Advance Information
Note:
1. Full device AC operation assumes a 100us ramp time from 0 to Vcc(min) and 200us wait time after Vcc stablization.
2. Full device operation requires linear Vcc ramp from V
DR
to Vcc(min)
100us or stable at Vcc(min) 100us.
Timing Test Conditions
Item
Input Pulse Level
0.1V
CC
to 0.9 V
CC
Input Rise and Fall Time
1V/ns
Input and Output Timing Reference Levels
0.5 V
CC
Output Load
CL = 50pF
Operating Temperature
-40 to +85
o
C
Timing
Item
Symbol
55
Units
Min
Max
Read Cycle Time
t
RC
55
ns
Address Access Time (Random Access)
t
AA
55
ns
Chip Enable to Valid Output
t
CO
55
ns
Output Enable to Valid Output
t
OE
25
ns
Byte Select to Valid Output
t
LB
, t
UB
55
ns
Chip Enable to Low-Z output
t
LZ
10
ns
Output Enable to Low-Z Output
t
OLZ
5
ns
Byte Select to Low-Z Output
t
LBZ
, t
UBZ
10
ns
Chip Disable to High-Z Output
t
HZ
20
ns
Output Disable to High-Z Output
t
OHZ
20
ns
Byte Select Disable to High-Z Output
t
LBHZ
, t
UBHZ
20
ns
Output Hold from Address Change
t
OH
10
ns
Write Cycle Time
t
WC
55
ns
Chip Enable to End of Write
t
CW
40
ns
Address Valid to End of Write
t
AW
40
ns
Byte Select to End of Write
t
LBW
, t
UBW
40
ns
Write Pulse Width
t
WP
40
ns
Address Setup Time
t
AS
0
ns
Write Recovery Time
t
WR
0
ns
Write to High-Z Output
t
WHZ
20
ns
Data to Write Time Overlap
t
DW
25
ns
Data Hold from Write Time
t
DH
0
ns
End Write to Low-Z Output
t
OW
10
ns
Stock No. 23394-B 01/05
5
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
NanoAmp Solutions, Inc.
N08L163WC1C
Advance Information
Timing of Read Cycle (CE = OE = V
IL
, WE = V
IH
)
Timing Waveform of Read Cycle (WE=V
IH
)
Address
Data Out
t
RC
t
AA,
t
OH
Data Valid
Previous Data Valid
Address
LB, UB
OE
Data Valid
t
RC
t
AA,
t
HZ
t
OHZ
t
LBHZ,
t
UBHZ
t
OLZ
t
OE
t
LZ
High-Z
Data Out
t
LB,
t
UB
t
LBLZ,
t
UBLZ
CE
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