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Электронный компонент: N16D1618LPAC2-10I

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NanoAmp Solutions, Inc.
670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035
ph: 408-935-7777, FAX: 408-935-7770
www.nanoamp.com
N16D1618LPA
Stock No. 23395- Rev L 1/06
1
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
Advance Information
512K 16 Bits 2 Banks Low Power Synchronous DRAM
DESCRIPTION
These N16D1618LPA are low power 16,777,216 bits CMOS Synchronous DRAM organized as 2 banks of 524,288
words x 16 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the
clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally
pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.
Features
JEDEC standard 1.8V power supply.
Auto refresh and self refresh.
All pins are compatible with LVTTL interface.
4K refresh cycle / 64ms.
Programmable Burst Length and Burst Type.
- 1, 2, 4, 8 or Full Page for Sequential Burst.
- 4 or 8 for Interleave Burst.
Programmable CAS Latency : 2,3 clocks.
Programmable Driver Strength Control.
- Full Strength or 1/2, 1/4 of Full Strength
Deep Power Down Mode
All inputs and outputs referenced to the positive
edge of the system clock.
Data mask function by DQM.
Internal dual banks operation.
Burst Read Single Write operation.
Special Function Support.
-PASR (Partial Array Self Refresh)
-Auto TCSR(Temperature Compensated Self Refresh)
Automatic precharge, includes CONCURRENT
Auto Precharge Mode and controlled Precharge
Table 1: Ordering Information
PART NO.
CLOCK Freq.
Temperature
VDD/VDDQ
INTERFACE
PACKAGE
N16D1618LPAZ2-75I
133MHz
-25
o
C to
85
o
C
1.8V/1.8V
LVTTL
48-Ball Green
FBGA
N16D1618LPAZ2-10I
100MHz
N16D1618LPAC2-60I
166MHz
60-Ball Green
WBGA
N16D1618LPAC2-75I
133MHz
N16D1618LPAC2-10I
100MHz
N16D1618LPAT2-60I
166MHz
50-Pin Green
TSOP II
N16D1618LPAT2-75I
133MHz
N16D1618LPAT2-10I
100MHz
N16D1618LPA
Stock No. 23395- Rev L 1/06
2
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
Advance Information
NanoAmp Solutions, Inc.
Figure 1: Package Configuration (60Ball WBGA)
Note:
1. All Dimensions in millimeters
VSS
DQ15
DQ0
VDD
DQ14
VSSQ
VDDQ
DQ1
DQ13
VDDQ
VSSQ
DQ2
DQ12
DQ11
DQ4
DQ3
DQ10
VSSQ
VDDQ
DQ5
DQ9
VDDQ
VSSQ
DQ6
DQ8
NC
NC
DQ7
NC
NC
NC
NC
NC
UDQM
LDQM
/WE
NC
CLK
/RAS
/CAS
CKE
NC
NC
/CS
A11
A9
NC
NC
A8
A7
A0
A10
A6
A5
A2
A1
VSS
A4
A3
VDD
[Bottom View]
7 6 5 4 3 2 1
0.65
3.9
10.1
0.
1
6.4 0.1
9.1
1.0max
0.23 0.05
0.3 0.05
Unit [mm]
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
1 2 3 4 5 6 7
[Top View]
0.65
1.25
VSS
DQ15
DQ0
VDD
DQ14
VSSQ
VDDQ
DQ1
DQ13
VDDQ
VSSQ
DQ2
DQ12
DQ11
DQ4
DQ3
DQ10
VSSQ
VDDQ
DQ5
DQ9
VDDQ
VSSQ
DQ6
DQ8
NC
NC
DQ7
NC
NC
NC
NC
NC
UDQM
LDQM
/WE
NC
CLK
/RAS
/CAS
CKE
NC
NC
/CS
A11
A9
NC
NC
A8
A7
A0
A10
A6
A5
A2
A1
VSS
A4
A3
VDD
[Bottom View]
7 6 5 4 3 2 1
0.65
3.9
10.1
0.
1
6.4 0.1
9.1
1.0max
0.23 0.05
0.3 0.05
Unit [mm]
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
1 2 3 4 5 6 7
[Top View]
0.65
1.25
N16D1618LPA
Stock No. 23395- Rev L 1/06
3
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
Advance Information
NanoAmp Solutions, Inc.
Figure 2: Package Configuration (48Balls FBGA)
Note:
1. All Dimensions in millimeters
[Bottom View]
[Top View]
CLK
/CS
A0
A1
A2
/CAS
DQ8
NC
A3
A4
CKE
DQ0
DQ9
DQ10
A5
A6
DQ1
DQ2
VSS
DQ11
/RAS
A7
DQ3
VDDQ
VDD
DQ12
NC
NC
DQ4
VSSQ
DQ14
DQ13
NC
NC
DQ5
DQ6
DQ15
NC
UDQM
LDQM
/WE
DQ7
NC
A8
A9
A10
A11
NC
A
B
C
D
E
F
G
H
1
2
3
4
5
6
A
B
C
D
E
F
G
H
6
5
4
3
2
1
8
0.1
5.25
0.
75
6.0 0.1
3.75
0.75
0.23 0.05
0.30 0.05
1.0max
1.125
Unit [mm]
N16D1618LPA
Stock No. 23395- Rev L 1/06
4
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
Advance Information
NanoAmp Solutions, Inc.
Figure 3: Package Configuration (50 Pin TSOP II)
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
50 Pin
TSOP II
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
VDD
DQ0
DQ1
GNDQ
DQ2
DQ3
VDDQ
DQ4
DQ5
GNDQ
DQ6
DQ7
VDDQ
LDQM
/WE
/CAS
/RAS
/CS
A11
A10
A0
A1
A2
A3
VDD
GND
DQ15
DQ14
GNDQ
DQ13
DQ12
VDDQ
DQ11
DQ10
GNDQ
DQ9
DQ8
VDDQ
NC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
GND
20
.9
5 0.1
0
10.16 0.10
0.80 BSC
0
o
- 8
o
[Top View]
11.76 0.20
1.20 MAX
0.50 0.10
NOTES:
1. All dimensions in millimeters unless otherwise noted
2. BSC = Basic lead spacing between centers
3. MAX / MIN
0.49
0.27
0.15
0.05
1.00 0.05
0.17 NOM
0.80 NOM
1.03 MAX
N16D1618LPA
Stock No. 23395- Rev L 1/06
5
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
Advance Information
NanoAmp Solutions, Inc.
Table 2: Pin Descriptions
PIN
PIN NAME
DESCRIPTIONS
CLK
System Clock
The system clock input. All other inputs are registered to the
SDRAM on the rising edge of the CLK
CKE
Clock Enable
Controls internal clock signal and when deactivated, the
SDRAM will be one of the states among power down, suspend
or self refresh.
/CS
Chip Select
Enable or disable all inputs except CLK, CKE and DQM
A11
Bank Address
Selects bank to be activated during /RAS activity
Selects bank to be read/written during /CAS activity
A0~A10
Address
Row Address : RA0~RA10
Column Address: CA0~CA7
Auto Precharge : A10
/RAS, /CAS, /WE
Row Address Strobe,
Column Address Strobe,
Write Enable
/RAS, /CAS and /WE define the operation
Refer function truth table for details
LDQM/UDQM
Data Input/Output Mask
Controls output buffers in read mode and masks input data in
write mode
DQ0~DQ15
Data Input/Output
Multiplexed data input/output pin
VDD/VSS
Power Supply/Ground
Power supply for internal circuits and input buffers
VDDQ/VSSQ
Data Output Power/Ground
Power Supply for output buffers
NC
No Connection
No Connection