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confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
2000, 2001
MOS FIELD EFFECT TRANSISTOR
2SK3479
SWITCHING
N-CHANNEL POWER MOS FET
DATA SHEET
Document No.
D15077EJ1V0DS00 (1st edition)
Date Published
July 2001 NS CP(K)
Printed in Japan
DESCRIPTION
The 2SK3479 is N-channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
Super low on-state resistance:
R
DS(on)1
= 11
m
MAX. (V
GS
= 10
V, I
D
= 42
A)
R
DS(on)2
= 13
m
MAX. (V
GS
= 4.5
V, I
D
= 42
A)
Low C
iss
: C
iss
= 11000
pF TYP.
Built-in gate protection diode
ABSOLUTE MAXIMUM RATINGS (T
A
= 25C)
Drain to Source Voltage (V
GS
= 0 V)
V
DSS
100
V
Gate to Source Voltage (V
DS
= 0 V)
V
GSS
20
V
Drain Current (DC) (T
C
= 25C)
I
D(DC)
83
A
Drain Current (pulse)
Note1
I
D(pulse)
332
A
Total Power Dissipation (T
C
= 25C)
P
T1
125
W
Total Power Dissipation (T
A
= 25C)
P
T2
1.5
W
Channel Temperature
T
ch
150
C
Storage Temperature
T
stg
55 to +150
C
Single Avalanche Current
Note2
I
AS
65
A
Single Avalanche Energy
Note2
E
AS
422
mJ
Notes 1. PW
10
s, Duty cycle
1%
2. Starting T
ch
= 25C, R
G
= 25
,
V
GS
= 20
0 V
ORDERING INFORMATION
PART NUMBER
PACKAGE
2SK3479
TO-220AB
2SK3479-S
TO-262
2SK3479-ZJ
TO-263
2SK3479-Z
TO-220SMD
Note
Note TO-220SMD package is produced only
in Japan.
(TO-220AB)
(TO-262)
(TO-263, TO-220SMD)
Data Sheet D15077EJ1V0DS
2
2SK3479
ELECTRICAL CHARACTERISTICS (T
A
= 25C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 100
V, V
GS
= 0
V
10
A
Gate Leakage Current
I
GSS
V
GS
=
20
V, V
DS
= 0
V
10
A
Gate Cut-off Voltage
V
GS(off)
V
DS
= 10
V, I
D
= 1
mA
1.5
2.5
V
Forward Transfer Admittance
| y
fs
|
V
DS
= 10
V, I
D
= 42
A
37
74
S
Drain to Source On-state Resistance
R
DS(on)1
V
GS
= 10
V, I
D
= 42
A
8.8
11
m
R
DS(on)2
V
GS
= 4.5
V, I
D
= 42
A
10
13
m
Input Capacitance
C
iss
V
DS
= 10
V
11000
pF
Output Capacitance
C
oss
V
GS
= 0
V
1100
pF
Reverse Transfer Capacitance
C
rss
f = 1
MHz
540
pF
Turn-on Delay Time
t
d(on)
V
DD
= 50
V, I
D
= 42
A
27
ns
Rise Time
t
r
V
GS
= 10
V
18
ns
Turn-off Delay Time
t
d(off)
R
G
= 0
140
ns
Fall Time
t
f
13
ns
Total Gate Charge
Q
G
V
DD
= 80
V
210
nC
Gate to Source Charge
Q
GS
V
GS
= 10
V
26
nC
Gate to Drain Charge
Q
GD
I
D
= 83
A
60
nC
Body Diode Forward Voltage
V
F(S-D)
I
F
= 83
A, V
GS
= 0
V
1.0
V
Reverse Recovery Time
t
rr
I
F
= 83
A, V
GS
= 0
V
85
ns
Reverse Recovery Charge
Q
rr
di/dt = 100
A/
s
280
nC
TEST CIRCUIT 3 GATE CHARGE
V
GS
= 20
0 V
PG.
R
G
= 25
50
D.U.T.
L
V
DD
TEST CIRCUIT 1 AVALANCHE CAPABILITY
PG.
D.U.T.
R
L
V
DD
TEST CIRCUIT 2 SWITCHING TIME
R
G
PG.
I
G
= 2 mA
50
D.U.T.
R
L
V
DD
I
D
V
DD
I
AS
V
DS
BV
DSS
Starting T
ch
V
GS
0
= 1
s
Duty Cycle
1%
V
GS
Wave Form
V
DS
Wave Form
V
GS
V
DS
10%
0
0
90%
90%
90%
V
GS
V
DS
t
on
t
off
t
d(on)
t
r
t
d(off)
t
f
10%
10%
Data Sheet D15077EJ1V0DS
3
2SK3479
TYPICAL CHARACTERISTICS (T
A
= 25C)
FORWARD BIAS SAFE OPERATING AREA
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
10
1
0.1
100
0.1
1000
1
10
100
T
C
= 25C
Single Pulse
1000
R
DS(on)
Limited
(at V
GS
= 10 V)
I
D(pulse)
I
D(DC)
Po
wer Dissipation
Limited
DC
PW = 10
s
100
s
1 ms
10 ms
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
T
C
- Case Temperature - C
dT - Percentage of Rated Power - %
0
40
20
60
100
140
80
120
160
120
100
80
60
40
20
T
C
- Case Temperature - C
P
T
- Total Power Dissipation - W
0
80
20
40
60
100
140
120
160
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
150
125
100
75
50
25
PW - Pulse Width - s
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
r
th(t)
- Transient Thermal Resistance -
C
/W
10
0.01
0.1
1
100
1000
1 m
10 m
100 m
1
10
100
1000
Single Pulse
10
100
R
th(ch-C)
= 1C/W
R
th(ch-A)
= 83.3C/W
Data Sheet D15077EJ1V0DS
4
2SK3479
FORWARD TRANSFER CHARACTERISTICS
V
GS
- Gate to Source Voltage - V
I
D
- Drain Current - A
Pulsed
1
2
3
4
5
6
V
DS
= 10 V
10
1
0.1
100
1000
T
A
=
-
40C
25C
75C
150C
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
2
3
4
1
Pulsed
V
GS
=10 V
4.5 V
300
250
200
150
100
50
0
5
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
I
D
- Drain Current - A
| y
fs
| - Forward Transfer Admittance - S
0.01
0.1
1
10
100
10
100
0.1
0.01
1
Pulsed
T
A
= 150C
75C
25C
-
40C
V
DS
= 10 V
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
V
GS
- Gate to Source Voltage - V
R
DS(on)
- Drain to Source On-state Resistance - m
5
10
15
20
Pulsed
20
16
12
8
4
0
42 A
I
D
= 83 A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
I
D
- Drain Current - A
R
DS(on)
- Drain to Source On-state Resistance - m
10
1
50
40
30
20
10
0
100
1000
Pulsed
V
GS
= 4.5 V
10 V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
T
ch
- Channel Temperature - C
V
GS(off)
- Gate Cut-off Voltage - V
0.5
V
DS
= 10 V
I
D
= 1 mA
1.0
1.5
2.0
2.5
3.0
-
50
0
50
100
150
0
Data Sheet D15077EJ1V0DS
5
2SK3479
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
T
ch
- Channel Temperature - C
R
DS(on)
- Drain to Source On-state Resistance - m
-
50
0
50
100
150
25
20
15
10
5
0
10 V
V
GS
= 4.5 V
Pulsed
I
D
= 42 A
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
1.0
I
SD
- Diode Forward Current - A
0
1.5
V
SD
- Source to Drain Voltage - V
0.5
Pulsed
0.1
1
10
100
1000
0 V
V
GS
= 10 V
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
I
F
- Drain Current - A
t
rr
- Reverse Recovery Time - ns
di/dt = 100 A/ s
V
GS
= 0 V
1
0.1
10
1.0
10
100
1000
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
V
GS
- Gate to Source Voltage - V
Q
G
- Gate Charge - nC
V
DS
- Drain to Source Voltage - V
50
100
150
200
250
160
120
80
40
0
V
DS
V
GS
V
DD
= 80 V
50 V
20 V
I
D
= 83 A
16
12
8
4
0
CAPACITANCE vs.
DRAIN TO SOURCE VOLTAGE
V
DS
- Drain to Source Voltage - V
C
iss
, C
oss
, C
rss
- Capacitance - pF
100
0.1
1000
10000
100000
1
10
100
V
GS
= 0 V
f = 1 MHz
C
oss
C
rss
C
iss
SWITCHING CHARACTERISTICS
I
D
- Drain Current - A
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
10
1
1
0.1
100
1000
10
100
t
f
t
r
t
d(on)
t
d(off)
V
DD
= 50 V
V
GS
= 10 V
R
G
= 0
Data Sheet D15077EJ1V0DS
6
2SK3479
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
L - Inductive Load - H
I
AS
- Single Avalanche Current - A
10
100
1000
1 m
10 m
V
DD
= 50 V
R
G
= 25
V
GS
= 20
0
V
I
AS
= 65 A
10
100
1
E
AS
= 422
mJ
SINGLE AVALANCHE ENERGY
DERATING FACTOR
Starting T
ch
- Starting Channel Temperature - C
Energy Derating Factor - %
25
50
75
100
160
140
120
100
80
60
40
20
0
125
150
V
DD
= 50 V
R
G
= 25
V
GS
= 20
0 V
I
AS
65 A
Data Sheet D15077EJ1V0DS
7
2SK3479
PACKAGE DRAWINGS (Unit: mm)
1) TO-220AB(MP-25)
4.8 MAX.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
1 2 3
10.6 MAX.
10.0 TYP.
3.60.2
4
3.00.3
1.30.2
0.750.1
2.54 TYP.
2.54 TYP.
5.9 MIN.
6.0 MAX.
15.5 MAX.
12.7 MIN.
1.30.2
0.50.2
2.80.2
2) TO-262(MP-25 Fin Cut)
4.8 MAX.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
1
2
3
10 TYP.
1.30.2
0.750.3
2.54 TYP.
2.54 TYP.
8.5
0.2
12.7 MIN.
1.30.2
0.50.2
2.80.2
1.00
.
5
4
3) TO-263
(MP-25ZJ)
1.40.2
1.00.5
2.54 TYP.
2.54 TYP.
8.50.2
1
2
3
5.70.4
4
4.8 MAX.
1.30.2
0.50.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
0.70.2
10 TYP.
0.5R TYP.
0.8R TYP.
2.80.2
4) TO-220SMD(MP-25Z)
Note
10 TYP.
1.40.2
1.00.5
2.54 TYP.
2.54 TYP.
8.50.2
1
2
3
3.00.5
1.10.4
4
4.8 MAX.
1.30.2
0.50.2
0.5R TYP.
0.8R TYP.
0.750.3
2.80.2
1.Gate
2.Drain
3.Source
4.Fin (Drain)
Note This package is produced only in Japan.
EQUIVALENT CIRCUIT
Source
Body
Diode
Gate
Protection
Diode
Gate
Drain
Remark
The diode connected between the gate and source of the transistor
serves as a protector against ESD. When this device actually used,
an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
2SK3479
M8E 00. 4
The information in this document is current as of July, 2001. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
third parties by or arising from the use of NEC semiconductor products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
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Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
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responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
parties arising from the use of these circuits, software and information.
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
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developed based on a customer-designated "quality assurance program" for a specific application. The
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Customers must check the quality grade of each semiconductor product before using it in a particular
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The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's
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