L-BAND PA DRIVER AMPLIFIER
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GaAs INTEGRATED CIRCUIT
PG174TA
Document No. P13230EJ2V0DS00 (2nd edition)
Date Published January 2000 N CP(K)
Printed in Japan
DATA SHEET
The mark shows major revised points.
1998, 2000
DESCRIPTION
The
PG174TA is L-Band PA driver amplifier developed for digital cellular telephone and PCS applications. This
device feature high output power and low distortion with 2.8 V low voltage and 35 mA low current operation. It is
housed in a very small 6-pin minimold package available on tape-and-reel and easy to install and contributes to
miniaturizing the systems.
FEATURES
y
Low operation voltage : V
DD
= 2.8 V
y
Low distortion
: P
adj1
= 60 dBc TYP. @ V
DD
= 2.8 V, f
RF
= 1 429 to 1 453 MHz, P
out
= +10 dBm
Off-chip input and output matching
y
Low operation current : I
DD
= 35 mA TYP. @ V
DD
= 2.8 V, f
RF
= 1 429 to 1 453 MHz, P
out
= +10 dBm
Off-chip input and output matching
y
6-pin minimold package
APPLICATION
y
Digital Cellular: PDC1.5G, DCS1800, PCS, etc.
ORDERING INFORMATION
Part Number
Package
Supplying Form
PG174TA-E3
6-pin minimold
Carrier tape width is 8 mm.
Qty 3kp/reel.
Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
PG174TA)
ABSOLUTE MAXIMUM RATINGS (T
A
= +25C)
Parameters
Symbol
Ratings
Unit
Supply Voltage
V
DD
6.0
V
Input Power
P
in
10
dBm
Total Power Dissipation
P
tot
170
Note
mW
Operating Ambient Temperature
T
A
30 to +90
C
Storage Temperature
T
stg
35 to +150
C
Note Mounted on a 50
50
1.6 mm double copper clad epoxy glass PWB, T
A
= +85C
Caution
The IC must be handled with care to prevent static discharge because its circuit composed of
GaAs HJ-FET.
Data Sheet P13230EJ2V0DS00
2
PG174TA
PIN CONNECTION AND INTERNAL BLOCK DIAGRAM
3
2
1
4
5
6
G1D
(Top View)
4
5
6
3
2
1
(Bottom View)
3
2
1
4
5
6
RECOMMENDED OPERATING CONDITIONS (T
A
= +25C)
Parameters
Symbol
MIN.
TYP.
MAX.
Unit
Supply Voltage 1, 2
V
DD1, 2
+2.7
+2.8
+3.0
V
Input Power
P
in
22
20
dBm
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, T
A
=
+25C, V
DD1
= V
DD2
= +2.8 V,
/4DQPSK modulated signal input,
off-chip input and output matching)
Parameters
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Operating Frequency
f
1 429
1 453
MHz
Power Gain
G
P
P
in
= 22 dBm
32.0
34.0
dB
Total Current
I
DD
P
in
= 22 dBm
35
40
mA
Adjacent Channel Power Leakage 1
P
adj1
P
out
= +10 dBm,
f =
50 kHz
60
55
dBc
Adjacent Channel Power Leakage 2
P
adj2
P
out
= +10 dBm,
f =
100 kHz
65
60
dBc
REFERENCE CHARACTERISTICS
(Unless otherwise specified, T
A
=
+25C, V
DD1
= V
DD2
= +2.8 V, f = 1 429 to 1 453 MHz,
off-chip input and output matching)
Parameters
Symbol
MIN.
TYP.
MAX.
Unit
Input Return Loss
RL
in
10
dB
Output Return Loss
RL
out
10
dB
Pin No.
Connection
1
GND
2
GND
3
IN
4
V
DD1
5
GND
6
V
DD2
& OUT
Data Sheet P13230EJ2V0DS00
3
PG174TA
EVALUATION CIRCUIT
V
DD1
= V
DD2
= +2.8 V, f = 1 429 to 1 453 MHz
G1D
4
3
2
1
5
6
V
DD1
V
DD2
C2
C3
Zo = 50
R1
L2
Zo = 50
C1
OUT
IN
L1
Using the NEC Evaluation board
Parts List
Value
C1, C2
1 000 pF
C3
2.0 pF
R1
10
L1
6.8 nH
L2
3.3 nH
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