Document Outline
- COVER
- Features
- Ordering Information
- Pin Configurations
- Block Diagram
- Electrical Specifications
- Package Drawings
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MOS INTEGRATED CIRCUIT
PD23C32040AL, 23C32080AL
32M-BIT MASK-PROGRAMMABLE ROM
4M-WORD BY 8-BIT (BYTE MODE) / 2M-WORD BY 16-BIT (WORD MODE)
PAGE ACCESS MODE
Document No. M15772EJ3V0DS00 (3rd edition)
Date Published February 2003 NS CP(K)
Printed in Japan
DATA SHEET
The mark shows major revised points.
2001
Description
The
PD23C32040AL and PD23C32080AL are 33,554,432 bits mask-programmable ROM. The word organization is
selectable (BYTE mode : 4,194,304 words by 8 bits, WORD mode : 2,097,152 words by 16 bits).
The active levels of OE (Output Enable Input) can be selected with mask-option.
The
PD23C32040AL and PD23C32080AL are packed in 48-pin PLASTIC TSOP(I) and 44-pin PLASTIC SOP.
Features
Word organization
4,194,304 words by 8 bits (BYTE mode)
2,097,152 words by 16 bits (WORD mode)
Page access mode
BYTE mode : 8 byte random page access (
PD23C32040AL)
16 byte random page access (
PD23C32080AL)
WORD mode : 4 word random page access (
PD23C32040AL)
8 word random page access (
PD23C32080AL)
Operating supply voltage : V
CC
= 2.7 V to 3.6 V
Operating supply
Access time /
Power supply current (Active mode)
Standby current
voltage
Page access time
mA (MAX.)
(CMOS level input)
V
CC
ns (MAX.)
PD23C32040AL
PD23C32080AL
A (MAX.)
3.0 V
0.3 V
100 / 25
40
55
30
3.3 V
0.3 V
90 / 25
2
PD23C32040AL, 23C32080AL
Data Sheet M15772EJ3V0DS
Ordering Information
Part Number
Package
PD23C32040ALGY-xxx-MJH
48-pin PLASTIC TSOP(I) (12 x 18) (Normal bent)
PD23C32040ALGY-xxx-MKH
48-pin PLASTIC TSOP(I) (12 x 18) (Reverse bent)
PD23C32040ALGX-xxx
44-pin PLASTIC SOP (15.24 mm (600))
PD23C32080ALGY-xxx-MJH
48-pin PLASTIC TSOP(I) (12 x 18) (Normal bent)
PD23C32080ALGY-xxx-MKH
48-pin PLASTIC TSOP(I) (12 x 18) (Reverse bent)
PD23C32080ALGX-xxx
44-pin PLASTIC SOP (15.24 mm (600))
(xxx : ROM code suffix No.)
3
PD23C32040AL, 23C32080AL
Data Sheet M15772EJ3V0DS
Pin Configurations
/xxx indicates active low signal.
48-pin PLASTIC TSOP(I) (12 x 18) (Normal bent)
[
PD23C32040ALGY-xxx-MJH ]
[
PD23C32080ALGY-xxx-MJH ]
Marking Side
WORD, /BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
GND
GND
O15, A
-
1
O7
O14
O6
O13
O5
O12
O4
V
CC
V
CC
NC
O11
O3
O10
O2
O9
O1
O8
O0
/OE or OE or DC
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A0 to A20
: Address inputs
O0 to O7, O8 to O14 : Data outputs
O15, A1
: Data output 15 (WORD mode),
LSB Address input (BYTE mode)
WORD, /BYTE
: Mode select
/CE
: Chip Enable
/OE or OE
: Output Enable
V
CC
: Supply voltage
GND
: Ground
NC
Note
: No Connection
DC
: Don't Care
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Remark Refer to Package Drawings for the 1-pin index mark.
4
PD23C32040AL, 23C32080AL
Data Sheet M15772EJ3V0DS
48-pin PLASTIC TSOP(I) (12 x 18) (Reverse bent)
[
PD23C32040ALGY-xxx-MKH ]
[
PD23C32080ALGY-xxx-MKH ]
Marking Side
WORD, /BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
GND
GND
O15, A
-
1
O7
O14
O6
O13
O5
O12
O4
V
CC
V
CC
NC
O11
O3
O10
O2
O9
O1
O8
O0
/OE or OE or DC
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A0 to A20
: Address inputs
O0 to O7, O8 to O14 : Data outputs
O15, A1
: Data output 15 (WORD mode),
LSB Address input (BYTE mode)
WORD, /BYTE
: Mode select
/CE
: Chip Enable
/OE or OE
: Output Enable
V
CC
: Supply voltage
GND
: Ground
NC
Note
: No Connection
DC
: Don't Care
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Remark Refer to Package Drawings for the 1-pin index mark.
5
PD23C32040AL, 23C32080AL
Data Sheet M15772EJ3V0DS
44-pin PLASTIC SOP (15.24 mm (600))
[
PD23C32040ALGX-xxx ]
[
PD23C32080ALGX-xxx ]
Marking Side
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
GND
/OE or OE or DC
O0
O8
O1
O9
O2
O10
O3
O11
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A20
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
WORD, /BYTE
GND
O15, A
-
1
O7
O14
O6
O13
O5
O12
O4
V
CC
A0 to A20
: Address inputs
O0 to O7, O8 to O14 : Data outputs
O15, A1
: Data output 15 (WORD mode),
LSB Address input (BYTE mode)
WORD, /BYTE
: Mode select
/CE
: Chip Enable
/OE or OE
: Output Enable
V
CC
: Supply voltage
GND
: Ground
NC
Note
: No Connection
DC
: Don't Care
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Remark Refer to Package Drawings for the 1-pin index mark.
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