Document Outline
- COVER
- Features
- Ordering Information
- Pin Configurations
- Block Diagram
- Electrical Specifications
- Package Drawings
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MOS INTEGRATED CIRCUIT
PD23C128000BL
128M-BIT MASK-PROGRAMMABLE ROM
16M-WORD BY 8-BIT (BYTE MODE) / 8M-WORD BY 16-BIT (WORD MODE)
DATA SHEET
Document No. M15900EJ3V0DS00 (3rd edition)
Date Published February 2003 NS CP (K)
Printed in Japan
The mark shows major revised points.
2002
Description
The
PD23C128000BL is a 134,217,728 bits mask-programmable ROM. The word organization is selectable
(BYTE mode : 16,777,216 words by 8 bits, WORD mode : 8,388,608 words by 16 bits). With 44-pin PLASTIC SOP
package products, only word mode can be used; it is not possible to switch to byte mode.
The active levels of OE (Output Enable Input) can be selected with mask-option.
The
PD23C128000BL is packed in 48-pin PLASTIC TSOP (I) and 44-pin PLASTIC SOP.
Features
Word organization
16,777,216 words by 8 bits (BYTE mode)
Note
8,388,608 words by 16 bits (WORD mode)
Note
Note With 44-pin PLASTIC SOP package products, only word mode can be used.
It is not possible to switch to byte mode.
Operating supply voltage : V
CC
= 2.7 to 3.6 V
Operating supply voltage
Access time
Power supply current (Active mode)
Standby current (CMOS level input)
V
CC
ns (MAX.)
mA (MAX.)
A (MAX.)
3.0 V
0.3 V
120
50
30
3.3 V
0.3 V
100
55
Ordering Information
Part Number
Package
PD23C128000BLGY-xxx-MJH
48-pin PLASTIC TSOP(I) (12x18) (Normal bent)
PD23C128000BLGY-xxx-MKH
48-pin PLASTIC TSOP(I) (12x18) (Reverse bent)
PD23C128000BLGX-xxx
44-pin PLASTIC SOP (15.24 mm (600))
(xxx : ROM code suffix No.)
Data Sheet M15900EJ3V0DS
2
PD23C128000BL
Pin Configurations
/xxx indicates active low signal.
48-pin PLASTIC TSOP (I) (12x18) (Normal bent)
[
PD23C128000BLGY-xxx-MJH ]
Marking Side
WORD, /BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
A21
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
GND
GND
O15, A
-1
O7
O14
O6
O13
O5
O12
O4
V
CC
V
CC
A22
O11
O3
O10
O2
O9
O1
O8
O0
/OE or OE or DC
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A0 to A22
: Address inputs
O0 to O7, O8 to O14 : Data outputs
O15, A1
: Data output 15 (WORD mode),
LSB Address input (BYTE mode)
WORD, /BYTE
: Mode select input
/CE
: Chip Enable input
/OE or OE
: Output Enable input
V
CC
: Supply voltage
GND
: Ground
DC
: Don't Care
Remark Refer to Package Drawings for the 1-pin index mark.
Data Sheet M15900EJ3V0DS
3
PD23C128000BL
48-pin PLASTIC TSOP (I) (12x18) (Reverse bent)
[
PD23C128000BLGY-xxx-MKH ]
Marking Side
WORD, /BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
A21
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
GND
GND
O15, A
-1
O7
O14
O6
O13
O5
O12
O4
V
CC
V
CC
A22
O11
O3
O10
O2
O9
O1
O8
O0
/OE or OE or DC
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A0 to A22
: Address inputs
O0 to O7, O8 to O14 : Data outputs
O15, A1
: Data output 15 (WORD mode),
LSB Address input (BYTE mode)
WORD, /BYTE
: Mode select input
/CE
: Chip Enable input
/OE or OE
: Output Enable input
V
CC
: Supply voltage
GND
: Ground
DC
: Don't Care
Remark Refer to Package Drawings for the 1-pin index mark.
Data Sheet M15900EJ3V0DS
4
PD23C128000BL
44-pin PLASTIC SOP (15.24 mm (600))
[
PD23C128000BLGX-xxx ]
Marking
Side
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A21
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
GND
/OE or OE or DC
O0
O8
O1
O9
O2
O10
O3
O11
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A20
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
A22
GND
O15
O7
O14
O6
O13
O5
O12
O4
V
CC
A0 to A22
: Address inputs
O0 to O15
: Data outputs
/CE
: Chip Enable
/OE or OE
: Output Enable
V
CC
: Supply voltage
GND
: Ground
DC
: Don't Care
Remarks 1. Refer to Package Drawings for the 1-pin index mark.
2. With 44-pin PLASTIC SOP package products, only word mode (8,388,608 words x 16 bits) can be
used. There is no mode select (WORD, /BYTE) pin.
Data Sheet M15900EJ3V0DS
5
PD23C128000BL
Input / Output Pin Functions
Pin name
Input / Output
Function
WORD, /BYTE
Input
The pin for switching WORD mode and BYTE mode.
High level : WORD mode (8M-word by 16-bit)
Low level : BYTE mode (16M-word by 8-bit)
A0 to A22
(Address inputs)
Input
Address input pins.
A0 to A22 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
A0 to A22 are used as 23 bits address signals.
BYTE mode (16M-word by 8-bit)
A0 to A22 are used as the upper 23 bits of total 24 bits of address signal.
(The least significant bit (A
-1) is combined to O15.)
O0 to O7, O8 to O14
(Data outputs)
Output
Data output pins.
O0 to O7, O8 to O14 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
The lower 15 bits of 16 bits data outputs to O0 to O14.
(The most significant bit (O15) combined to A
-1.)
BYTE mode (16M-word by 8-bit)
8 bits data outputs to O0 to O7 and also O8 to O14 are high impedance.
O15, A
-1
(Data output 15,
LSB Address input)
Output, Input O15, A
-1 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
The most significant output data bus (O15).
BYTE mode (16M-word by 8-bit)
The least significant address bus (A
-1).
/CE
(Chip Enable)
Input
Chip activating signal.
When the OE is active, output states are following.
High level : High-Z
Low level : Data out
/OE or OE or DC
(Output Enable, Don't Care)
Input
Output enable signal. The active level of OE is mask option. The active level of OE
can be selected from high active, low active and Don't care at order.
V
CC
-
Supply voltage
GND
-
Ground
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